Tuan Thanh Ta

20 papers A 1Journal 10Unranked 9
YearRankTypeTitle / Venue / Authors
2022 — conf
1200x84-pixels 30fps 64cc Solid-State LiDAR RX with an HV/LV transistors Hybrid Active-Quenching-SPAD Array and Background Digital PT Compensation.
VLSI Technology and Circuits
Toshiki Sugimoto, Tuan Thanh Ta, Koichi Kokubun, Satoshi Kondo, Tetsuro Itakura, Hisaaki Katagiri, Yutaka Ota, Mitsuhiro Sengoku, Honam Kwon, Keita Sasaki, Hiroshi Kubota, Kazuhiro Suzuki, Katsuyuki Kimura, Akihide Sai
2021 A conf
Through the Looking Glass: Diminishing Occlusions in Robot Vision Systems with Mirror Reflections.
IROS
Kentaro Yoshioka, Hidenori Okuni, Tuan Thanh Ta, Akihide Sai
2021 J jnl
Through the Looking Glass: Diminishing Occlusions in Robot Vision Systems with Mirror Reflections.
CoRR
Kentaro Yoshioka, Hidenori Okuni, Tuan Thanh Ta, Akihide Sai
2020 — conf
5.1 A 240×192 Pixel 10fps 70klux 225m-Range Automotive LiDAR SoC Using a 40ch 0.0036mm
ISSCC
Satoshi Kondo, Hiroshi Kubota, Hisaaki Katagiri, Yutaka Ota, Masatoshi Hirono, Tuan Thanh Ta, Hidenori Okuni, Shinichi Ohtsuka, Yoshinari Ojima, Tomohiko Sugimoto, Hirotomo Ishii, Kentaro Yoshioka, Katsuyuki Kimura, Akihide Sai, Nobu Matsumoto
2020 — conf
A 2D-SPAD Array and Read-Out AFE for Next-Generation Solid-State LiDAR.
VLSI Circuits
Tuan Thanh Ta, Hiroshi Kubota, Koichi Kokubun, Toshiki Sugimoto, Masatoshi Hirono, Mitsuhiro Sengoku, Hisaaki Katagiri, Hidenori Okuni, Satoshi Kondo, Shinichi Ohtsuka, Honam Kwon, Keita Sasaki, Yutaka Ota, Kazuhiro Suzuki, Katsuyuki Kimura, Kentaro Yoshioka, Akihide Sai, Nobu Matsumoto
2020 J jnl
An Automotive LiDAR SoC for 240 × 192-Pixel 225-m-Range Imaging With a 40-Channel 0.0036-mm
IEEE J. Solid State Circuits
Satoshi Kondo, Hiroshi Kubota, Hisaaki Katagiri, Yutaka Ota, Masatoshi Hirono, Tuan Thanh Ta, Hidenori Okuni, Shinichi Ohtsuka, Yoshinari Ojima, Tomohiko Sugimoto, Hirotomo Ishii, Kentaro Yoshioka, Katsuyuki Kimura, Akihide Sai, Nobu Matsumoto
2018 — conf
A 15mW -105dBm Image-Sparse-Sliding-IF Receiver with Transformer-Based on-Chip Q-Enhanced RF Matching Network for a 113dB-Link-Budget BLE 5.0 TRX.
ESSCIRC
Tuan Thanh Ta, Yosuke Ogasawara, Tong Wang, Masayoshi Oshiro, Naotaka Koide, Akihide Sai, Takashi Tokairin
2018 J jnl
A 20-ch TDC/ADC Hybrid Architecture LiDAR SoC for 240 × 96 Pixel 200-m Range Imaging With Smart Accumulation Technique and Residue Quantizing SAR ADC.
IEEE J. Solid State Circuits
Kentaro Yoshioka, Hiroshi Kubota, Tomonori Fukushima, Satoshi Kondo, Tuan Thanh Ta, Hidenori Okuni, Kaori Watanabe, Masatoshi Hirono, Yoshinari Ojima, Katsuyuki Kimura, Sohichiroh Hosoda, Yutaka Ota, Tomohiro Koizumi, Naoyuki Kawabe, Yasuhiro Ishii, Yoichiro Iwagami, Seitaro Yagi, Isao Fujisawa, Nobuo Kano, Tomohiko Sugimoto, Daisuke Kurose, Naoya Waki, Yumi Higashi, Tetsuya Nakamura, Yoshikazu Nagashima, Hirotomo Ishii, Akihide Sai, Nobu Matsumoto
2018 — conf
A 20ch TDC/ADC hybrid SoC for 240×96-pixel 10%-reflection <0.125%-precision 200m-range imaging LiDAR with smart accumulation technique.
ISSCC
Kentaro Yoshioka, Hiroshi Kubota, Tomonori Fukushima, Satoshi Kondo, Tuan Thanh Ta, Hidenori Okuni, Kaori Watanabe, Yoshinari Ojima, Katsuyuki Kimura, Sohichiroh Hosoda, Yutaka Ota, Tomohiro Koizumi, Naoyuki Kawabe, Yasuhiro Ishii, Yoichiro Iwagami, Seitaro Yagi, Isao Fujisawa, Nobuo Kano, Tomohiro Sugimoto, Daisuke Kurose, Naoya Waki, Yumi Higashi, Tetsuya Nakamura, Yoshikazu Nagashima, Hirotomo Ishii, Akihide Sai, Nobu Matsumoto
2018 — conf
An 113DB-Link-Budget Bluetooth-5 SoC with an 8dBm 22%-Efficiency TX.
VLSI Circuits
Tong Wang, Yosuke Ogasawara, Yuki Tuda, Tuan Thanh Ta, Masayoshi Oshiro, Jun Ihara, Tatsuhiko Maruyama, Toru Hashimoto, Akihide Sai, Takashi Tokairin
2017 J jnl
A 3.2mA-RX 3.5mA-TX Fully Integrated SoC for Bluetooth Low Energy System.
IEICE Trans. Electron.
Masayoshi Oshiro, Tatsuhiko Maruyama, Takashi Tokairin, Yuki Tuda, Tong Wang, Naotaka Koide, Yosuke Ogasawara, Tuan Thanh Ta, Hiroshi Yoshida, Kenichi Sami
2016 — conf
19.7 A 65nm CMOS ADPLL with 360µW 1.6ps-INL SS-ADC-based period-detection-free TDC.
ISSCC
Akihide Sai, Satoshi Kondo, Tuan Thanh Ta, Hidenori Okuni, Masanori Furuta, Tetsuro Itakura
2016 — conf
26.1 A 5.5mW ADPLL-based receiver with hybrid-loop interference rejection for BLE application in 65nm CMOS.
ISSCC
Hidenori Okuni, Akihide Sai, Tuan Thanh Ta, Satoshi Kondo, Takashi Tokairin, Masanori Furuta, Tetsuro Itakura
2016 — conf
A 3.2 mA-RX 3.5 mA-TX fully integrated SoC for Bluetooth Low Energy.
A-SSCC
Masayoshi Oshiro, Tatsuhiko Maruyama, Takashi Tokairin, Yuki Tuda, Tong Wang, Naotaka Koide, Yosuke Ogasawara, Tuan Thanh Ta, Hiroshi Yoshida, Kenichi Sami
2016 J jnl
A 5.5 mW ADPLL-Based Receiver With a Hybrid Loop Interference Rejection for BLE Application in 65 nm CMOS.
IEEE J. Solid State Circuits
Akihide Sai, Hidenori Okuni, Tuan Thanh Ta, Satoshi Kondo, Takashi Tokairin, Masanori Furuta, Tetsuro Itakura
2015 J jnl
1/2
IEICE Trans. Electron.
Daliso Banda, Mizuki Motoyoshi, Tomokazu Koizumi, Osamu Wada, Tuan Thanh Ta, Suguru Kameda, Noriharu Suematsu, Tadashi Takagi, Kazuo Tsubouchi
2013 J jnl
A Calibrationless Si-CMOS 5-bit Baseband Phase Shifter Using a Fixed-Gain-Amplifier Matrix.
IEICE Trans. Electron.
Tuan Thanh Ta, Shoichi Tanifuji, Suguru Kameda, Noriharu Suematsu, Tadashi Takagi, Kazuo Tsubouchi
2010 J jnl
5GHz band low phase noise Si-CMOS oscillator using FBAR.
IEICE Electron. Express
Shoichi Tanifuji, Tuan Thanh Ta, Suguru Kameda, Tadashi Takagi, Kazuo Tsubouchi
2010 J jnl
A 5 GHz Band Low Noise and Wide Tuning Range Si-CMOS VCO with a Novel Varactors Pair Circuit.
IEICE Trans. Electron.
Tuan Thanh Ta, Suguru Kameda, Tadashi Takagi, Kazuo Tsubouchi
2008 J jnl
5GHz Si-CMOS differential power amplifier module with directly connected dipole antenna.
IEICE Electron. Express
Kazuya Shimoyama, Satoshi Yoshida, Tuan Thanh Ta, Keisuke Matsuzaki, Hiroshi Oguma, Suguru Kameda, Hiroyuki Nakase, Tadashi Takagi, Kazuo Tsubouchi