Tsuyoshi Yamada

13 papers A* 1B 1Misc 1Journal 9Unranked 1
YearRankTypeTitle / Venue / Authors
2025 J jnl
Designing an Axial Piston Pump Displacement Controller for Varying Reference Trajectory Based on Model Predictive Control.
Int. J. Autom. Technol.
Tsuyoshi Yamada, Kazuhisa Ito
2025 J jnl
Overfitting Characteristics of Reservoir-Computing-Based Nonlinear Equalizer Trained on PRBS and Repeated Random Bit Sequence.
IEICE Trans. Commun.
Yuta Ito, Kai Ikuta, Tsuyoshi Yamada, Takumi Yamamoto, Moriya Nakamura
2024 J jnl
Designing a Model Predictive Controller for Displacement Control of Axial Piston Pump.
Int. J. Autom. Technol.
Tsuyoshi Yamada, Ryo Inada, Kazuhisa Ito
2019 J jnl
Postmortem Changes in Skeletal Muscle Can Be Expressed by Hounsfield Unit Measurements in Postmortem Computed Tomography - A Murine Model Study.
J. Medical Imaging Health Informatics
Tsuyoshi Yamada, Tamaki Takeuchi, Morihiro Ito
2019 J jnl
Postmortem Changes in Skeletal Muscle Can Be Expressed by Hounsfield Unit Measurements in Postmortem Computed Tomography - A Murine Model Study.
J. Medical Imaging Health Informatics
Tsuyoshi Yamada, Tamaki Takeuchi, Morihiro Ito
2014 — conf
A cloud architecture for protecting guest's information from malicious operators with memory management.
CODASPY
Koki Murakami, Tsuyoshi Yamada, Rie Shigetomi Yamaguchi, Masahiro Goshima, Shuichi Sakai
2010 A* conf
Higher Order Differential Attack on Step-Reduced Variants of
FSE
Dai Watanabe, Yasuo Hatano, Tsuyoshi Yamada, Toshinobu Kaneko
2006 B conf
A Multicast Tree Reconstruction Method for Many-to-Many Mobile Communications with Delay Constraint.
LCN
Tsuyoshi Yamada, Shoji Yoshimura, Keita Kawano, Kazuhiko Kinoshita, Koso Murakami
2005 Misc conf
An Algorithm of Feeder Arrangements and Pickup Sequencing of Component Placement Machine on Printed Circuit Board.
PDPTA
Tsuyoshi Yamada, Ryuhei Miyashiro, Mario Nakamori
1995 J jnl
A half-pel precision MPEG2 motion-estimation processor with concurrent three-vector search.
IEEE J. Solid State Circuits
Kazuya Ishihara, Shinichi Masuda, Shin-ichi Hattori, Hirofumi Nishikawa, Yoshihide Ajioka, Tsuyoshi Yamada, Hiroyuki Amishiro, Shin-ichi Uramoto, Masahiko Yoshimoto, Tadashi Sumi
1992 J jnl
A refreshable analog VLSI neural network chip with 400 neurons and 40 K synapses.
IEEE J. Solid State Circuits
Yutaka Arima, Mitsuhiro Murasaki, Tsuyoshi Yamada, Atsushi Maeda, Hirofumi Shinohara
1991 J jnl
A 336-neuron, 28 K-synapse, self-learning neural network chip with branch-neuron-unit architecture.
IEEE J. Solid State Circuits
Yutaka Arima, Koichiro Mashiko, Keisuke Okada, Tsuyoshi Yamada, Atsushi Maeda, Hiromi Notani, Harufusa Kondoh, Shinpei Kayano
1991 J jnl
A self-learning neural network chip with 125 neurons and 10 K self-organization synapses.
IEEE J. Solid State Circuits
Yutaka Arima, Koichiro Mashiko, Keisuke Okada, Tsuyoshi Yamada, Atsushi Maeda, Harufusa Kondoh, Shimpei Kayano