Tsung-Yi Wu

16 papers A* 1C 2Journal 6Unranked 7
YearRankTypeTitle / Venue / Authors
2023 C conf
A Low-Power Dual-Core Motion Estimation Chip Design and Validation for a Wireless Panoramic Endoscopy.
ISCAS
Jian-Lin Zeng, Tsung-Yi Wu, Don-Gey Liu, Ching-Hwa Cheng
2023 C conf
Live Demonstration: A Low-Power Dual-Core Motion Estimation Chip Design and Validation for a Wireless Panoramic Endoscopy.
ISCAS
Jian-Lin Zeng, Tsung-Yi Wu, Don-Gey Liu, Ching-Hwa Cheng
2013 J jnl
Design and Implementation of High-Speed and Energy-Efficient Variable-Latency Speculating Booth Multiplier (VLSBM).
IEEE Trans. Circuits Syst. I Regul. Pap.
Shin-Kai Chen, Chih-Wei Liu, Tsung-Yi Wu, An-Chi Tsai
2012 — conf
A Preliminary Study on Using Augmented Virtuality to Improve Training for Intercollegiate Archers.
DIGITEL
Tsung-Yi Wu, Yi-Chieh Chang, Shang-Ti Chen, I-Tsun Chiang
2010 J jnl
Combined Use of Rising and Falling Edge Triggered Clocks for Peak Current Reduction in IP-Based SoC/NoC Designs.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Tsung-Yi Wu, Tzi-Wei Kao, How-Rern Lin
2010 — conf
Combined use of rising and falling edge triggered clocks for peak current reduction in IP-based SoC designs.
ASP-DAC
Tsung-Yi Wu, Tzi-Wei Kao, Shi-Yi Huang, Tai-Lun Li, How-Rern Lin
2009 J jnl
A Conditional Isolation Technique for Low-Energy and High-Performance Wide Domino Gates.
IEICE Trans. Electron.
How-Rern Lin, Wei-Hao Chiu, Tsung-Yi Wu
2009 J jnl
Low-Leakage and Low-Power Implementation of High-Speed Logic Gates.
IEICE Trans. Electron.
Tsung-Yi Wu, Liang-Ying Lu
2008 — conf
IR Drop Reduction via a Flip-Flop Resynthesis Technique.
ISQED
Jiun-Kuan Wu, Tsung-Yi Wu, Liang-Ying Lu, Kuang-Yao Chen
2007 — conf
A Fast Probability-Based Algorithm for Leakage Current Reduction Considering Controller Cost.
ASP-DAC
Tsung-Yi Wu, Jr-Luen Tzeng, Kuang-Yao Chen
2007 J jnl
A Fast Probability-Based Algorithm for Leakage Current Reduction Considering Controller Cost.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Tsung-Yi Wu, Jr-Luen Tzeng
2001 — conf
A Method of Embedded Memory Access Time Measurement.
ISQED
Nai-Yin Sung, Tsung-Yi Wu
1996 J jnl
Register minimization beyond sharing among variables.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Tsung-Yi Wu, Youn-Long Lin
1996 — conf
Storage optimization by replacing some flip-flops with latches.
EURO-DAC
Youn-Long Lin, Tsung-Yi Wu
1995 A* conf
Register Minimization beyond Sharing among Variables.
DAC
Tsung-Yi Wu, Youn-Long Lin
1994 — conf
A Synthesis Method for Mixed Synchronous / Asynchronous Behavior.
EDAC-ETC-EUROASIC
Tsung-Yi Wu, Tzu-Chieh Tien, Allen C.-H. Wu, Youn-Long Lin