Trong-Thuc Hoang

95 papers C 19Journal 53Unranked 23
YearRankTypeTitle / Venue / Authors
2026 J jnl
Countering Side-Channel Attacks With a Dynamic S-Box Based on Affine Transformations and Gold Sequences.
IEEE Trans. Very Large Scale Integr. Syst.
Thai-Ha Tran, Duc-Thuan Dam, Tuan-Kiet Dang, Duc-Hung Le, Trong-Thuc Hoang, Cong-Kha Pham
2025 C conf
A Low-Latency Polynomial Arithmetic Unit for ML-KEM and ML-DSA Standards.
ISCAS
Trong-Hung Nguyen, Duc-Thuan Dam, Phuc-Phan Duong, Trong-Thuc Hoang, Cong-Kha Pham
2025 J jnl
A Timing-Constrained Design Methodology for Radix- 2
IEEE Trans. Circuits Syst. I Regul. Pap.
Trong-Hung Nguyen, Duc-Thuan Dam, Phuc-Phan Duong, Tuan-Kiet Dang, Trong-Thuc Hoang, Cong-Kha Pham
2025 J jnl
A Unified Approach to Strong PUF and TRNG Using Ring Generator for Cryptography.
IEEE Internet Things J.
Tuan-Kiet Dang, Khai-Duy Nguyen, Trong-Thuc Hoang, Cong-Kha Pham
2025 J jnl
ASIC Implementation of ASCON Lightweight Cryptography for IoT Applications.
IEEE Trans. Circuits Syst. II Express Briefs
Khai-Duy Nguyen, Tuan-Kiet Dang, Binh Kieu-Do-Nguyen, Duc-Hung Le, Cong-Kha Pham, Trong-Thuc Hoang
2025 J jnl
An Area-Time Efficient Hardware Architecture for ML-KEM Post-Quantum Cryptography Standard.
IEEE Access
Trong-Hung Nguyen, Tuan-Kiet Dang, Duc-Thuan Dam, Khai-Duy Nguyen, Phuc-Phan Duong, Cong-Kha Pham, Trong-Thuc Hoang
2025 J jnl
Compact 8-Bit S-Boxes Based on Multiplication in a Galois Field GF(24).
Cryptogr.
Phuc-Phan Duong, Tuan-Kiet Dang, Trong-Thuc Hoang, Cong-Kha Pham
2025 C conf
Compact FALCON FFT/NTT Accelerator for Post-Quantum Cryptography.
ISCAS
Duc-Thuan Dam, Thai-Ha Tran, Trong-Hung Nguyen, Trong-Thuc Hoang, Cong-Kha Pham
2025 — conf
Dual-Mode PUF and TRNG Design with Ring Generator on 180nm CMOS.
ICICDT
Tuan-Kiet Dang, Khai-Duy Nguyen, Trong-Thuc Hoang, Cong-Kha Pham
2025 J jnl
Efficient Hardware Implementation of the Lightweight CRYSTALS-Kyber.
IEEE Trans. Circuits Syst. I Regul. Pap.
Trong-Hung Nguyen, Duc-Thuan Dam, Phuc-Phan Duong, Binh Kieu-Do-Nguyen, Cong-Kha Pham, Trong-Thuc Hoang
2025 C conf
Enhanced Tower Field Mask Scheme with Affine Transformation-based Dynamic S-box.
ISCAS
Thai-Ha Tran, Duc-Thuan Dam, Van-Phuc Hoang, Trong-Thuc Hoang, Cong-Kha Pham
2025 C conf
Live Demonstration: ASIC Implementation of ASCON Lightweight Cryptography for IoT Applications.
ISCAS
Khai-Duy Nguyen, Tuan-Kiet Dang, Binh Kieu-Do-Nguyen, Cong-Kha Pham, Trong-Thuc Hoang
2025 — conf
Pedestrian Avoidance Simulation by Deep Reinforcement Learning Using Webots.
ICAIIC
Chalumpol Trararak, Trong-Thuc Hoang, Cong-Kha Pham
2024 J jnl
A Novel ECG Signal Quality Index Method Based on Skewness-MODWT Analysis.
IEEE Access
Ta Viet Tai, Ma Pham Nhut Tan, Duong Hoang Tien, Nguyen Viet Ha, Trong-Thuc Hoang, Cong-Kha Pham, Tran Thi Thao Nguyen
2024 — conf
A Resource-Efficient Multi-core Multi-thread RISC-V-based System-on-Chip.
ISOCC
Binh Kieu-Do-Nguyen, Khai-Duy Nguyen, Nguyen The Binh, Tuan-Kiet Dang, Duc-Hung Le, Cuong Pham-Quoc, Ngoc-Thinh Tran, Cong-Kha Pham, Trong-Thuc Hoang
2024 C conf
A Strong 4 × 4 S-Box Using an Enhanced Tent Map.
ISCAS
Phuc-Phan Duong, Trong-Thuc Hoang, Cong-Kha Pham
2024 — conf
A True Random Number Generator on FPGA with Jitter-Sampling by Ring Generator.
AsianHOST
Tuan-Kiet Dang, Trong-Thuc Hoang, Cong-Kha Pham
2024 — conf
A Trusted Execution Environment RISC-V System on Chip.
HCS
Binh Kieu-Do-Nguyen, Khai-Duy Nguyen, Tuan-Kiet Dang, Cong-Kha Pham, Trong-Thuc Hoang
2024 C conf
A Unified OTP and PUF Exploiting Post-Program Current on Standard CMOS Technology.
ISCAS
Ronaldo Serrano, Ckristian Duran, Marco Sarmiento, Khai-Duy Nguyen, Tetsuya Iizuka, Trong-Thuc Hoang, Cong-Kha Pham
2024 J jnl
A multimode SHA-3 accelerator based on RISC-V system.
IEICE Electron. Express
Huu-Thuan Huynh, Tan-Phat Dang, Tuan-Kiet Tran, Trong-Thuc Hoang, Cong-Kha Pham
2024 J jnl
Accumulator-Based 16-Bit Processor for Wireless Sensor Nodes.
IEEE Trans. Circuits Syst. II Express Briefs
Tuan-Kiet Dang, Khai-Duy Nguyen, Cong-Kha Pham, Trong-Thuc Hoang
2024 C conf
An Efficient Hiding Countermeasure with Xilinx MMCM Primitive in Spread Mode.
ISCAS
Thai-Ha Tran, Van-Phuc Hoang, Duc-Hung Le, Trong-Thuc Hoang, Cong-Kha Pham
2024 C conf
An Efficient Method for Accelerating Kyber and Dilithium Post-Quantum Cryptography.
PST
Duc-Thuan Dam, Trong-Hung Nguyen, Thai-Ha Tran, Binh Kieu-Do-Nguyen, Trong-Thuc Hoang, Cong-Kha Pham
2024 J jnl
Compact and Low-Latency FPGA-Based Number Theoretic Transform Architecture for CRYSTALS Kyber Postquantum Cryptography Scheme.
Inf.
Binh Kieu-Do-Nguyen, Nguyen The Binh, Cuong Pham-Quoc, Huynh Phuc Nghi, Ngoc-Thinh Tran, Trong-Thuc Hoang, Cong-Kha Pham
2024 J jnl
Compacting Side-Channel Measurements With Amplitude Peak Location Algorithm.
IEEE Trans. Very Large Scale Integr. Syst.
Thai-Ha Tran, Duc-Thuan Dam, Ba-Anh Dao, Van-Phuc Hoang, Cong-Kha Pham, Trong-Thuc Hoang
2024 J jnl
Construction of Robust Lightweight S-Boxes Using Enhanced Logistic and Enhanced Sine Maps.
IEEE Access
Phuc-Phan Duong, Hieu Minh Nguyen, Ba-Anh Dao, Binh Kieu-Do-Nguyen, Thai-Ha Tran, Trong-Thuc Hoang, Cong-Kha Pham
2024 — conf
Designing and Implementing a 2D Integer DCT Hardware Accelerator Fully Compatible with Versatile Video Coding.
ICCSA (Workshops 1)
Nhu-Hoang Nguyen, Tan-Phat Dang, Thanh-Dat Bui, Trong-Thuc Hoang, Cong-Kha Pham, Huu-Thuan Huynh
2024 C conf
Hardware Implementation of a Hybrid Dynamic Gold Code-Based Countermeasure Against Side-Channel Attacks.
PST
Thai-Ha Tran, Duc-Thuan Dam, Binh Kieu-Do-Nguyen, Van-Phuc Hoang, Trong-Thuc Hoang, Cong-Kha Pham
2024 J jnl
Hardware Software Co-Design for Multi-Threaded Computation on RISC-V-Based Multicore System.
IEEE Access
Binh Kieu-Do-Nguyen, Khai-Duy Nguyen, Nguyen The Binh, Khai-Minh Ma, Tri Duc Ta, Duc-Hung Le, Cong-Kha Pham, Trong-Thuc Hoang
2024 J jnl
High-Efficiency Multi-Standard Polynomial Multiplication Accelerator on RISC-V SoC for Post-Quantum Cryptography.
IEEE Access
Duc-Thuan Dam, Trong-Hung Nguyen, Thai-Ha Tran, Duc-Hung Le, Trong-Thuc Hoang, Cong-Kha Pham
2024 J jnl
High-Speed NTT Accelerator for CRYSTAL-Kyber and CRYSTAL-Dilithium.
IEEE Access
Trong-Hung Nguyen, Binh Kieu-Do-Nguyen, Cong-Kha Pham, Trong-Thuc Hoang
2024 — conf
RISC-V-Based System-on-Chips for IoT Applications.
HCS
Khai-Duy Nguyen, Tuan-Kiet Dang, Binh Kieu-Do-Nguyen, Cong-Kha Pham, Trong-Thuc Hoang
2024 J jnl
Realization of Authenticated One-Pass Key Establishment on RISC-V Micro-Controller for IoT Applications.
Future Internet
Tuan-Kiet Dang, Khai-Duy Nguyen, Binh Kieu-Do-Nguyen, Trong-Thuc Hoang, Cong-Kha Pham
2024 J jnl
Spread Spectrum-Based Countermeasures for Cryptographic RISC-V SoC.
IEEE Trans. Very Large Scale Integr. Syst.
Thai-Ha Tran, Ba-Anh Dao, Duc-Hung Le, Van-Phuc Hoang, Trong-Thuc Hoang, Cong-Kha Pham
2024 C conf
Unified-pipelined NTT Architecture for Polynomial Multiplication in Lattice-based Cryptosystems.
ISCAS
Trong-Hung Nguyen, Nguyen The Binh, Huynh Phuc Nghi, Cong-Kha Pham, Trong-Thuc Hoang
2023 J jnl
A High-Efficiency Modular Multiplication Digital Signal Processing for Lattice-Based Post-Quantum Cryptography.
Cryptogr.
Trong-Hung Nguyen, Cong-Kha Pham, Trong-Thuc Hoang
2023 J jnl
A Survey of Post-Quantum Cryptography: Start of a New Race.
Cryptogr.
Duc-Thuan Dam, Thai-Ha Tran, Van-Phuc Hoang, Cong-Kha Pham, Trong-Thuc Hoang
2023 J jnl
A cross-process Spectre attack via cache on RISC-V processor with trusted execution environment.
Comput. Electr. Eng.
Anh-Tien Le, Trong-Thuc Hoang, Ba-Anh Dao, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2023 J jnl
Design of an SoC Based on 32-Bit RISC-V Processor with Low-Latency Lightweight Cryptographic Cores in FPGA.
Future Internet
Khai-Minh Ma, Duc-Hung Le, Cong-Kha Pham, Trong-Thuc Hoang
2023 — conf
Dynamic Gold Code-Based Chaotic Clock for Cryptographic Designs to Counter Power Analysis Attacks.
ACM Great Lakes Symposium on VLSI
Thai-Ha Tran, Anh-Tien Le, Trong-Thuc Hoang, Van-Phuc Hoang, Cong-Kha Pham
2023 — conf
FPGA-Based Secured and Efficient Lightweight IoT Edge Devices with Customized RISC-V.
RIVF
Nguyen The Binh, Binh Kieu-Do-Nguyen, Trong-Thuc Hoang, Cong-Kha Pham, Cuong Pham-Quoc
2023 C conf
In-NVRAM Unified PUF and TRNG Based on Standard CMOS Technology.
ISCAS
Ronaldo Serrano, Marco Sarmiento, Ckristian Duran, Tuan-Kiet Dang, Trong-Thuc Hoang, Cong-Kha Pham
2023 J jnl
Multi-Functional Resource-Constrained Elliptic Curve Cryptographic Processor.
IEEE Access
Binh Kieu-Do-Nguyen, Cuong Pham-Quoc, Ngoc-Thinh Tran, Cong-Kha Pham, Trong-Thuc Hoang
2023 — conf
Revealing Secret Key from Low Success Rate Deep Learning-Based Side Channel Attacks.
MCSoC
Van-Phuc Hoang, Ngoc-Tuan Do, Trong-Thuc Hoang, Cong-Kha Pham
2023 J jnl
Transition Factors of Power Consumption Models for CPA Attacks on Cryptographic RISC-V SoC.
IEEE Trans. Computers
Thai-Ha Tran, Ba-Anh Dao, Trong-Thuc Hoang, Van-Phuc Hoang, Cong-Kha Pham
2022 — conf
A 3.65 Gb/s Area-Efficiency ChaCha20 Cryptocore.
ISOCC
Ronaldo Serrano, Marco Sarmiento, Ckristian Duran, Trong-Thuc Hoang, Cong-Kha Pham
2022 — conf
A Novel Ring Oscillator PUF for FPGA Based on Feedforward Ring Oscillators.
ISOCC
Tuan-Kiet Dang, Ronaldo Serrano, Trong-Thuc Hoang, Cong-Kha Pham
2022 J jnl
A Robust and Healthy Against PVT Variations TRNG Based on Frequency Collapse.
IEEE Access
Ronaldo Serrano, Ckristian Duran, Marco Sarmiento, Trong-Thuc Hoang, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2022 — conf
A System-on-Chip for IoT Applications with 16-bit Tiny Processor.
ICICDT
Tuan-Kiet Dang, Khai-Duy Nguyen, Quynh Nguyen Quang Nhu, Trong-Thuc Hoang, Cong-Kha Pham
2022 J jnl
A Unified PUF and Crypto Core Exploiting the Metastability in Latches.
Future Internet
Ronaldo Serrano, Ckristian Duran, Marco Sarmiento, Tuan-Kiet Dang, Trong-Thuc Hoang, Cong-Kha Pham
2022 J jnl
ChaCha20-Poly1305 Authenticated Encryption with Additional Data for Transport Layer Security 1.3.
Cryptogr.
Ronaldo Serrano, Ckristian Duran, Marco Sarmiento, Cong-Kha Pham, Trong-Thuc Hoang
2022 — conf
High-performance Multi-function HMAC-SHA2 FPGA Implementation.
NEWCAS
Binh Kieu-Do-Nguyen, Trong-Thuc Hoang, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2022 — conf
High-speed FPGA-based Design and Implementation of Text Search Processor.
ICICDT
Binh Kieu-Do-Nguyen, Tuan-Kiet Dang, Trong-Thuc Hoang, Katsumi Inoue, Toshinori Usugi, Masanori Odaka, Shuichi Kameyama, Cong-Kha Pham
2022 J jnl
Low-Cost Area-Efficient FPGA-Based Multi-Functional ECDSA/EdDSA.
Cryptogr.
Binh Kieu-Do-Nguyen, Cuong Pham-Quoc, Ngoc-Thinh Tran, Cong-Kha Pham, Trong-Thuc Hoang
2022 C conf
Spectre attack detection with Neutral Network on RISC-V processor.
ISCAS
Anh-Tien Le, Trong-Thuc Hoang, Ba-Anh Dao, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2022 J jnl
Systems on a Chip With 8 and 32 Bits Processors in 0.18-μm Technology for IoT Applications.
IEEE Trans. Circuits Syst. II Express Briefs
Marco Sarmiento, Khai-Duy Nguyen, Ckristian Duran, Ronaldo Serrano, Trong-Thuc Hoang, Koichiro Ishibashi, Cong-Kha Pham
2022 J jnl
Trusted Execution Environment Hardware by Isolated Heterogeneous Architecture for Key Scheduling.
IEEE Access
Trong-Thuc Hoang, Ckristian Duran, Ronaldo Serrano, Marco Sarmiento, Khai-Duy Nguyen, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2021 — conf
A CORDIC-based Trigonometric Hardware Accelerator with Custom Instruction in 32-bit RISC-V System-on-Chip.
HCS
Khai-Duy Nguyen, Tuan-Kiet Dang, Trong-Thuc Hoang, Quynh Nguyen Quang Nhu, Cong-Kha Pham
2021 J jnl
A Fully Digital True Random Number Generator With Entropy Source Based in Frequency Collapse.
IEEE Access
Ronaldo Serrano, Ckristian Duran, Trong-Thuc Hoang, Marco Sarmiento, Khai-Duy Nguyen, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2021 — conf
A Low-Power Low-Area SoC based in RISC-V Processor for IoT Applications.
ISOCC
Ronaldo Serrano, Marco Sarmiento, Ckristian Duran, Khai-Duy Nguyen, Trong-Thuc Hoang, Koichiro Ishibashi, Cong-Kha Pham
2021 J jnl
A Real-Time Cache Side-Channel Attack Detection System on RISC-V Out-of-Order Processor.
IEEE Access
Anh-Tien Le, Trong-Thuc Hoang, Ba-Anh Dao, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2021 J jnl
A Sub-μ W Reversed-Body-Bias 8-bit Processor on 65-nm Silicon-on-Thin-Box (SOTB) for IoT Applications.
IEEE Trans. Circuits Syst. II Express Briefs
Marco Sarmiento, Khai-Duy Nguyen, Ckristian Duran, Trong-Thuc Hoang, Ronaldo Serrano, Van-Phuc Hoang, Xuan-Tu Tran, Koichiro Ishibashi, Cong-Kha Pham
2021 J jnl
A proposal for enhancing training speed in deep learning models based on memory activity survey.
IEICE Electron. Express
Tuan-Kiet Dang, Binh Kieu-Do-Nguyen, Trong-Thuc Hoang, Khai-Duy Nguyen, Xuan-Tu Tran, Cong-Kha Pham
2021 J jnl
A trigonometric hardware acceleration in 32-bit RISC-V microcontroller with custom instruction.
IEICE Electron. Express
Khai-Duy Nguyen, Tuan-Kiet Dang, Trong-Thuc Hoang, Quynh Nguyen Quang Nhu, Xuan-Tu Tran, Cong-Kha Pham
2021 — conf
ChaCha20-Poly1305 Crypto Core Compatible with Transport Layer Security 1.3.
ISOCC
Ronaldo Serrano, Ckristian Duran, Trong-Thuc Hoang, Marco Sarmiento, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2021 J jnl
Correlation Power Analysis Attack Resisted Cryptographic RISC-V SoC With Random Dynamic Frequency Scaling Countermeasure.
IEEE Access
Ba-Anh Dao, Trong-Thuc Hoang, Anh-Tien Le, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2021 J jnl
Exploiting the Back-Gate Biasing Technique as a Countermeasure Against Power Analysis Attacks.
IEEE Access
Ba-Anh Dao, Trong-Thuc Hoang, Anh-Tien Le, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2021 — conf
System-on-Chip Implementation of Trusted Execution Environment with Heterogeneous Architecture.
HCS
Trong-Thuc Hoang, Ckristian Duran, Ronaldo Serrano, Marco Sarmiento, Khai-Duy Nguyen, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2020 J jnl
A 0.9-V 50-MHz 256-bit 1D-to-2D-based single/multi-match priority encoder with 0.67-nW standby power on 65-nm SOTB CMOS.
Microprocess. Microsystems
Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham
2020 C conf
Cryptographic Accelerators for Trusted Execution Environment in RISC-V Processors.
ISCAS
Trong-Thuc Hoang, Ckristian Duran, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2020 J jnl
Low-power high-performance 32-bit RISC-V microcontroller on 65-nm silicon-on-thin-BOX (SOTB).
IEICE Electron. Express
Trong-Thuc Hoang, Ckristian Duran, Khai-Duy Nguyen, Tuan-Kiet Dang, Quynh Nguyen Quang Nhu, Phuc Hong Than, Xuan-Tu Tran, Duc-Hung Le, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2020 J jnl
Quick Boot of Trusted Execution Environment With Hardware Accelerators.
IEEE Access
Trong-Thuc Hoang, Ckristian Duran, Duc-Thinh Nguyen-Hoang, Duc-Hung Le, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham
2019 — conf
A 0.75-V 32-MHz 181-µW SOTB-65nm Floating-point Twiddle Factor Using Adaptive CORDIC.
ICIT
Ngoc-Tu Bui, Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham
2019 J jnl
A 1.05-V 62-MHz with 0.12-nW standby power SOTB-65 nm chip of 32-point DCT based on adaptive CORDIC.
IEICE Electron. Express
Duc-Hung Le, Trong-Thuc Hoang, Cong-Kha Pham
2019 J jnl
A 1.2-V 162.9 pJ/cycle bitmap index creation core with 0.31-pW/bit standby power on 65-nm SOTB.
Microprocess. Microsystems
Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham
2019 C conf
A 1.2-V 90-MHz Bitmap Index Creation Accelerator with 0.27-nW Standby Power on 65-nm Silicon-On-Thin-Box (SOTB) CMOS.
ISCAS
Xuan-Thuan Nguyen, Trong-Thuc Hoang, Katsumi Inoue, Ngoc-Tu Bui, Van-Phuc Hoang, Cong-Kha Pham
2019 J jnl
An Efficient I/O Architecture for RAM-Based Content-Addressable Memory on FPGA.
IEEE Trans. Circuits Syst. II Express Briefs
Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham
2019 C conf
Live Demonstration: Real-Time Auto-Exposure Histogram Equalization Video-System using Frequent Items Counter.
ISCAS
Takahiro Hosaka, Trong-Thuc Hoang, Van-Phuc Hoang, Duc-Hung Le, Katsumi Inoue, Cong-Kha Pham
2019 J jnl
Low-Power Floating-Point Adaptive-CORDIC-Based FFT Twiddle Factor on 65-nm Silicon-on-Thin-BOX (SOTB) With Back-Gate Bias.
IEEE Trans. Circuits Syst. II Express Briefs
Trong-Thuc Hoang, Xuan-Thuan Nguyen, Duc-Hung Le, Cong-Kha Pham
2018 J jnl
A 1.2-V 162.9-pJ/cycle Bitmap Index Creation Core with 0.31-pW/bit Standby Power on 65-nm SOTB.
CoRR
Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham
2018 C conf
A 219-μW 1D-to-2D-Based Priority Encoder on 65-nm SOTB CMOS.
ISCAS
Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham
2018 J jnl
A CORDIC-based QR decomposition for MIMO signal detector.
IEICE Electron. Express
Hong-Thu Nguyen, Xuan-Thuan Nguyen, Trong-Thuc Hoang, Cong-Kha Pham
2018 J jnl
An Efficient I/O Architecture for RAM-based Content-Addressable Memory on FPGA.
CoRR
Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham
2018 J jnl
An FPGA-Based Hardware Accelerator for Energy-Efficient Bitmap Index Creation.
IEEE Access
Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham
2018 J jnl
An FPGA-Based Hardware Accelerator for Energy-Efficient Bitmap Index Creation.
CoRR
Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham
2018 J jnl
Frequent items counter based on binary decoders.
IEICE Electron. Express
Katsumi Inoue, Trong-Thuc Hoang, Cong-Kha Pham
2018 C conf
High-speed 8/16/32-point DCT Architecture Using Fixed-rotation Adaptive CORDIC.
ISCAS
Trong-Thuc Hoang, Cong-Kha Pham, Duc-Hung Le
2018 J jnl
Minimum adder-delay architecture of 8/16/32-point DCT based on fixed-rotation adaptive CORDIC.
IEICE Electron. Express
Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham
2018 — conf
VLSI Design of Floating-Point Twiddle Factor Using Adaptive CORDIC on Various Iteration Limitations.
MCSoC
Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham
2018 — conf
VLSI Design of Frequent Items Counting Using Binary Decoders Applied to 8-bit per Item Case-study.
PRIME
Katsumi Inoue, Trong-Thuc Hoang, Xuan-Thuan Nguyen, Hong-Thu Nguyen, Cong-Kha Pham
2017 — conf
FPGA-based frequent items counting using matrix of equality comparators.
MWSCAS
Trong-Thuc Hoang, Xuan-Thuan Nguyen, Hong-Thu Nguyen, Nhu-Quynh Truong, Duc-Hung Le, Katsumi Inoue, Cong-Kha Pham
2016 C conf
A hybrid adaptive CORDIC in 65nm SOTB CMOS process.
ISCAS
Trong-Thuc Hoang, Duc-Hung Le, Hong-Thu Nguyen, Xuan-Thuan Nguyen, Cong-Kha Pham
2016 C conf
An efficient FPGA-based database processor for fast database analytics.
ISCAS
Xuan-Thuan Nguyen, Hong-Thu Nguyen, Trong-Thuc Hoang, Katsumi Inoue, Osamu Shimojo, Toshio Murayama, Kenji Tominaga, Cong-Kha Pham
2015 J jnl
Design of co-processor for real-time HMM-based text-to-speech on hardware system applied to Vietnamese.
IEICE Electron. Express
Trong-Thuc Hoang, Hong-Kiet Su, Hieu-Binh Nguyen, Duc-Hung Le, Huu-Thuan Huynh, Trong-Tu Bui, Cong-Kha Pham
2015 J jnl
Low-resource low-latency hybrid adaptive CORDIC with floating-point precision.
IEICE Electron. Express
Hong-Thu Nguyen, Xuan-Thuan Nguyen, Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham