Toshiyuki Tsutsumi

22 papers A 4C 1Misc 2Journal 4Unranked 11
YearRankTypeTitle / Venue / Authors
2024 — conf
Visualization and Simulation of Any MPU Architecture Design with Meta-Instruction.
ISCIT
Tomoyuki Morimoto, Ziming Wang, Jiahui Luo, Sota Ogawa, Toshiyuki Tsutsumi
2023 — conf
Microprocessor Instruction Design Tool for RISC-V Architecture.
ISCIT
Jiahui Luo, Tomoyuki Morimoto, Tadahiro Ogita, Ryota Kawamata, Zi-Ming Wang, Toshiyuki Tsutsumi
2022 — conf
Initial Implementation and Utilization of Instruction Dynamic Simulation in MEIMAT.
ISCIT
Tadahiro Ogita, Tomoyuki Morimoto, Shunsuke Onogi, Ryota Kawamata, Ziming Wang, Toshiyuki Tsutsumi
2022 — conf
Visualization Tool of Microprocessor Instruction for Designing New Architecture with Meta-Instructions.
ISCIT
Tomoyuki Morimoto, Shunsuke Onogi, Tadahiro Ogita, Ryota Kawamata, Ziming Wang, Toshiyuki Tsutsumi
2019 — conf
Early Development of Visualization Tool for Instruction Implement of Microprocessor.
ISCIT
Tomoyuki Morimoto, Ryouhei Iwamoto, Toshiyuki Tsutsumi
2015 J jnl
Impacts of flexible
IEICE Electron. Express
Yasuhiro Ogasahara, Tadashi Nakagawa, Toshihiro Sekigawa, Toshiyuki Tsutsumi, Hanpei Koike
2013 — conf
Diagnosing Resistive Open Faults Using Small Delay Fault Simulation.
Asian Test Symposium
Koji Yamazaki, Toshiyuki Tsutsumi, Hiroshi Takahashi, Yoshinobu Higami, Hironobu Yotsuyanagi, Masaki Hashizume, Kewal K. Saluja
2013 A conf
Fully-functional FPGA prototype with fine-grain programmable body biasing.
FPGA
Masakazu Hioki, Toshihiro Sekigawa, Tadashi Nakagawa, Hanpei Koike, Yohei Matsumoto, Takashi Kawanami, Toshiyuki Tsutsumi
2010 C conf
Development of Pipeline Time Chart Too for Microprocessor Design Education.
ICCE
Tomoyuki Morimoto, Toshiyuki Tsutsumi
2009 Misc conf
A Novel Approach for Improving the Quality of Open Fault Diagnosis.
VLSI Design
Koji Yamazaki, Toshiyuki Tsutsumi, Hiroshi Takahashi, Yoshinobu Higami, Takashi Aikyo, Yuzo Takamatsu, Hiroyuki Yotsuyanagi, Masaki Hashizume
2009 Misc conf
Fault Effect of Open Faults Considering Adjacent Signal Lines in a 90 nm IC.
VLSI Design
Hiroyuki Yotsuyanagi, Masaki Hashizume, Toshiyuki Tsutsumi, Koji Yamazaki, Takashi Aikyo, Yoshinobu Higami, Hiroshi Takahashi, Yuzo Takamatsu
2009 — conf
New Class of Tests for Open Faults with Considering Adjacent Lines.
Asian Test Symposium
Hiroshi Takahashi, Yoshinobu Higami, Yuzo Takamatsu, Koji Yamazaki, Toshiyuki Tsutsumi, Hiroyuki Yotsuyanagi, Masaki Hashizume
2008 J jnl
Suppression of Intrinsic Delay Variation in FPGAs using Multiple Configurations.
ACM Trans. Reconfigurable Technol. Syst.
Yohei Matsumoto, Masakazu Hioki, Takashi Kawanami, Hanpei Koike, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa
2007 — conf
A Power Configurable Block Array Connected in Series as First Prototype Flex Power FPGA Chip.
FPT
Masakazu Hioki, Takashi Kawanami, Yohei Matsumoto, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike, Toshiyuki Tsutsumi
2007 — conf
Clues for Modeling and Diagnosing Open Faults with Considering Adjacent Lines.
ATS
Hiroshi Takahashi, Yoshinobu Higami, Shuhei Kadoyama, Takashi Aikyo, Yuzo Takamatsu, Koji Yamazaki, Toshiyuki Tsutsumi, Hiroyuki Yotsuyanagi, Masaki Hashizume
2007 J jnl
Optimization of the Body Bias Voltage Set (BBVS) for Flex Power FPGA.
IEICE Trans. Inf. Syst.
Takashi Kawanami, Masakazu Hioki, Yohei Matsumoto, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike
2007 A conf
Performance and yield enhancement of FPGAs with within-die variation using multiple configurations.
FPGA
Yohei Matsumoto, Masakazu Hioki, Takashi Kawanami, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike
2006 A conf
Evaluation of granularity on threshold voltage control in flex power FPGA.
FPGA
Masakazu Hioki, Takashi Kawanami, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike
2006 — conf
Evaluation of granularity on threshold voltage control in flex power FPGA.
FPT
Masakazu Hioki, Takashi Kawanami, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike
2006 — conf
Optimal set of body bias voltages for an FPGA with field-programmable V
FPT
Takashi Kawanami, Masakazu Hioki, Yohei Matsumoto, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike
2004 J jnl
Preliminary Evaluation of Flex Power FPGA: A Power Reconfigurable Architecture with Fine Granularity.
IEICE Trans. Inf. Syst.
Takashi Kawanami, Masakazu Hioki, Hiroshi Nagase, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike
2004 A conf
Preliminary performance analysis of flex power FPGA, a power reconfigurable device with fine granularity.
FPGA
Takashi Kawanami, Masakazu Hioki, Hiroshi Nagase, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike