Toshiyuki Inoue

38 papers Journal 6Unranked 32

Year	Rank	Type	Title / Venue / Authors
2024	J	`jnl`	A 16-Channel Optical Receiver Circuit for a Multicore Fiber-Based Co-Packaged Optics Module in a 65-nm CMOS Chip. IEEE Trans. Circuits Syst. II Express Briefs Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine, Yasuhiro Takahashi, Daisuke Ito, Makoto Nakamura
2024	—	`conf`	A 25-Gb/s Active Feedback Transimpedance Amplifier in 65-nm CMOS. ICEIC Yasuhiro Takahashi, Daisuke Ito, Makoto Nakamura, Akira Tsuchiya, Toshiyuki Inoue, Keiji Kishine
2024	—	`conf`	A Small-Area and Low-EPB Inductive-Peaking VCSEL Driver for a 65-nm CMOS Chip. SOCC Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine, Daisuke Ito, Yasuhiro Takahashi, Makoto Nakamura
2024	J	`jnl`	A burst-mode receiver with quick response and high consecutive identical digit tolerance for advanced intra-vehicle optical networks. Microelectron. J. Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine, Daisuke Ito, Yasuhiro Takahashi, Makoto Nakamura
2023	J	`jnl`	10Gb/s burst-mode driver circuit with on-chip bias switch for in-Vehicle optical networks. IEICE Electron. Express Daisuke Ito, Yasuhiro Takahashi, Makoto Nakamura, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine
2023	—	`conf`	4-ch 25-Gb/s Small and Low-power VCSEL Driver Circuit with Unbalanced CML in 65-nm CMOS. ISOCC Daisuke Ito, Yasuhiro Takahashi, Makoto Nakamura, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine
2023	—	`conf`	A 4×32-Gb/s VCSEL Driver with Adaptive Feedforward Equalization in 65-nm CMOS. ICECS Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine, Daisuke Ito, Yasuhiro Takahashi, Makoto Nakamura
2023	—	`conf`	High-Speed, Low-Power, and Small-Area Optical Receiver in 65-nm CMOS. ASICON Akira Tsuchiya, Toshiyuki Inoue, Keiji Kishine, Daisuke Ito, Yasuhiro Takahashi, Makoto Nakamura
2023	J	`jnl`	Low-power and small-area 4-ch 25-Gb/s transimpedance amplifiers in 65-nm CMOS process. IEICE Electron. Express Yasuhiro Takahashi, Daisuke Ito, Makoto Nakamura, Akira Tsuchiya, Toshiyuki Inoue, Keiji Kishine
2022	—	`conf`	A 28-Gb/s VCSEL Driver with Variable Output Impedance in 65-nm CMOS. MWSCAS Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine, Daisuke Ito, Yasuhiro Takahashi, Makoto Nakamura
2022	—	`conf`	A Burst-Mode TIA with Automatic Power Saving and DC Wander Reduction in 65-nm CMOS. ICECS 2022 Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine, Daisuke Ito, Yasuhiro Takahashi, Makoto Nakamura
2022	—	`conf`	A Fine-Tuning Phase Shifter with Vector Synthesizer Using 65-nm CMOS for Beamforming in 24-GHz Band. ICECS 2022 Masataka Inoue, Shinya Nakashioya, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine
2022	—	`conf`	A Method for Implementing LSTM-Based Multiple-People Identification System for Non-Contact Health Monitoring on Small-Scale FPGA. ISOCC Masanao Okamoto, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine
2022	—	`conf`	A Small-Area Integration of Optical Receiver Using Multi-Layer Inductors and Capacitor-Under-Pad. MWSCAS Akira Tsuchiya, Toshiyuki Inoue, Keiji Kishine, Yasuhiro Takahashi, Daisuke Ito, Makoto Nakamura
2022	—	`conf`	A preamplifier circuit with offset-voltage control technique for 50-Gb/s CMOS PAM4 receiver. ICEIC Masaya Miyabe, Toshiyuki Inoue, Masataka Inoue, Shinya Nakashioya, Akira Tsuchiya, Keiji Kishine
2022	—	`conf`	Capacitor Under Pad for Small Area Integration of High-Speed Signal-to-Differential Amplifier. ICEIC Akira Tsuchiya, Toshiyuki Inoue, Keiji Kishine, Yasuhiro Takahashi, Daisuke Ito, Makoto Nakamura
2022	—	`conf`	Memory-Access Optimization for Acceleration and Power Saving of FPGA-Based Image Processing. ISOCC Shungo Shimohane, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine
2022	—	`conf`	Method of Estimating Positions for Multiple People in Non-Contact Vital Signs Monitoring Systems. ICEIC Masaya Kashiwagi, Toshiyuki Inoue, Masanao Okamoto, Akira Tsuchiya, Keiji Kishine
2022	—	`conf`	Process Acceleration for HEVC Using Parallel Characteristics Calculation and Pixel Array Conversion. ICEIC Rei Yamazaki, Toshiyuki Inoue, Yuuki Teramura, Akira Tsuchiya, Keiji Kishine
2022	—	`conf`	Smart Computational Resource Distribution System with Automatic Classification Interface for CPS. ISOCC Yuuki Teramura, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine
2022	—	`conf`	Supply-Variation-Tolerant Transimpedance Amplifier Using Non-Inverting Amplifier in 180-nm CMOS. ASP-DAC Tomofumi Tsuchida, Akira Tsuchiya, Toshiyuki Inoue, Keiji Kishine
2021	—	`conf`	5-Gb/s PAM4 Transmitter IC Using Compensation Circuit in an 180-nm CMOS. ICEIC Yudai Ichii, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine
2021	—	`conf`	A Burst-Mode TIA with Adaptive Response and Stable Operation for in-Vehicle Optical Networks. ICECS Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine, Daisuke Ito, Yasuhiro Takahashi, Makoto Nakamura
2021	—	`conf`	Implementation of Low-Energy LSTM with Parallel and Pipelined Algorithm in Small-Scale FPGA. ICEIC Ukyo Yoshimura, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine
2021	—	`conf`	Supply Noise Reduction Filter for Parallel Integrated Transimpedance Amplifiers. ASP-DAC Shinya Tanimura, Akira Tsuchiya, Toshiyuki Inoue, Keiji Kishine
2020	—	`conf`	Processing Time Reduction for JPEG Compression Using Pixel Array Conversion. ISOCC Rei Yamazaki, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine
2019	—	`conf`	Design of Crosstalk Noise Filter for Multi-Channel Transimpedance Amplifier. SoCC Shinya Tanimura, Akira Tsuchiya, Ryosuke Noguchi, Toshiyuki Inoue, Keiji Kishine
2019	—	`conf`	Frequency Discriminator Using a Simple AD Converter for Interface Systems. ISOCC Sanshiro Kimura, Atsuto Imajo, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine
2019	J	`jnl`	Impact of On-Chip Inductor and Power-Delivery-Network Stacking on Signal and Power Integrity. IEICE Trans. Electron. Akira Tsuchiya, Akitaka Hiratsuka, Toshiyuki Inoue, Keiji Kishine, Hidetoshi Onodera
2019	—	`conf`	Optimization Technique of Memory Traffic for FPGA-Based Image Processing System. ISOCC Kenta Nishiguchi, Toshiyuki Inoue, Akira Tsuchiya, Kazunori Ogohara, Keiji Kishine
2019	—	`conf`	Suitable-Compensation Circuit Design for a PAM4 Transmitter in 180-nm CMOS. ISOCC Yudai Ichii, Ryosuke Noguchi, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine
2018	—	`conf`	A 25-Gb/s 13 mW clock and data recovery using C VLSI-DAT Ryosuke Noguchi, Kosuke Furuichi, Hiromu Uemura, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine, Hiroaki Katsurai, Shinsuke Nakano, Hideyuki Nosaka
2018	—	`conf`	A 25-Gb/s Low-Power Clock and Data Recovery with an Active-Stabilizing CML-CMOS Conversion. ICECS Ryosuke Noguchi, Atsuto Imajo, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine
2018	—	`conf`	Low-Power and High-Linearity Inductorless Low-Noise Amplifiers with Active-Shunt-Feedback in 65-nm CMOS Technology. MWSCAS Toshiyuki Inoue, Ryosuke Noguchi, Akira Tsuchiya, Keiji Kishine, Hidetoshi Onodera
2017	—	`conf`	Compact implementation IIR filter in FPGA for noise reduction of sensor signal. ISOCC Koki Arauchi, Shohei Maki, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine
2017	—	`conf`	Design method for inductorless low-noise amplifiers with active shunt-feedback in 65-nm CMOS. ISOCC Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine, Makoto Nakamura
2017	—	`conf`	FPGA-based transceiver circuit for labeling signal transmission system. ISOCC Kohei Nomura, Natsuyuki Koda, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine
2014	J	`jnl`	Fabrication of MgO: LiNbO IEICE Trans. Electron. Toshiyuki Inoue, Toshiaki Suhara