Toshio Kondo

30 papers A* 2A 1C 1Misc 2Journal 10Unranked 14
YearRankTypeTitle / Venue / Authors
2018 J jnl
Tile/line access cache memory based on a multi-level Z-order tiling data layout.
Concurr. Comput. Pract. Exp.
Baokang Wang, Yuki Fukazawa, Toshio Kondo, Takahiro Sasaki
2016 — conf
A Rapid Verification Framework for Developing Multi-core Processor.
CANDAR
Kouki Kayamuro, Takahiro Sasaki, Yuki Fukazawa, Toshio Kondo
2016 C conf
A cache memory with unit tile and line accessibility.
ICIS
Baokang Wang, Yuki Fukazawa, Toshio Kondo, Takahiro Sasaki
2016 — conf
A cache memory with unit tile and line accessibility.
HPCS
Baokang Wang, Yuki Fukazawa, Toshio Kondo, Takahiro Sasaki
2016 Misc conf
SIMD-based datapath with efficient operation structure for motion estimation.
ICASSP
Yuki Fukazawa, Keita Watanabe, Yuki Minoura, Toshio Kondo, Takahiro Sasaki
2015 — conf
An Architectural Framework of Snoopy Interconnection for Heterogeneous Cache Systems.
CANDAR
Seiji Miyoshi, Takahiro Sasaki, Yuki Fukazawa, Toshio Kondo
2015 — conf
Register Port Prediction for a Banked Register File.
CANDAR
Hiroaki Kawashima, Takahiro Sasaki, Yuki Fukazawa, Toshio Kondo
2014 — conf
Co-simulation framework for streamlining microprocessor development on standard ASIC design flow.
ASP-DAC
Tomoyuki Nakabayashi, Tomoyuki Sugiyama, Takahiro Sasaki, Eric Rotenberg, Toshio Kondo
2014 — conf
Detail Design and Evaluation of Fab Cache.
CANDAR
Takaki Okamoto, Tomoyuki Nakabayashi, Takahiro Sasaki, Toshio Kondo
2013 J jnl
Design and evaluation of fine-grain-mode transition method based on dynamic memory access analysing for variable stages pipeline processor.
IET Comput. Digit. Tech.
Takahiro Sasaki, Tomoyuki Nakabayashi, Kazumasa Nomura, Kazuhiko Ohno, Toshio Kondo
2013 — conf
Dynamic BTB Resizing for Variable Stages Superscalar Architecture.
CANDAR
Tomoyuki Nakabayashi, Takahiro Sasaki, Toshio Kondo
2013 J jnl
Energy Optimization using Fine-Grain Variable Stages Pipeline Processor Chip.
Int. J. Netw. Comput.
Tomoyuki Nakabayashi, Takahiro Sasaki, Hitoshi Nakamura, Kazuhiko Ohno, Toshio Kondo
2013 — conf
FabCache: Cache Design Automation for Heterogeneous Multi-core Processors.
CANDAR
Takaki Okamoto, Tomoyuki Nakabayashi, Takahiro Sasaki, Toshio Kondo
2012 J jnl
Design and evaluation of variable stages pipeline processor with low-energy techniques.
IET Comput. Digit. Tech.
Tomoyuki Nakabayashi, Takahiro Sasaki, I. K. Ohno, Toshio Kondo
2012 Misc conf
Measurement of Low-Energy Processor Chip Using Fine-Grain Variable Stages Pipeline Architecture.
ICNC
Tomoyuki Nakabayashi, Takahiro Sasaki, Kazuhiko Ohno, Toshio Kondo
2011 — conf
Design and evaluation of variable stages pipeline processor chip.
ASP-DAC
Tomoyuki Nakabayashi, Takahiro Sasaki, Kazuhiko Ohno, Toshio Kondo
2011 — conf
Low power semi-static TSPC D-FFs using split-output latch.
ISOCC
Tomoyuki Nakabayashi, Takahiro Sasaki, Kazuhiko Ohno, Toshio Kondo
2010 — conf
Design and Evaluation of Variable Stages Pipeline Processor Chip.
ISIA
Tomoyuki Nakabayashi, Takahiro Sasaki, Kazuhiko Ohno, Toshio Kondo
2010 — conf
Evaluation of Variable Level Cache.
ISIA
Nobuyuki Matsubara, Takahiro Sasaki, Kazuhiko Ohno, Toshio Kondo
2008 J jnl
Evaluation of low-energy and high-performance processor using variable stages pipeline technique.
IET Comput. Digit. Tech.
Takahiro Sasaki, Yuji Ichikawa, Tetsuo Hironaka, Toshiaki Kitamura, Toshio Kondo
2001 — conf
Low-power motion-estimation architecture based on a novel early-jump-out technique.
ISCAS (5)
Wujian Zhang, Runde Zhou, Toshio Kondo
1999 A conf
An MPEG-2 Video Encoder LSI with Scalability for HDTV based on Three-layer Cooperative Architecture.
DATE
Mitsuo Ikeda, Toshio Kondo, Koyo Nitta, Kazuhito Suguri, Takeshi Yoshitome, Toshihiro Minami, Jiro Naganuma, Takeshi Ogura
1999 J jnl
Concurrent and collaborative methodologies in short TAT LSI design and manufacturing.
Syst. Comput. Jpn.
Tsuneo Okubo, Mitsuo Ikeda, Yutaka Tashiro, Toshio Kondo, Ryota Kasai, Hiroshi Kotera, Tetsuma Sakurai
1999 J jnl
SuperENC: MPEG-2 video encoder chip.
IEEE Micro
Mitsuo Ikeda, Toshio Kondo, Koyo Nitta, Kazuhito Suguri, Takeshi Yoshitome, Toshihiro Minami, Hiroe Iwasaki, Katsuyuki Ochiai, Jiro Naganuma, Makoto Endo, Yutaka Tashiro, Hiroshi Watanabe, Naoki Kobayashi, Tsuneo Okubo, Ryota Kasai
1996 J jnl
A real-time motion estimation and compensation LSI with wide search range for MPEG2 video encoding.
IEEE J. Solid State Circuits
Kazuhito Suguri, Toshihiro Minami, Hiroaki Matsuda, Ritsu Kusaba, Toshio Kondo, Ryota Kasai, Takumi Watanabe, Hidenuri Sato, Nobutarou Shibata, Yutaka Tashiro, Takaaki Izuoka, Atsushi Shimizu, Hiroshi Kotera
1996 J jnl
Two-chip MPEG-2 video encoder.
IEEE Micro
Toshio Kondo, Kazuhito Suguri, Mitsuo Ikeda, Tetsuya Abe, Hiroaki Matsuda, Tsuneo Okubo, Kenji Ogura, Yutaka Tashiro, Naoki Ono, Toshihiro Minami, Ritsu Kusaba, Takeshi Ikenaga, Nobutaro Shibata, Ryota Kasai, Koji Otsu, Fumiaki Nakagawa, Yasuhiko Sato
1989 J jnl
Two-Dimensional Array Processor AAP2 and Its Programming Language.
Syst. Comput. Jpn.
Toshio Kondo, Yoshi Sugiyama, Takayoshi Nakashima
1986 A* conf
Automatic position findings of vehicle by means of laser.
ICRA
Kenichi Nishide, Moritomo Hanawa, Toshio Kondo
1986 A* conf
Pseudo MIMD Array Processor - AAP2.
ISCA
Toshio Kondo, Toshio Tsuchiya, Yoshihiro Kitamura, Yoshi Sugiyama, Takashi Kimura, Takayoshi Nakashima
1985 — conf
A large scale cellular array processor: AAP-1.
ACM Conference on Computer Science
Toshio Kondo, Tayoshi Nakashima, Toshio Tsuchiya, Yoshi Sugiyama, Tsuneta Sudo