Toshio Fujisawa

13 papers B 1Journal 7Unranked 5
YearRankTypeTitle / Venue / Authors
2023 — conf
Demonstration of Recovery Annealing on 7-Bits per Cell 3D Flash Memory at Cryogenic Operation for Bit Cost Scalability and Sustainability.
VLSI Technology and Circuits
Yuta Aiba, Yusuke Higashi, Hitomi Tanaka, Hiroki Tanaka, Fumie Kikushima, Toshio Fujisawa, Hideko Mukaida, Masayuki Miura, Tomoya Sanuki
2021 — conf
Bringing in Cryogenics to Storage: Characteristics and Performance Improvement of 3D Flash Memory.
IMW
Yuta Aiba, Hitomi Tanaka, Takashi Maeda, Keiichi Sawa, Fumie Kikushima, Masayuki Miura, Toshio Fujisawa, Mie Matsuo, Hideto Horii, Hideko Mukaida, Tomoya Sanuki
2014 — conf
19.3 66.3KIOPS-random-read 690MB/s-sequential-read universal Flash storage device controller with unified memory extension.
ISSCC
Konosuke Watanabe, Kenichiro Yoshii, Nobuhiro Kondo, Ken-ichi Maeda, Toshio Fujisawa, Junji Wadatsumi, Daisuke Miyashita, Shouhei Kousai, Yasuo Unekawa, Shinsuke Fujii, Takuma Aoyama, Takayuki Tamura, Atsushi Kunimatsu, Yukihito Oowaki
2011 — conf
A 7uW deep-sleep, ultra low-power WLAN baseband LSI for mobile applications.
COOL Chips
Daisuke Taki, Tatsuo Shiozawa, Kuniaki Ito, Youichiro Shiba, Kouji Horisaki, Hirotsugu Kajihara, Toshiyuki Yamagishi, Masahiro Sekiya, Akira Yamaga, Tetsuya Fujita, Hiroyuki Hara, Masanori Kuwahara, Toshio Fujisawa, Yasuo Unekawa
2011 — conf
A multimodal wireless baseband core using a coarse-grained dynamic reconfigurable processor.
COOL Chips
Hideki Yamada, Toshiyuki Yamagishi, Tomoya Suzuki, Kuniaki Ito, Koji Horisaki, Tom Vander Aa, Toshio Fujisawa, Liesbet Van der Perre, Yasuo Unekawa
2011 J jnl
High-Throughput, Low-Power Software-Defined Radio Using Reconfigurable Processors.
IEEE Micro
Tomoya Suzuki, Hideki Yamada, Toshiyuki Yamagishi, Daisuke Takeda, Koji Horisaki, Tom Vander Aa, Toshio Fujisawa, Liesbet Van der Perre, Yasuo Unekawa
2003 J jnl
A single-chip 802.11a MAC/PHY with a 32-b RISC processor.
IEEE J. Solid State Circuits
Toshio Fujisawa, Jun Hasegawa, Koji Tsuchie, Tatsuo Shiozawa, Tetsuya Fujita, Toshitada Saito, Yasuo Unekawa
1992 J jnl
Generation of Maximum Independent Sets of a Bipartite Graph and Maximum Cliques of a Circular-Arc Graph.
J. Algorithms
Toshinobu Kashiwabara, Sumio Masuda, Kazuo Nakajima, Toshio Fujisawa
1991 J jnl
Polynomial time algorithms on circular-arc overlap graphs.
Networks
Toshinobu Kashiwabara, Sumio Masuda, Kazuo Nakajima, Toshio Fujisawa
1990 J jnl
Crossing Minimization in Linear Embeddings of Graphs.
IEEE Trans. Computers
Sumio Masuda, Kazuo Nakajima, Toshinobu Kashiwabara, Toshio Fujisawa
1990 J jnl
Efficient algorithms for finding maximum cliques of an overlap graph.
Networks
Sumio Masuda, Kazuo Nakajima, Toshinobu Kashiwabara, Toshio Fujisawa
1981 J jnl
On Minimal Augmentation of a Graph to Obtain an Interval Graph.
J. Comput. Syst. Sci.
Tatsuo Ohtsuki, Hajimu Mori, Toshinobu Kashiwabara, Toshio Fujisawa
1979 B conf
One-dimensional logic gate assignment and interval graphs.
COMPSAC
Tatsuo Ohtsuki, Hajimu Mori, Ernest S. Kuh, Toshinobu Kashiwabara, Toshio Fujisawa