Toshiaki Kitamura

16 papers A* 3A 1B 1Journal 5Unranked 6
YearRankTypeTitle / Venue / Authors
2023 — conf
Automatic Deep Learning Parallelization for Vector Multicore Chips with the OSCAR Parallelizing and the TVM Open-Source Deep Learning Compiler.
LCPC
Fumiaki Onishi, Ryosei Otaka, Kazuki Fujita, Tomoki Suetsugu, Tohma Kawasumi, Toshiaki Kitamura, Hironori Kasahara, Keiji Kimura
2021 — conf
OSCAR Parallelizing and Power Reducing Compiler and API for Heterogeneous Multicores : (Invited Paper).
PEHC@SC
Hironori Kasahara, Keiji Kimura, Toshiaki Kitamura, Hiroki Mikami, Kazutaka Morita, Kazuki Fujita, Kazuki Yamamoto, Tohma Kawasumi
2020 — conf
A Transmission-Line-Based Cochlear Standing Wave Model To Elucidate Mechanism of Human Auditory System.
EMBC
Yasushi Horii, Airi Tamaki, Wenjia Hong, Toshiaki Kitamura, K. Wasano
2019 — conf
Cascaded DMA Controller for Speedup of Indirect Memory Access in Irregular Applications.
IA3@SC
Tomoya Kashimata, Toshiaki Kitamura, Keiji Kimura, Hironori Kasahara
2019 — conf
Possibility of Acoustic Resonance in Hair Cells in Human's Auditory System.
EMBC
Wenjia Hong, Airi Tamaki, Toshiaki Kitamura, Yasushi Horii
2012 J jnl
FDTD Analysis of a Near-Field Optical Disk with a Ridged-Square Nano-Aperture.
IEICE Trans. Electron.
Toshiaki Kitamura
2010 J jnl
Analysis of a Near-Field Optical Disk with an Acute-Edged Metallic Nano-Aperture.
IEICE Trans. Electron.
Toshiaki Kitamura, Shingo Iwata
2010 J jnl
Numerical Analysis of DWDD Disk with Control Layer.
IEICE Trans. Electron.
Toshiaki Kitamura, Yuya Matsunami
2008 J jnl
Evaluation of low-energy and high-performance processor using variable stages pipeline technique.
IET Comput. Digit. Tech.
Takahiro Sasaki, Yuji Ichikawa, Tetsuo Hironaka, Toshiaki Kitamura, Toshio Kondo
2007 J jnl
A MATLAB-Based Code Generator for Parallel Sparse Matrix Computations Utilizing PSBLAS.
IEICE Trans. Inf. Syst.
Taiji Sasaoka, Hideyuki Kawabata, Toshiaki Kitamura
2004 B conf
A MATLAB-Based Code Generator for Sparse Matrix Computations.
APLAS
Hideyuki Kawabata, Mutsumi Suzuki, Toshiaki Kitamura
2001 A* conf
A high-speed dynamic instruction scheduling scheme for superscalar processors.
MICRO
Masahiro Goshima, Kengo Nishino, Toshiaki Kitamura, Yasuhiko Nakashima, Shinji Tomita, Shin-ichiro Mori
1995 A conf
Scalar Processor of the VPP500 Parallel Supercomputer.
International Conference on Supercomputing
Yasuhiko Nakashima, Toshiaki Kitamura, Hideo Tamura, Masaaki Takiuchi, Ken'ichi Miura
1983 A* conf
A User-Microprogrammable, Local Host Computer With Low-Level Parallelism
ISCA
Shinji Tomita, Kiyoshi Shibayama, Toshiaki Kitamura, Toshiyuki Nakata, Hiroshi Hagiwara
1980 — conf
Performance Evaluation and Improvement of a Dynamically Microprogrammable Computer with Low-Level Parallelism.
IFIP Congress
Kiyoshi Shibayama, Shinji Tomita, Hiroshi Hagiwara, Katsuhiro Yamazaki, Toshiaki Kitamura
1980 A* conf
Performance evaluation and improvement of a dynamically microprogrammable computer with low-level parallelism.
MICRO
Shinji Tomita, Kiyoshi Shibayama, Toshiaki Kitamura, Hiroshi Hagiwara