Tor M. Aamodt - RankMe

109 papers A* 44A 3B 11Misc 2Journal 35Unranked 9

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Boosting Entropy with Bell Box Quantization. CoRR Ningfeng Yang, Tor M. Aamodt
2026	J	`jnl`	RoboGPU: Accelerating GPU Collision Detection for Robotics. CoRR Lufei Liu, Liwei Xue, Youssef Mohammed, Jocelyn Zhao, Yuan-Hsi Chou, Tor M. Aamodt
2025	J	`jnl`	Improving the Straight-Through Estimator with Zeroth-Order Information. CoRR Ningfeng Yang, Tor M. Aamodt
2025	A*	`conf`	Neural Encodings for Energy-Efficient Motion Planning. ICRA Jocelyn Zhao, Deval Shah, Tor M. Aamodt
2025	A*	`conf`	RayN: Ray Tracing Acceleration with Near-memory Computing. MICRO Mohammadreza Saed, Prashant J. Nair, Tor M. Aamodt
2025	A*	`conf`	ReFrame: Layer Caching for Accelerated Inference in Real-Time Rendering. ICML Lufei Liu, Tor M. Aamodt
2025	J	`jnl`	ReFrame: Layer Caching for Accelerated Inference in Real-Time Rendering. CoRR Lufei Liu, Tor M. Aamodt
2025	A*	`conf`	SHADOW: Simultaneous Multi-Threading Architecture with Asymmetric Threads. MICRO Ishita Chaturvedi, Bhargav Reddy Godala, Abiram Gangavaram, Daniel Flyer, Tyler Sorensen, Tor M. Aamodt, David I. August
2025	—	`conf`	Treelet Accelerated Ray Tracing on GPUs. ASPLOS (2) Yuan-Hsi Chou, Tor M. Aamodt
2024	J	`jnl`	Characterizing and Improving Resilience of Accelerators to Memory Errors in Autonomous Robots. ACM Trans. Cyber Phys. Syst. Deval Shah, Zi Yu Xue, Karthik Pattabiraman, Tor M. Aamodt
2024	A*	`conf`	Collision Prediction for Robotics Accelerators. ISCA Deval Shah, Tor M. Aamodt
2024	A*	`conf`	Generalizing Ray Tracing Accelerators for Tree Traversals on GPUs. MICRO Dongho Ha, Lufei Liu, Yuan-Hsi Chou, Seokjin Go, Won Woo Ro, Hung-Wei Tseng, Tor M. Aamodt
2024	A*	`conf`	GhOST: a GPU Out-of-Order Scheduling Technique for Stall Reduction. ISCA Ishita Chaturvedi, Bhargav Reddy Godala, Yucan Wu, Ziyang Xu, Konstantinos Iliakis, Panagiotis-Eleftherios Eleftherakis, Sotirios Xydis, Dimitrios Soudris, Tyler Sorensen, Simone Campanoni, Tor M. Aamodt, David I. August
2024	Misc	`conf`	Graph-Based Identification of Qubit Network (GidNET) for Qubit Reuse. QCE Gideon Uchehara, Tor M. Aamodt, Olivia Di Matteo
2024	A*	`conf`	Uncovering Real GPU NoC Characteristics: Implications on Interconnect Architecture. MICRO Zhixian Jin, Christopher Rocca, Jiho Kim, Hans Kasan, Minsoo Rhu, Ali Bakhoda, Tor M. Aamodt, John Kim
2024	B	`conf`	Zatel: Sample Complexity-Aware Scale-Model Simulation for Ray Tracing. ISPASS Davit Grigoryan, Yuan-Hsi Chou, Tor M. Aamodt
2023	A*	`conf`	Energy-Efficient Realtime Motion Planning. ISCA Deval Shah, Ningfeng Yang, Tor M. Aamodt
2023	A*	`conf`	Learning Label Encodings for Deep Regression. ICLR Deval Shah, Tor M. Aamodt
2023	J	`jnl`	Learning Label Encodings for Deep Regression. CoRR Deval Shah, Tor M. Aamodt
2023	—	`conf`	LumiBench: A Benchmark Suite for Hardware Ray Tracing. IISWC Lufei Liu, Mohammadreza Saed, Yuan-Hsi Chou, Davit Grigoryan, Tyler Nowicki, Tor M. Aamodt
2023	—	`ed.`	Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2, ASPLOS 2023, Vancouver, BC, Canada, March 25-29, 2023 ASPLOS (2) Tor M. Aamodt, Natalie D. Enright Jerger, Michael M. Swift
2023	—	`ed.`	Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3, ASPLOS 2023, Vancouver, BC, Canada, March 25-29, 2023 ASPLOS (3) Tor M. Aamodt, Natalie D. Enright Jerger, Michael M. Swift
2023	—	`ed.`	Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 4, ASPLOS 2023, Vancouver, BC, Canada, March 25-29, 2023 ASPLOS (4) Tor M. Aamodt, Michael M. Swift, Natalie D. Enright Jerger
2023	A*	`conf`	Treelet Prefetching For Ray Tracing. MICRO Yuan-Hsi Chou, Tyler Nowicki, Tor M. Aamodt
2022	A*	`conf`	Anticipating and eliminating redundant computations in accelerated sparse training. ISCA Jonathan S. Lew, Yunpeng Liu, Wenyi Gong, Negar Goli, R. David Evans, Tor M. Aamodt
2022	A*	`conf`	Label Encoding for Regression Networks. ICLR Deval Shah, Zi Yu Xue, Tor M. Aamodt
2022	J	`jnl`	Label Encoding for Regression Networks. CoRR Deval Shah, Zi Yu Xue, Tor M. Aamodt
2022	—	`ed.`	Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 1, ASPLOS 2023, Vancouver, BC, Canada, March 25-29, 2023 ASPLOS (1) Tor M. Aamodt, Natalie D. Enright Jerger, Michael M. Swift
2022	A*	`conf`	Vulkan-Sim: A GPU Architecture Simulator for Ray Tracing. MICRO Mohammadreza Saed, Yuan-Hsi Chou, Lufei Liu, Tyler Nowicki, Tor M. Aamodt
2021	A*	`conf`	AC-GC: Lossy Activation Compression with Guaranteed Convergence. NeurIPS R. David Evans, Tor M. Aamodt
2021	A*	`conf`	AccelWattch: A Power Modeling Framework for Modern GPUs. MICRO Vijay Kandiah, Scott Peverelle, Mahmoud Khairy, Junrui Pan, Amogh Manjunath, Timothy G. Rogers, Tor M. Aamodt, Nikos Hardavellas
2021	J	`jnl`	Characterizing and Improving the Resilience of Accelerators in Autonomous Robots. CoRR Deval Shah, Zi Yu Xue, Karthik Pattabiraman, Tor M. Aamodt
2021	A*	`conf`	Intersection Prediction for Accelerated GPU Ray Tracing. MICRO Lufei Liu, Wesley Chang, Francois Demoullin, Yuan-Hsi Chou, Mohammadreza Saed, David Pankratz, Tyler Nowicki, Tor M. Aamodt
2020	A*	`conf`	Accel-Sim: An Extensible Simulation Framework for Validated GPU Modeling. ISCA Mahmoud Khairy, Zhesheng Shen, Tor M. Aamodt, Timothy G. Rogers
2020	B	`conf`	Bandwidth Bottleneck in Network-on-Chip for High-Throughput Processors. PACT Jiho Kim, Sanghun Cho, Minsoo Rhu, Ali Bakhoda, Tor M. Aamodt, John Kim
2020	A*	`conf`	Deterministic Atomic Buffering. MICRO Yuan-Hsi Chou, Christopher Ng, Shaylin Cattell, Jeremy Intan, Matthew D. Sinclair, Joseph Devietti, Timothy G. Rogers, Tor M. Aamodt
2020	J	`jnl`	Energy Efficient On-Demand Dynamic Branch Prediction Models. IEEE Trans. Computers Milad Mohammadi, Song Han, Ehsan Atoofian, Amirali Baniasadi, Tor M. Aamodt, William J. Dally
2020	A*	`conf`	JPEG-ACT: Accelerating Deep Learning via Transform-based Lossy Compression. ISCA R. David Evans, Lufei Liu, Tor M. Aamodt
2020	A*	`conf`	ReSprop: Reuse Sparsified Backpropagation. CVPR Negar Goli, Tor M. Aamodt
2020	A*	`conf`	Sparse Weight Activation Training. NeurIPS Md Aamir Raihan, Tor M. Aamodt
2020	J	`jnl`	Sparse Weight Activation Training. CoRR Md Aamir Raihan, Tor M. Aamodt
2019	B	`conf`	A Detailed Model for Contemporary GPU Memory Systems. ISPASS Mahmoud Khairy, Akshay Jain, Tor M. Aamodt, Timothy G. Rogers
2019	B	`conf`	Analyzing Machine Learning Workloads Using a Detailed GPU Simulator. ISPASS Jonathan S. Lew, Deval A. Shah, Suchita Pati, Shaylin Cattell, Mengchi Zhang, Amruth Sandhupatla, Christopher Ng, Negar Goli, Matthew D. Sinclair, Timothy G. Rogers, Tor M. Aamodt
2019	B	`conf`	EDGE: Event-Driven GPU Execution. PACT Tayler Hicklin Hetherington, Maria Lubeznov, Deval Shah, Tor M. Aamodt
2019	A*	`conf`	Emerald: graphics modeling for SoC systems. ISCA Ayub A. Gubran, Tor M. Aamodt
2019	J	`jnl`	Hash-Based Ray Path Prediction: Skipping BVH Traversal Computation by Exploiting Ray Locality. CoRR Francois Demoullin, Ayub A. Gubran, Tor M. Aamodt
2019	B	`conf`	Modeling Deep Learning Accelerator Enabled GPUs. ISPASS Md Aamir Raihan, Negar Goli, Tor M. Aamodt
2019	J	`jnl`	Surface Compression Using Dynamic Color Palettes. CoRR Ayub A. Gubran, Felix Huang, Tor M. Aamodt
2018	J	`jnl`	Analyzing Machine Learning Workloads Using a Detailed GPU Simulator. CoRR Jonathan S. Lew, Deval Shah, Suchita Pati, Shaylin Cattell, Mengchi Zhang, Amruth Sandhupatla, Christopher Ng, Negar Goli, Matthew D. Sinclair, Timothy G. Rogers, Tor M. Aamodt
2018	J	`jnl`	Exploiting Typical Values to Accelerate Deep Learning. Computer Andreas Moshovos, Jorge Albericio, Patrick Judd, Alberto Delmas Lascorz, Sayeh Sharify, Zissis Poulos, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger
2018	J	`jnl`	Exploring Modern GPU Memory System Design Challenges through Accurate Modeling. CoRR Mahmoud Khairy, Akshay Jain, Tor M. Aamodt, Timothy G. Rogers
2018	—	`book`	General-Purpose Graphics Processor Architectures Tor M. Aamodt, Wilson Wai Lun Fung, Timothy G. Rogers
2018	—	`conf`	Identifying and Exploiting Ineffectual Computations to Enable Hardware Acceleration of Deep Learning. NEWCAS Andreas Moshovos, Jorge Albericio, Patrick Judd, Alberto Delmas, Sayeh Sharify, Mostafa Mahmoud, Tayler H. Hetherington, Milos Nikolic, Dylan Malone Stuart, Kevin Siu, Zissis Poulos, Tor M. Aamodt, Natalie D. Enright Jerger
2018	J	`jnl`	Modeling Deep Learning Accelerator Enabled GPUs. CoRR Md Aamir Raihan, Negar Goli, Tor M. Aamodt
2018	J	`jnl`	Proteus: Exploiting precision variability in deep neural networks. Parallel Comput. Patrick Judd, Jorge Albericio, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger, Raquel Urtasun, Andreas Moshovos
2018	J	`jnl`	Value-Based Deep-Learning Acceleration. IEEE Micro Andreas Moshovos, Jorge Albericio, Patrick Judd, Alberto Delmas Lascorz, Sayeh Sharify, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger
2018	A*	`conf`	Warp Scheduling for Fine-Grained Synchronization. HPCA Ahmed ElTantawy, Tor M. Aamodt
2017	—	`conf`	A state machine block for high-level synthesis. FPT Shadi Assadikhomami, Jennifer Ongko, Tor M. Aamodt
2017	J	`jnl`	CG-OoO: Energy-Efficient Coarse-Grain Out-of-Order Execution Near In-Order Energy with Near Out-of-Order Performance. ACM Trans. Archit. Code Optim. Milad Mohammadi, Tor M. Aamodt, William J. Dally
2017	J	`jnl`	HoLiSwap: Reducing Wire Energy in L1 Caches. CoRR Yatish Turakhia, Subhasis Das, Tor M. Aamodt, William J. Dally
2016	J	`jnl`	CG-OoO: Energy-Efficient Coarse-Grain Out-of-Order Execution. CoRR Milad Mohammadi, Tor M. Aamodt, William J. Dally
2016	A*	`conf`	Cnvlutin: Ineffectual-Neuron-Free Deep Neural Network Computing. ISCA Jorge Albericio, Patrick Judd, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger, Andreas Moshovos
2016	J	`jnl`	Inter-Core Locality Aware Memory Scheduling. IEEE Comput. Archit. Lett. Dongdong Li, Tor M. Aamodt
2016	A*	`conf`	MIMD synchronization on SIMT architectures. MICRO Ahmed ElTantawy, Tor M. Aamodt
2016	A	`conf`	Proteus: Exploiting Numerical Precision Variability in Deep Neural Networks. ICS Patrick Judd, Jorge Albericio, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger, Andreas Moshovos
2016	J	`jnl`	Reuse Distance-Based Probabilistic Cache Replacement. ACM Trans. Archit. Code Optim. Subhasis Das, Tor M. Aamodt, William J. Dally
2016	A*	`conf`	Stripes: Bit-serial deep neural network computing. MICRO Patrick Judd, Jorge Albericio, Tayler H. Hetherington, Tor M. Aamodt, Andreas Moshovos
2015	—	`conf`	MemcachedGPU: scaling-up scale-out key-value stores. SoCC Tayler H. Hetherington, Mike O'Connor, Tor M. Aamodt
2015	J	`jnl`	On-Demand Dynamic Branch Prediction. IEEE Comput. Archit. Lett. Milad Mohammadi, Song Han, Tor M. Aamodt, William J. Dally
2015	J	`jnl`	Reduced-Precision Strategies for Bounded Memory in Deep Neural Nets. CoRR Patrick Judd, Jorge Albericio, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger, Raquel Urtasun, Andreas Moshovos
2015	A*	`conf`	SLIP: reducing wire energy in the memory hierarchy. ISCA Subhasis Das, Tor M. Aamodt, William J. Dally
2014	A*	`conf`	A scalable multi-path microarchitecture for efficient GPU control flow. HPCA Ahmed ElTantawy, Jessica Wenjie Ma, Mike O'Connor, Tor M. Aamodt
2014	J	`jnl`	Cache Coherence for GPU Architectures. IEEE Micro Inderpreet Singh, Arrvindh Shriraman, Wilson W. L. Fung, Mike O'Connor, Tor M. Aamodt
2014	J	`jnl`	Learning your limit: managing massively multithreaded caches through scheduling. Commun. ACM Timothy G. Rogers, Mike O'Connor, Tor M. Aamodt
2014	—	`conf`	Scaling usable computing capability. ICSAMOS Tor M. Aamodt
2013	A*	`conf`	Cache coherence for GPU architectures. HPCA Inderpreet Singh, Arrvindh Shriraman, Wilson W. L. Fung, Mike O'Connor, Tor M. Aamodt
2013	J	`jnl`	Cache-Conscious Thread Scheduling for Massively Multithreaded Processors. IEEE Micro Timothy G. Rogers, Mike O'Connor, Tor M. Aamodt
2013	A	`conf`	Characterizing the performance benefits of fused CPU/GPU systems using FusionSim. DATE Vitaly Zakharenko, Tor M. Aamodt, Andreas Moshovos
2013	J	`jnl`	Designing on-chip networks for throughput accelerators. ACM Trans. Archit. Code Optim. Ali Bakhoda, John Kim, Tor M. Aamodt
2013	A*	`conf`	Divergence-aware warp scheduling. MICRO Timothy G. Rogers, Mike O'Connor, Tor M. Aamodt
2013	A*	`conf`	Energy efficient GPU transactional memory via space-time optimizations. MICRO Wilson W. L. Fung, Tor M. Aamodt
2013	A*	`conf`	GPUDet: a deterministic GPU architecture. ASPLOS Hadi Jooybar, Wilson W. L. Fung, Mike O'Connor, Joseph Devietti, Tor M. Aamodt
2013	A*	`conf`	GPUWattch: enabling energy optimizations in GPGPUs. ISCA Jingwen Leng, Tayler H. Hetherington, Ahmed ElTantawy, Syed Zohaib Gilani, Nam Sung Kim, Tor M. Aamodt, Vijay Janapa Reddi
2012	A*	`conf`	Cache-Conscious Wavefront Scheduling. MICRO Timothy G. Rogers, Mike O'Connor, Tor M. Aamodt
2012	B	`conf`	Characterizing and evaluating a key-value store application on heterogeneous CPU-GPU systems. ISPASS Tayler H. Hetherington, Timothy G. Rogers, Lisa Hsu, Mike O'Connor, Tor M. Aamodt
2012	J	`jnl`	Formal-Analysis-Based Trace Computation for Post-Silicon Debug. IEEE Trans. Very Large Scale Integr. Syst. Marcel Gort, Flavio M. de Paula, Johnny J. W. Kuan, Tor M. Aamodt, Alan J. Hu, Steven J. E. Wilton, Jin Yang
2012	J	`jnl`	Kilo TM: Hardware Transactional Memory for GPU Architectures. IEEE Micro Wilson Wai Lun Fung, Inderpreet Singh, Andrew Brownsword, Tor M. Aamodt
2012	J	`jnl`	Modeling Cache Contention and Throughput of Multiprogrammed Manycore Processors. IEEE Trans. Computers Xi E. Chen, Tor M. Aamodt
2012	—	`conf`	Progressive-BackSpace: Efficient Predecessor Computation for Post-Silicon Debug. MTV Johnny J. W. Kuan, Tor M. Aamodt
2012	—	`conf`	Small virtual channel routers on FPGAs through block RAM sharing. FPT Jimmy Kwa, Tor M. Aamodt
2011	A*	`conf`	Hardware transactional memory for GPU architectures. MICRO Wilson W. L. Fung, Inderpreet Singh, Andrew Brownsword, Tor M. Aamodt
2011	J	`jnl`	Hybrid analytical modeling of pending cache hits, data prefetching, and MSHRs. ACM Trans. Archit. Code Optim. Xi E. Chen, Tor M. Aamodt
2011	A*	`conf`	Thread block compaction for efficient SIMT control flow. HPCA Wilson W. L. Fung, Tor M. Aamodt
2010	—	`conf`	Accelerating trace computation in post-silicon debug. ISQED Johnny J. W. Kuan, Steven J. E. Wilton, Tor M. Aamodt
2010	B	`conf`	On-chip network design considerations for compute accelerators. PACT Ali Bakhoda, John Kim, Tor M. Aamodt
2010	A*	`conf`	Throughput-Effective On-Chip Networks for Manycore Accelerators. MICRO Ali Bakhoda, John Kim, Tor M. Aamodt
2010	B	`conf`	Visualizing complex dynamics in many-core accelerator architectures. ISPASS Aaron Ariel, Wilson W. L. Fung, Andrew E. Turner, Tor M. Aamodt
2009	A*	`conf`	A first-order fine-grained multithreaded throughput model. HPCA Xi E. Chen, Tor M. Aamodt
2009	B	`conf`	Analyzing CUDA workloads using a detailed GPU simulator. ISPASS Ali Bakhoda, George L. Yuan, Wilson W. L. Fung, Henry Wong, Tor M. Aamodt
2009	A*	`conf`	Complexity effective memory access scheduling for many-core accelerator architectures. MICRO George L. Yuan, Ali Bakhoda, Tor M. Aamodt
2009	J	`jnl`	Dynamic warp formation: Efficient MIMD control flow on SIMD graphics hardware. ACM Trans. Archit. Code Optim. Wilson W. L. Fung, Ivan Sham, George L. Yuan, Tor M. Aamodt
2008	J	`jnl`	Compile-time and instruction-set methods for improving floating- to fixed-point conversion accuracy. ACM Trans. Embed. Comput. Syst. Tor M. Aamodt, Paul Chow
2008	A*	`conf`	Hybrid analytical modeling of pending cache hits, data prefetching, and MSHRs. MICRO Xi E. Chen, Tor M. Aamodt
2008	B	`conf`	Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor. PACT Henry Wong, Anne Bracy, Ethan Schuchman, Tor M. Aamodt, Jamison D. Collins, Perry H. Wang, Gautham N. Chinya, Ankur Khandelwal Groen, Hong Jiang, Hong Wang
2007	A*	`conf`	Dynamic Warp Formation and Scheduling for Efficient GPU Control Flow. MICRO Wilson W. L. Fung, Ivan Sham, George L. Yuan, Tor M. Aamodt
2007	A	`conf`	Optimization of data prefetch helper threads with path-expression based statistical modeling. ICS Tor M. Aamodt, Paul Chow
2004	A*	`conf`	Hardware Support for Prescient Instruction Prefetch. HPCA Tor M. Aamodt, Paul Chow, Per Hammarlund, Hong Wang, John Paul Shen
2003	A*	`conf`	A framework for modeling and optimization of prescient instruction prefetch. SIGMETRICS Tor M. Aamodt, Pedro Marcuello, Paul Chow, Antonio González, Per Hammarlund, Hong Wang, John Paul Shen
2000	Misc	`conf`	Embedded ISA support for enhanced floating-point to fixed-point ANSI-C compilation. CASES Tor M. Aamodt, Paul Chow