Tong-Yu Hsieh

52 papers A 3B 2C 3Misc 2Journal 19Unranked 23
YearRankTypeTitle / Venue / Authors
2026 J jnl
A Highly Cost-Effective Online Error Detection and Mitigation Scheme for CNN Hardware Accelerators Based on Approximate PE.
ACM Trans. Design Autom. Electr. Syst.
Wei-Ji Chao, Yen-Chieh Tseng, Tong-Yu Hsieh
2025 — conf
Application-Aware Early-Exit Fault Classification for Video Decoder Using Miter-Based Analysis.
ATS
Jun-Tsung Wu, Tong-Yu Hsieh
2025 — conf
Monitor-Like Efficiency with Detector-Level Accuracy: Frontier-Aligned Timing Monitor for AI Accelerators.
ITC-Asia
Wei-Ji Chao, Tsung-Chun Chen, Chu-Cheng Chen, Tong-Yu Hsieh
2024 — conf
On Accuracy Enhancement of No-Reference Error-Tolerability Testing for Images in Object Detection Applications Based on RGB Channel Characteristics.
ITC-Asia
Jun-Tsung Wu, Hideyuki Ichihara, Tomoo Inoue, Tong-Yu Hsieh
2023 — conf
Cost-Effective Error-Mitigation for High Memory Error Rate of DNN: A Case Study on YOLOv4.
ITC-Asia
Wei-Ji Chao, Tong-Yu Hsieh
2023 J jnl
On Development of Reliable Machine Learning Systems Based on Machine Error Tolerance of Input Images.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Tong-Yu Hsieh, Chun-Chao Cheng, Wei-Ji Chao, Pin-Xuan Wu
2022 — conf
On No-Reference Error Detection of an Image Stitching System Based on Error-Tolerance.
ATS
Tong-Yu Hsieh, Pao-Wei Tsui, Jun-Tsung Wu
2021 C conf
Concurrent Test of Reconfigurable Scan Networks for Self-Aware Systems.
IOLTS
Chih-Hao Wang, Natalia Lylina, Ahmed Atteya, Tong-Yu Hsieh, Hans-Joachim Wunderlich
2021 — conf
Investigation on Error-Tolerability Enhancement of Videos via Re-Encoding for Computer Vision: A Case Study on Object Detection.
ICCE-TW
Tong-Yu Hsieh, Jun-Tsung Wu
2020 — conf
A Self-Detection and Self-Repair Methodology for Reliable Speech Recognition Considering AWGN Noises.
ITC-Asia
Tong-Yu Hsieh, Yu-Min Chung
2020 J jnl
An Implication-based Test Scheme for Both Diagnosis and Concurrent Error Detection Applications.
ACM Trans. Design Autom. Electr. Syst.
Chih-Hao Wang, Tong-Yu Hsieh
2020 — conf
Cost-Effective Reliable Edge Computing Hardware Design Based on Module Simplification and Duplication: A Case Study on Vehicle Detection Based on Support Vector Machine.
VLSI-DAT
Tong-Yu Hsieh, Hsin-Yung Shen, Chia-Teng Hsu
2020 Misc conf
On Classification of Acceptable Images for Reliable Artificial Intelligence Systems: A Case Study on Pedestrian Detection.
VTS
Tong-Yu Hsieh, Pin-Xuan Wu, Chun-Chao Cheng
2020 — conf
On Enhancing Error-Tolerability of Videos via Re-Encoding with Adaptive I-Frame Insertion.
ITC-Asia
Tong-Yu Hsieh, Chen-Chia Chung, Jun-Tsung Wu
2019 — conf
A Delay-Aware Implementation Scheme for Cost-Effective Implication-Based Concurrent Error Detection.
ITC-Asia
Tong-Yu Hsieh, Kuang-Chun Lin, Hsin-Hsien Lin
2019 — conf
On Automatic Generation of Training Images for Machine Learning in Automotive Applications.
AICAS
Tong-Yu Hsieh, Yuan-cheng Lin, Hsin-Yung Shen
2018 — conf
A No-Reference Error-Tolerability Test Methodology for Image Processing Applications.
ITC-Asia
Tong-Yu Hsieh, Chao-Ru Chen
2018 — conf
Error Indication Signal Collapsing for Implication-Based Concurrent Error Detection.
ITC-Asia
Chih-Hao Wang, Chi-Hsuan Ho, Tong-Yu Hsieh
2018 J jnl
On Probability of Detection Lossless Concurrent Error Detection Based on Implications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chih-Hao Wang, Tong-Yu Hsieh
2018 B conf
On no-reference on-line error-tolerability testing for videos.
ETS
Tong-Yu Hsieh, Shang-En Chan, Chi-Hsuan Ho
2018 J jnl
Structural Variance-Based Error-Tolerability Test Method for Image Processing Applications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Tong-Yu Hsieh, Yi-Han Peng, Kuan-Chih Cheng
2017 J jnl
A fault-analysis oriented re-design and cost-effectiveness evaluation methodology for error tolerant applications.
Microelectron. J.
Tong-Yu Hsieh, Kuan-Hsien Li, Chen-Chia Chung
2017 — conf
A hybrid concurrent error detection scheme for simultaneous improvement on probability of detection and diagnosability.
ITC-Asia
Chih-Hao Wang, Tong-Yu Hsieh
2017 J jnl
Cost-Effective Enhancement on Both Yield and Reliability for Cache Designs Based on Performance Degradation Tolerance.
IEEE Trans. Very Large Scale Integr. Syst.
Tong-Yu Hsieh, Tsung-Liang Chih, Mei-Jung Wu
2017 — conf
Error-Tolerability Evaluation and Test for Images in Face Detection Applications.
ATS
Tong-Yu Hsieh, Tai-Ang Cheng, Chao-Ru Chen
2016 J jnl
A Performance Degradation Tolerable Cache Design by Exploiting Memory Hierarchies.
IEEE Trans. Very Large Scale Integr. Syst.
Tong-Yu Hsieh, Chih-Hao Wang, Tsung-Liang Chih, Ya-Hsiu Chi
2016 J jnl
An Area-Efficient Scalable Test Module to Support Low Pin-Count Testing.
IEICE Trans. Electron.
Tong-Yu Hsieh, Tai-Ping Wang, Shuo Yang, Chin-An Hsu, Yi-Lung Lin
2015 C conf
Filtering-based error-tolerability evaluation of image processing circuits.
IOLTS
Tong-Yu Hsieh, Yi-Han Peng
2015 J jnl
Performance Degradation Tolerance Analysis and Design for Effective Yield Enhancement.
J. Electron. Test.
Tong-Yu Hsieh, Chih-Hao Wang, Chun-Wei Kuo, Shu-Yu Huang, Tsung-Liang Chih
2014 J jnl
Efficient Error-Tolerability Testing on Image Processing Circuits Based on Equivalent Error Rate Transformation.
J. Electron. Test.
Tong-Yu Hsieh, Yi-Han Peng, Kuan-Hsien Li
2014 J jnl
Efficient LFSR Reseeding Based on Internal-Response Feedback.
J. Electron. Test.
Wei-Cheng Lien, Kuen-Jong Lee, Tong-Yu Hsieh, Krishnendu Chakrabarty
2014 — conf
On efficient error-tolerability evaluation and maximization for image processing applications.
VLSI-DAT
Tong-Yu Hsieh, Kuan-Hsien Li, Yi-Han Peng
2014 — conf
Output selection for test response compaction based on multiple counters.
VLSI-DAT
Wei-Cheng Lien, Kuen-Jong Lee, Krishnendu Chakrabarty, Tong-Yu Hsieh
2014 B conf
Output-bit selection with X-avoidance using multiple counters for test-response compaction.
ETS
Wei-Cheng Lien, Kuen-Jong Lee, Krishnendu Chakrabarty, Tong-Yu Hsieh
2013 — conf
A New LFSR Reseeding Scheme via Internal Response Feedback.
Asian Test Symposium
Wei-Cheng Lien, Kuen-Jong Lee, Tong-Yu Hsieh, Krishnendu Chakrabarty
2013 J jnl
An Efficient On-Chip Test Generation Scheme Based on Programmable and Multiple Twisted-Ring Counters.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Wei-Cheng Lien, Kuen-Jong Lee, Tong-Yu Hsieh, Wee-Lung Ang
2013 — conf
An Efficient Test Methodology for Image Processing Applications Based on Error-Tolerance.
Asian Test Symposium
Tong-Yu Hsieh, Yi-Han Peng, Chia-Chi Ku
2013 J jnl
Counter-Based Output Selection for Test Response Compaction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Wei-Cheng Lien, Kuen-Jong Lee, Tong-Yu Hsieh, Krishnendu Chakrabarty, Yu-Hua Wu
2012 — conf
A Test-Per-Clock LFSR Reseeding Algorithm for Concurrent Reduction on Test Sequence Length and Test Data Volume.
Asian Test Symposium
Wei-Cheng Lien, Kuen-Jong Lee, Tong-Yu Hsieh
2012 — conf
A yield and reliability enhancement framework for image processing applications.
APCCAS
Tong-Yu Hsieh, Chia-Chi Ku, Chia-Hung Yeh
2012 C conf
Accumulator-based output selection for test response compaction.
ISCAS
Wei-Cheng Lien, Kuen-Jong Lee, Tong-Yu Hsieh, Shih-Shiun Chien, Krishnendu Chakrabarty
2012 J jnl
Efficient Overdetection Elimination of Acceptable Faults for Yield Improvement.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Kuen-Jong Lee, Tong-Yu Hsieh, Melvin A. Breuer
2012 — conf
Routing-efficient implementation of an internal-response-based BIST architecture.
VLSI-DAT
Wei-Cheng Lien, Tong-Yu Hsieh, Kuen-Jong Lee
2011 J jnl
An Error-Tolerance-Based Test Methodology to Support Product Grading for Yield Enhancement.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Tong-Yu Hsieh, Kuen-Jong Lee, Melvin A. Breuer
2011 J jnl
Test Response Compaction via Output Bit Selection.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Kuen-Jong Lee, Wei-Cheng Lien, Tong-Yu Hsieh
2010 J jnl
On-Chip SOC Test Platform Design Based on IEEE 1500 Standard.
IEEE Trans. Very Large Scale Integr. Syst.
Kuen-Jong Lee, Tong-Yu Hsieh, Chin-Yao Chang, Yu-Ting Hong, Wen-Cheng Huang
2009 A conf
Tolerance of performance degrading faults for effective yield improvement.
ITC
Tong-Yu Hsieh, Melvin A. Breuer, Murali Annavaram, Sandeep K. Gupta, Kuen-Jong Lee
2008 J jnl
An Error Rate Based Test Methodology to Support Error-Tolerance.
IEEE Trans. Reliab.
Tong-Yu Hsieh, Kuen-Jong Lee, Melvin A. Breuer
2007 A conf
Reduction of detected acceptable faults for yield improvement via error-tolerance.
DATE
Tong-Yu Hsieh, Kuen-Jong Lee, Melvin A. Breuer
2007 — conf
Test Efficiency Analysis and Improvement of SOC Test Platforms.
ATS
Tong-Yu Hsieh, Kuen-Jong Lee, Jian-Jhih You
2006 Misc conf
An Error-Oriented Test Methodology to Improve Yield with Error-Tolerance.
VTS
Tong-Yu Hsieh, Kuen-Jong Lee, Melvin A. Breuer
2005 A conf
A novel test methodology based on error-rate to support error-tolerance.
ITC
Kuen-Jong Lee, Tong-Yu Hsieh, Melvin A. Breuer