Tomohiro Ueno - RankMe

48 papers B 1C 4Journal 12Unranked 30

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	A case study in hardware specialization for Monte Carlo cross-section lookup. Parallel Comput. Kazutomo Yoshii, John R. Tramm, Bryce Allen, Tomohiro Ueno, Kentaro Sano, Andrew R. Siegel, Pete Beckman
2026	—	`conf`	Performance and Area Optimization of Lossless Hardware Compression of Floating-Point Data Streams. SCA/HPC Asia Workshops Linyi Li, Jason Anderson, Tomohiro Ueno
2025	—	`conf`	Evaluation of Trade-Off Between Compression Ratio and Hardware Cost for Adaptive Bandwidth Compression Hardware Platform. COOL CHIPS Tomohiro Ueno, Kaito Kitazume, Masato Kiyama, Kazutomo Yoshii, Kento Sato, Norihisa Fujita, Ryohei Kobayashi, Taisuke Boku, Kentaro Sano
2025	—	`conf`	Impact of Reconvergent DFG Paths and Buffer Depth on Elastic CGRA Throughput. HEART Yasuto Aihara, Boma Anantasatya Adhi, Kota Aiyoshi, Chenlin Shi, Jason Anderson, Tomohiro Ueno, Kentaro Sano, Takaaki Miyajima
2025	J	`jnl`	Multifacets of lossy compression for scientific data in the Joint-Laboratory of Extreme Scale Computing. Future Gener. Comput. Syst. Franck Cappello, Mario C. Acosta, Emmanuel Agullo, Hartwig Anzt, Jon Calhoun, Sheng Di, Luc Giraud, Thomas Grützmacher, Sian Jin, Kentaro Sano, Kento Sato, Amarjit Singh, Dingwen Tao, Jiannan Tian, Tomohiro Ueno, Robert Underwood, Frédéric Vivien, Xavier Yepes, Kazutomo Yoshii, Boyuan Zhang
2025	—	`ed.`	Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, HEART 2025, Kumamoto, Japan, May 26-28, 2025 HEART Tomohiro Ueno, Ameer Abdelhadi, Dirk Koch, Yasunori Osana, Yukinori Sato
2024	C	`conf`	A Productive HLS Simulation Approach for Multi-FPGA Systems. ICCE Haruto Ikehara, Taito Manabe, Yuichiro Shibata, Tomohiro Ueno, Kentaro Sano
2024	J	`jnl`	Automated parallel execution of distributed task graphs with FPGA clusters. Future Gener. Comput. Syst. Juan Miguel De Haro Ruiz, Carlos Álvarez-Martínez, Daniel Jiménez-González, Xavier Martorell, Tomohiro Ueno, Kentaro Sano, Burkhard Ringlein, François Abel, Beat Weiss
2024	C	`conf`	Flexible Systolic Array Platform on Virtual 2-D Multi-FPGA Plane. HPC Asia Tomohiro Ueno, Emanuele Del Sozzo, Kentaro Sano
2024	C	`conf`	HLS Implementation of a Building Cube Stencil Computation Framework for an FPGA Accelerator. ICCE Daiki Furukawa, Taito Manabe, Yuichiro Shibata, Tomohiro Ueno, Kentaro Sano
2023	C	`conf`	ESSPER: Elastic and Scalable FPGA-Cluster System for High-Performance Reconfigurable Computing with Supercomputer Fugaku. HPC Asia Kentaro Sano, Atsushi Koshiba, Takaaki Miyajima, Tomohiro Ueno
2023	—	`conf`	Hardware Specialization: Estimating Monte Carlo Cross-Section Lookup Kernel Performance and Area. SC Workshops Kazutomo Yoshii, John R. Tramm, Bryce Allen, Tomohiro Ueno, Kentaro Sano, Andrew R. Siegel, Pete Beckman
2023	—	`conf`	Less for More: Reducing Intra-CGRA Connectivity for Higher Performance and Efficiency in HPC. IPDPS Workshops Boma A. Adhi, Carlos Cortes, Emanuele Del Sozzo, Tomohiro Ueno, Yiyu Tan, Takuya Kojima, Artur Podobas, Kentaro Sano
2023	—	`conf`	Streaming Hardware Compressor Generator Framework. SC Workshops Kazutomo Yoshii, Tomohiro Ueno, Kentaro Sano, Antonino Miceli, Franck Cappello
2023	J	`jnl`	VCSN: Virtual Circuit-Switching Network for Flexible and Simple-to-Operate Communication in HPC FPGA Cluster. ACM Trans. Reconfigurable Technol. Syst. Tomohiro Ueno, Kentaro Sano
2022	—	`conf`	ESSPER: Elastic and Scalable System for High-Performance Reconfigurable Computing with Software-bridged APIs. FPT Kentaro Sano, Atsushi Koshiba, Takaaki Miyajima, Tomohiro Ueno
2022	—	`conf`	Exploring Inter-tile Connectivity for HPC-oriented CGRA with Lower Resource Usage. FPT Boma A. Adhi, Carlos Cortes, Tomohiro Ueno, Yiyu Tan, Takuya Kojima, Artur Podobas, Kentaro Sano
2022	—	`conf`	FPGA-Dedicated Network vs. Server Network for Pipelined Computing with Multiple FPGAs. HEART Tomohiro Ueno, Takaaki Miyajima, Kentaro Sano
2022	—	`conf`	Stream Computation of 3D Approximate Convex Hulls with an FPGA. HEART Tatsuma Mori, Daiki Furukawa, Keigo Motoyoshi, Haruto Ikehara, Kaito Ohira, Taito Manabe, Yuichiro Shibata, Tomohiro Ueno, Kentaro Sano
2021	—	`conf`	Virtual Circuit-Switching Network with Flexible Topology for High-Performance FPGA Cluster. ASAP Tomohiro Ueno, Atsushi Koshiba, Kentaro Sano
2020	—	`conf`	Comparison of Direct and Indirect Networks for High-Performance FPGA Clusters. ARC Antoniette Mondigo, Tomohiro Ueno, Kentaro Sano, Hiroyuki Takizawa
2020	—	`conf`	Performance Evaluation of Pipelined Communication Combined with Computation in OpenCL Programming on FPGA. IPDPS Workshops Norihisa Fujita, Ryohei Kobayashi, Yoshiki Yamaguchi, Tomohiro Ueno, Kentaro Sano, Taisuke Boku
2019	—	`conf`	Hybrid Network Utilization for Efficient Communication in a Tightly Coupled FPGA Cluster. FPT Tomohiro Ueno, Takaaki Miyajima, Antoniette Mondigo, Kentaro Sano
2019	J	`jnl`	Scalability Analysis of Deeply Pipelined Tsunami Simulation with Multiple FPGAs. IEICE Trans. Inf. Syst. Antoniette Mondigo, Tomohiro Ueno, Kentaro Sano, Hiroyuki Takizawa
2018	—	`conf`	High-productivity Programming and Optimization Framework for Stream Processing on FPGA. HEART Jinpil Lee, Tomohiro Ueno, Mitsuhisa Sato, Kentaro Sano
2018	B	`conf`	Performance Analysis of Hardware-Based Numerical Data Compression on Various Data Formats. DCC Tomohiro Ueno, Kentaro Sano, Takashi Furusawa
2017	J	`jnl`	64-QAM 60-GHz CMOS Transceivers for IEEE 802.11ad/ay. IEEE J. Solid State Circuits Rui Wu, Ryo Minami, Yuuki Tsukui, Seitaro Kawai, Yuuki Seo, Shinji Sato, Kento Kimura, Satoshi Kondo, Tomohiro Ueno, Nurul Fajri, Shoutarou Maki, Noriaki Nagashima, Yasuaki Takeuchi, Tatsuya Yamaguchi, Ahmed Musa, Korkut Kaan Tokgoz, Teerachot Siriburanon, Bangan Liu, Yun Wang, Jian Pang, Ning Li, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa
2017	J	`jnl`	Bandwidth Compression of Floating-Point Numerical Data Streams for FPGA-Based High-Performance Computing. ACM Trans. Reconfigurable Technol. Syst. Tomohiro Ueno, Kentaro Sano, Satoru Yamamoto
2017	—	`conf`	Design and scalability analysis of bandwidth-compressed stream computing with multiple FPGAs. ReCoSoC Antoniette Mondigo, Tomohiro Ueno, Daichi Tanaka, Kentaro Sano, Satoru Yamamoto
2017	—	`conf`	FPGA-based Stream Computing for High-Performance N-Body Simulation using Floating-Point DSP Blocks. HEART Kentaro Sano, Shin Abiko, Tomohiro Ueno
2017	—	`conf`	Ultra-high-data-rate 60-GHz CMOS transceiver for future radio access network. ASICON Rui Wu, Ryo Minami, Yuuki Tsukui, Seitaro Kawai, Yuuki Seo, Shinji Sato, Kento Kimura, Satoshi Kondo, Tomohiro Ueno, Nurul Fajri, Shoutarou Maki, Noriaki Nagashima, Yasuaki Takeuchi, Tatsuya Yamaguchi, Ahmed Musa, Korkut Kaan Tokgoz, Teerachot Siriburanon, Bangan Liu, Yun Wang, Jian Pang, Ning Li, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa
2016	—	`conf`	13.6 A 42Gb/s 60GHz CMOS transceiver for IEEE 802.11ay. ISSCC Rui Wu, Seitaro Kawai, Yuuki Seo, Nurul Fajri, Kento Kimura, Shinji Sato, Satoshi Kondo, Tomohiro Ueno, Teerachot Siriburanon, Shoutarou Maki, Bangan Liu, Yun Wang, Noriaki Nagashima, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa
2016	J	`jnl`	A 0.0055mm IEICE Trans. Electron. Dongsheng Yang, Tomohiro Ueno, Wei Deng, Yuki Terashima, Kengo Nakata, Aravind Tharayil Narayanan, Rui Wu, Kenichi Okada, Akira Matsuzawa
2016	J	`jnl`	A 2.2 GHz -242dB-FOM 4.2 mW ADC-PLL Using Digital Sub-Sampling Architecture. IEEE J. Solid State Circuits Teerachot Siriburanon, Satoshi Kondo, Kento Kimura, Tomohiro Ueno, Satoshi Kawashima, Tohru Kaneko, Wei Deng, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa
2016	—	`conf`	An LO-buffer-less 60-GHz CMOS transmitter with oscillator pulling mitigation. A-SSCC Rui Wu, Jian Pang, Yuuki Seo, Kento Kimura, Seitaro Kawai, Shinji Sato, Satoshi Kondo, Tomohiro Ueno, Nurul Fajri, Yasuaki Takeuchi, Tatsuya Yamaguchi, Ahmed Musa, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa
2015	—	`conf`	19.5 An HCI-healing 60GHz CMOS transceiver. ISSCC Rui Wu, Seitaro Kawai, Yuuki Seo, Kento Kimura, Shinji Sato, Satoshi Kondo, Tomohiro Ueno, Nurul Fajri, Shoutarou Maki, Noriaki Nagashima, Yasuaki Takeuchi, Tatsuya Yamaguchi, Ahmed Musa, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa
2015	—	`conf`	25.2 A 2.2GHz -242dB-FOM 4.2mW ADC-PLL using digital sub-sampling architecture. ISSCC Teerachot Siriburanon, Satoshi Kondo, Kento Kimura, Tomohiro Ueno, Satoshi Kawashima, Tohru Kaneko, Wei Deng, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa
2015	—	`conf`	A 58.3-to-65.4 GHz 34.2 mW sub-harmonically injection-locked PLL with a sub-sampling phase detection. ASP-DAC Teerachot Siriburanon, Tomohiro Ueno, Kento Kimura, Satoshi Kondo, Wei Deng, Kenichi Okada, Akira Matsuzawa
2015	J	`jnl`	A Fully Synthesizable All-Digital PLL With Interpolative Phase Coupled Oscillator, Current-Output DAC, and Fine-Resolution Digital Varactor Using Gated Edge Injection Technique. IEEE J. Solid State Circuits Wei Deng, Dongsheng Yang, Tomohiro Ueno, Teerachot Siriburanon, Satoshi Kondo, Kenichi Okada, Akira Matsuzawa
2015	—	`conf`	An HDL-synthesized gated-edge-injection PLL with a current output DAC. ASP-DAC Dongsheng Yang, Wei Deng, Tomohiro Ueno, Teerachot Siriburanon, Satoshi Kondo, Kenichi Okada, Akira Matsuzawa
2014	—	`conf`	15.1 A 0.0066mm ISSCC Wei Deng, Dongsheng Yang, Tomohiro Ueno, Teerachot Siriburanon, Satoshi Kondo, Kenichi Okada, Akira Matsuzawa
2014	—	`conf`	20.3 A 64-QAM 60GHz CMOS transceiver with 4-channel bonding. ISSCC Kenichi Okada, Ryo Minami, Yuuki Tsukui, Seitaro Kawai, Yuuki Seo, Shinji Sato, Satoshi Kondo, Tomohiro Ueno, Yasuaki Takeuchi, Tatsuya Yamaguchi, Ahmed Musa, Rui Wu, Masaya Miyahara, Akira Matsuzawa
2014	—	`conf`	Bandwidth compression of multiple numerical data streams for high performance custom computing. ASAP Tomohiro Ueno, Ryo Ito, Kentaro Sano, Satoru Yamamoto
2014	—	`conf`	Effects of densely sampled dipole field on quantitative susceptibility mapping. EMBC Yuya Umemoto, Mai Murashima, Tomohiro Ueno, Naozo Sugimoto
2014	J	`jnl`	Stream Processor Generator for HPC to Embedded Applications on FPGA-based System Platform. CoRR Kentaro Sano, Hayato Suzuki, Ryo Ito, Tomohiro Ueno, Satoru Yamamoto
2013	—	`conf`	Effective digitized spatial size of unit dipole field in Quantitative Susceptibility Mapping. EMBC Mai Murashima, Tomohiro Ueno, Naozo Sugimoto
2013	J	`jnl`	Efficient custom computing of fully-streamed lattice boltzmann method on tightly-coupled FPGA cluster. SIGARCH Comput. Archit. News Kentaro Sano, Yoshiaki Kono, Hayato Suzuki, Ryotaro Chiba, Ryo Ito, Tomohiro Ueno, Kyo Koizumi, Satoru Yamamoto
2013	—	`conf`	Parameterized Design and Evaluation of Bandwidth Compressor for Floating-Point Data Streams in FPGA-Based Custom Computing. ARC Tomohiro Ueno, Yoshiaki Kono, Kentaro Sano, Satoru Yamamoto