Tomoharu Tanaka

16 papers Journal 12Unranked 4
YearRankTypeTitle / Venue / Authors
2016 — conf
7.7 A 768Gb 3b/cell 3D-floating-gate NAND flash memory.
ISSCC
Tomoharu Tanaka, Mark Helm, Tommaso Vali, Ramin Ghodsi, Koichi Kawai, Jae-Kwan Park, Shigekazu Yamada, Feng Pan, Yuichi Einaga, Ali Ghalam, Toru Tanzawa, Jason Guo, Takaaki Ichikawa, Erwin Yu, Satoru Tamada, Tetsuji Manabe, Jiro Kishimoto, Yoko Oikawa, Yasuhiro Takashima, Hidehiko Kuge, Midori Morooka, Ali Mohammadzadeh, Jong Kang, Jeff Tsai, Emanuele Sirizotti, Eric Lee, Luyen Vu, Yuxing Liu, Hoon Choi, Kwonsu Cheon, Daesik Song, Daniel Shin, Jung Hee Yun, Michele Piccardi, Kim-Fung Chan, Yogesh Luthra, Dheeraj Srinivasan, Srinivasarao Deshmukh, Kalyan Kavalipurapu, Dan Nguyen, Girolamo Gallo, Sumant Ramprasad, Michelle Luo, Qiang Tang, Michele Incarnati, Agostino Macerola, Luigi Pilolli, Luca De Santis, Massimo Rossini, Violante Moschiano, Giovanni Santin, Bernardino Tronca, Hyunseok Lee, Vipul Patel, Ted Pekny, Aaron Yip, Naveen Prabhu, Purval Sule, Trupti Bemalkhedkar, Kiranmayee Upadhyayula, Camila Jaramillo
2016 — conf
Design challenge in 3D NAND technology: A 4.8X area- and 1.3X power-efficient 20V charge pump using tier capacitors.
A-SSCC
Toru Tanzawa, T. Murakoshi, T. Kamijo, Tomoharu Tanaka, J. J. McNeil, K. Duesman
2010 — conf
A temperature compensation word-line voltage generator for multi-level cell NAND Flash memories.
ESSCIRC
Toru Tanzawa, Tomoharu Tanaka, Satoru Tamada, Jiro Kishimoto, Sjigekazu Yamada, Koichi Kawai, Takaaki Ichikawa, P. Chiang, Frank Roohparvar
2009 — conf
A 172mm
ISSCC
Raymond Zeng, Navneet Chalagalla, Dan Chu, Daniel Elmhurst, Matt Goldman, Chris Haid, Atif Huq, Takaaki Ichikawa, Joel Jorgensen, Owen Jungroth, Nishnat Kajla, Ravinder Kajley, Koichi Kawai, Jiro Kishimoto, Ali Madraswala, Tetsuji Manabe, Vikram Mehta, Midori Morooka, Katie Nguyen, Yoko Oikawa, Bharat Pathak, Rod Rozman, Tom Ryan, Andy Sendrowski, William Sheung, Martin Szwarc, Yasuhiro Takashima, Satoru Tamada, Toru Tanzawa, Tomoharu Tanaka, Mase Taub, Darshak Udeshi, Sjigekazu Yamada, Hiroyuki Yokoyama
2002 J jnl
Circuit techniques for a 1.8-V-only NAND flash memory.
IEEE J. Solid State Circuits
Toru Tanzawa, Tomoharu Tanaka, Ken Takeuchi, Hiroshi Nakamura
2001 J jnl
A dual-page programming scheme for high-speed multigigabit-scale NAND flash memories.
IEEE J. Solid State Circuits
Ken Takeuchi, Tomoharu Tanaka
1999 J jnl
A negative V
IEEE J. Solid State Circuits
Ken Takeuchi, Shinji Satoh, Tomoharu Tanaka, Ken-ichi Imamiya, Koji Sakui
1998 J jnl
A multipage cell architecture for high-speed programming multilevel NAND flash memories.
IEEE J. Solid State Circuits
Ken Takeuchi, Tomoharu Tanaka, Toru Tanzawa
1997 J jnl
A compact on-chip ECC for low cost flash memories.
IEEE J. Solid State Circuits
Toru Tanzawa, Tomoharu Tanaka, Ken Takeuchi, Riichiro Shirota, Seiichi Aritome, Hiroshi Watanabe, Gertjan Hemink, Kazuhiro Shimizu, Shinji Sato, Yuji Takeuchi, Kazunori Ohuchi
1997 J jnl
A dynamic analysis of the Dickson charge pump circuit.
IEEE J. Solid State Circuits
Toru Tanzawa, Tomoharu Tanaka
1997 J jnl
A stable programming pulse generator for single power supply flash memories.
IEEE J. Solid State Circuits
Toru Tanzawa, Tomoharu Tanaka
1996 J jnl
A double-level-V
IEEE J. Solid State Circuits
Ken Takeuchi, Tomoharu Tanaka, Hiroshi Nakamura
1994 J jnl
A quick intelligent page-programming architecture and a shielded bitline sensing method for 3 V-only NAND flash memory.
IEEE J. Solid State Circuits
Tomoharu Tanaka, Yoshiyuki Tanaka, Hiroshi Nakamura, Koji Sakui, Hideko Oodaira, Riichiro Shirota, Kazunori Ohuchi, Fujio Masuoka, Hisashi Hara
1991 J jnl
A 4 Mb NAND EEPROM with tight programmed V
IEEE J. Solid State Circuits
Masaki Momodomi, Tomoharu Tanaka, Yoshihisa Iwata, Yoshiyuki Tanaka, Hideko Oodaira, Yasuo Itoh, Riichiro Shirota, Kazunori Ohuchi, Fujio Masuoka
1990 J jnl
A high-density NAND EEPROM with block-page programming for microcomputer applications.
IEEE J. Solid State Circuits
Yoshihisa Iwata, Masaki Momodomi, Tomoharu Tanaka, Hideko Oodaira, Yasuo Itoh, Ryozo Nakayama, Ryouhei Kirisawa, Seiichi Aritome, Tetsuo Endoh, Riichiro Shirota, Kazunori Ohuchi, Fujio Masuoka
1989 J jnl
An experimental 4-Mbit CMOS EEPROM with a NAND-structured cell.
IEEE J. Solid State Circuits
Masaki Momodomi, Yasuo Itoh, Riichiro Shirota, Yoshihisa Iwata, Ryozo Nakayama, Ryouhei Kirisawa, Tomoharu Tanaka, Seiichi Aritome, Tetsuo Endoh, Kazunori Ohuchi, Fujjo Masuoka