Tomasz Borejko

21 papers C 9Journal 3Unranked 9

Year	Rank	Type	Title / Venue / Authors
2020	J	`jnl`	Erratum: Borejko, T., et al. NaviSoC: High-Accuracy Low-Power GNSS SoC with an Integrated Application Processor. Sensors 2020, 20, 1069. Sensors Tomasz Borejko, Krzysztof Marcinek, Krzysztof Siwiec, Pawel Narczyk, Adam Borkowski, Igor Butryn, Arkadiusz W. Luczyk, Daniel Pietron, Maciej Plasota, Szymon Reszewicz, Lukasz Wiechowski, Witold A. Pleskacz
2020	J	`jnl`	NaviSoC: High-Accuracy Low-Power GNSS SoC with an Integrated Application Processor. Sensors Tomasz Borejko, Krzysztof Marcinek, Krzysztof Siwiec, Pawel Narczyk, Adam Borkowski, Igor Butryn, Arkadiusz W. Luczyk, Daniel Pietron, Maciej Plasota, Szymon Reszewicz, Lukasz Wiechowski, Witold A. Pleskacz
2019	—	`conf`	DC/DC Buck Converter with Build-in Tuned Sawtooth Wave Generator Using CMOS Technology. MIXDES Adam Borkowski, Tomasz Borejko, Witold A. Pleskacz
2017	—	`conf`	Importance of on-chip inductor modeling in radio frequency integrated circuits. MIXDES Daniel Pietron, Tomasz Borejko, Krzysztof Siwiec, Witold A. Pleskacz
2016	C	`conf`	BioSoC: Highly integrated System-on-Chip for health monitoring. DDECS Krzysztof Siwiec, Krzysztof Marcinek, Piotr Boguszewicz, Tomasz Borejko, Aleh Halauko, Adam Jarosz, Jakub Kopanski, Ewa Kurjata-Pfitzner, Pawel Narczyk, Maciej Plasota, Andrzej Wielgus, Witold A. Pleskacz
2016	—	`conf`	Dedicated chip for pulse oximetry measurements. EWDTS Cezary Kolacinski, Jerzy Wasowski, Andrzej Szymanski, Adam Jarosz, Ewa Kurjata-Pfitzner, Tomasz Borejko, Krzysztof Siwiec, Witold A. Pleskacz
2016	—	`conf`	The integrated transmitter and receiver modules for pulse oximeter system. MIXDES Cezary Kolacinski, Andrzej Szymanski, Adam Jarosz, Ewa Kurjata-Pfitzner, Jerzy Wasowski, Tomasz Borejko, Krzysztof Siwiec, Witold A. Pleskacz
2015	—	`conf`	A CMOS system-on-chip for physiological parameters acquisition, processing and monitoring. MIXDES Krzysztof Siwiec, Krzysztof Marcinek, Tomasz Borejko, Adam Jarosz, Jakub Kopanski, Ewa Kurjata-Pfitzner, Pawel Narczyk, Maciej Plasota, Andrzej Wielgus, Witold A. Pleskacz
2015	—	`conf`	IF polyphase filter design and calibration with back-gate biasing in 28 nm FD-SOI technology. MIXDES Mariusz Derlecki, Tomasz Borejko, Witold A. Pleskacz
2015	—	`conf`	Low voltage LNA implementations in 28 nm FD-SOI technology for GNSS applications. MIXDES Aleh Halauko, Tomasz Borejko, Witold A. Pleskacz
2012	C	`conf`	LC-VCO design automation tool for nanometer CMOS technology. DDECS Krzysztof Siwiec, Tomasz Borejko, Witold A. Pleskacz
2011	C	`conf`	A resistorless current reference source for 65 nm CMOS technology with low sensitivity to process, supply voltage and temperature variations. DDECS Michal Lukaszewicz, Tomasz Borejko, Witold A. Pleskacz
2011	C	`conf`	CAD tool for PLL Design. DDECS Krzysztof Siwiec, Tomasz Borejko, Witold A. Pleskacz
2011	C	`conf`	PVT tolerant LC-VCO in 90 nm CMOS technology for GPS/Galileo applications. DDECS Krzysztof Siwiec, Tomasz Borejko, Witold A. Pleskacz
2010	C	`conf`	A comparison of low voltage LNA architectures designed for multistandard GNSS in two 90 nm CMOS technologies. DDECS Jacek Gradzki, Tomasz Borejko, Witold A. Pleskacz
2009	C	`conf`	Low voltage LNA implementations in 90 nm CMOS technology for multistandard GNSS. DDECS Jacek Gradzki, Tomasz Borejko, Witold A. Pleskacz
2008	C	`conf`	A Resistorless Voltage Reference Source for 90 nm CMOS Technology with Low Sensitivity to Process and Temperature Variations. DDECS Tomasz Borejko, Witold A. Pleskacz
2008	C	`conf`	Built-In Current Monitor for IDDQ Testing in CMOS 90 nm Technology. DDECS Marcin J. Beresinski, Tomasz Borejko, Witold A. Pleskacz, Viera Stopjaková
2008	J	`jnl`	DefSim: A Remote Laboratory for Studying Physical Defects in CMOS Digital Circuits. IEEE Trans. Ind. Electron. Witold A. Pleskacz, Viera Stopjaková, Tomasz Borejko, Artur Jutman, Andrzej Walkanis
2006	—	`conf`	DefSim: CMOS Defects on Chip for Research and Education. LATW Witold A. Pleskacz, Tomasz Borejko, Andrzej Walkanis, Viera Stopjaková, Artur Jutman, Raimund Ubar
2002	—	`conf`	CMOS Standard Cells Characterization for IDDQ Testing. DFT Witold A. Pleskacz, Tomasz Borejko, Wieslaw Kuzmicz