Tom J. Kazmierski

71 papers A 15B 1C 29Journal 9Unranked 17

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	SYNAPSE - A New Approach to Semi-automated Design of Ultra-low-power Application-specific Embedded Processors. MIXDES Xuan Ji, Tom J. Kazmierski, Basel Halak
2024	J	`jnl`	Accelerated Simulation of Passive Analog Circuits Over GPU Using Explicit Integration Methods. Circuits Syst. Signal Process. Ginés Doménech-Asensi, Tom J. Kazmierski
2020	C	`conf`	A Minimal RISC-V Vector Processor for Embedded Systems. FDL Matthew Johns, Tom J. Kazmierski
2020	A	`conf`	High-speed analog simulation of CMOS vision chips using explicit integration techniques on many-core processors. DATE Ginés Doménech-Asensi, Tom J. Kazmierski
2020	C	`conf`	Modified Compressed Sparse Row Format for Accelerated FPGA-Based Sparse Matrix Multiplication. ISCAS Michail Pligouroudis, Rafael Angel Gutierrez Nuno, Tom J. Kazmierski
2020	C	`conf`	Stability and Efficiency of Explicit Integration in Interconnect Analysis on GPUs. ISCAS Ginés Doménech-Asensi, Tom J. Kazmierski
2019	C	`ed.`	2019 Forum for Specification and Design Languages, FDL 2019, Southampton, United Kingdom, September 2-4, 2019 FDL Tom J. Kazmierski, Reinhard von Hanxleden, Terrence S. T. Mak
2019	C	`conf`	An Efficient Numerical Solution Technique for VLSI Interconnect Equations on Many-Core Processors. ISCAS Ginés Doménech-Asensi, Tom J. Kazmierski
2019	C	`conf`	Simulation Acceleration of Image Filtering on CMOS Vision Chips Using Many-Core Processors. FDL Ginés Doménech-Asensi, Tom J. Kazmierski
2019	J	`jnl`	Ultra-Low Power 18-Transistor Fully Static Contention-Free Single-Phase Clocked Flip-Flop in 65-nm CMOS. IEEE J. Solid State Circuits Yunpeng Cai, Anand Savanth, Pranay Prabhat, James Myers, Alex S. Weddell, Tom J. Kazmierski
2018	C	`ed.`	2018 Forum on Specification & Design Languages, FDL 2018, Garching, Germany, September 10-12, 2018 FDL Hiren D. Patel, Tom J. Kazmierski, Sebastian Steinhorst
2018	—	`conf`	A Bit-Serial Variable-Accuracy FFT Processor For Energy-Harvesting Systems. APCCAS Yue Lu, Tom J. Kazmierski, Lianxi Liu
2018	C	`conf`	A New Ageing-Aware Approach Via Path Isolation. FDL Yue Lu, Shengyu Duan, Tom J. Kazmierski
2017	—	`conf`	Evaluation and analysis of single-phase clock flip-flops for NTV applications. PATMOS Yunpeng Cai, Anand Savanth, Pranay Prabhat, James Myers, Alex S. Weddell, Tom J. Kazmierski
2017	—	`conf`	Generation of new power processing structures exploiting genetic programming. ISIE Ginés Doménech-Asensi, Tom J. Kazmierski
2017	—	`conf`	Low cost error monitoring for improved maintainability of IoT applications. DFT Mauricio D. Gutierrez, Vasileios Tenentes, Tom J. Kazmierski, Daniele Rossi
2017	B	`conf`	Low power probabilistic online monitoring of systematic erroneous behaviour. ETS Mauricio D. Gutierrez, Vasileios Tenentes, Tom J. Kazmierski, Daniele Rossi
2017	J	`jnl`	Susceptible Workload Evaluation and Protection using Selective Fault Tolerance. J. Electron. Test. Mauricio D. Gutierrez, Vasileios Tenentes, Daniele Rossi, Tom J. Kazmierski
2017	—	`conf`	Variable-accuracy bit-serial multiplication with row bypassing for ultra low power. NORCAS Yue Lu, Tom J. Kazmierski
2016	—	`conf`	An ultra-low-power variable-accuracy bit-serial FFT butterfly processing element for IoT sensors. APCCAS Yue Lu, Tom J. Kazmierski
2016	C	`conf`	Error-free near-threshold adiabatic CMOS logic in presence of process variation. FDL Yue Lu, Tom J. Kazmierski
2016	C	`conf`	Susceptible workload driven selective fault tolerance using a probabilistic fault model. IOLTS Mauricio D. Gutierrez, Vasileios Tenentes, Tom J. Kazmierski
2016	C	`conf`	Using event-B and Modelica to evaluate thermal management strategies in many core systems. FDL Colin F. Snook, Tom J. Kazmierski
2013	C	`conf`	A floating gate graphene FET complementary inverter with symmetrical transfer characteristics. ISCAS Ime J. Umoh, Tom J. Kazmierski
2013	A	`conf`	DoE-based performance optimization of energy management in sensor nodes powered by tunable energy-harvesters. DATE Tom J. Kazmierski, Leran Wang, Bashir M. Al-Hashimi, Geoff V. Merrett
2013	C	`conf`	Modeling communication and circuit's behavior. FDL Tom J. Kazmierski, Torsten Maehne
2012	J	`jnl`	An Explicit Linearized State-Space Technique for Accelerated Simulation of Electromagnetic Vibration Energy Harvesters. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Tom J. Kazmierski, Leran Wang, Bashir M. Al-Hashimi, Geoff V. Merrett
2012	C	`conf`	Minimum energy point of sub-threshold operated pass-transistor circuits. FDL Aleksandar Pajkanovic, Tom J. Kazmierski, Branko Dokic
2012	A	`conf`	Response-surface-based design space exploration and optimisation of wireless sensor nodes with tunable energy harvesters. DATE Leran Wang, Tom J. Kazmierski, Bashir M. Al-Hashimi, Mansour Aloufi, Joseph Wenninger
2011	A	`conf`	Accelerated simulation of tunable vibration energy harvesting systems using a linearised state-space technique. DATE Leran Wang, Tom J. Kazmierski, Bashir M. Al-Hashimi, Alex S. Weddell, Geoff V. Merrett, Ivo Netali Ayala-Garcia
2011	J	`jnl`	Accurate Supercapacitor Modeling for Energy Harvesting Wireless Sensor Nodes. IEEE Trans. Circuits Syst. II Express Briefs Alex S. Weddell, Geoff V. Merrett, Tom J. Kazmierski, Bashir M. Al-Hashimi
2011	A	`conf`	An extension to SystemC-A to support mixed-technology systems with distributed components. DATE Chenxu Zhao, Tom J. Kazmierski
2011	C	`conf`	VHDL-AMS model of a dual gate graphene FET. FDL Ime J. Umoh, Tom J. Kazmierski
2011	A	`conf`	Wireless communication and energy harvesting in automobiles. DATE Stefan Mahlknecht, Tom J. Kazmierski, Christoph Grimm, Leran Wang
2010	J	`jnl`	Bandwidth selective filter for the pre-excision of narrowband interference in broadband beamformers. IET Commun. Neil Tisdale, Tom J. Kazmierski, Duncan Brooks
2010	C	`conf`	Genetic-Based High-Level Synthesis of Sigma-Delta Modulator in SystemC-A. FDL Chenxu Zhao, Tom J. Kazmierski
2010	C	`conf`	Genetic-based automated synthesis and optimization of MEMS accelerometers with sigma-delta control. ISCAS Chenxu Zhao, Tom J. Kazmierski
2010	C	`conf`	SystemC-A Modelling of Mixed-Technology Systems with Distributed Behaviour. FDL Chenxu Zhao, Tom J. Kazmierski
2009	A	`conf`	An automated design flow for vibration-based energy harvester systems. DATE Leran Wang, Tom J. Kazmierski, Bashir M. Al-Hashimi, Stephen P. Beeby, Dibin Zhu
2009	C	`conf`	Analysis of sense finger dynamics for accurate ΣΔ MEMS accelerometer modelling in VHDL-AMS. FDL Chenxu Zhao, Tom J. Kazmierski
2009	C	`conf`	HSPICE implementation of a numerically efficient model of CNT transistor. FDL Tom J. Kazmierski, Dafeng Zhou, Bashir M. Al-Hashimi
2009	J	`jnl`	VHDL-AMS Based Genetic Optimization of Mixed-Physical-Domain Systems in Automotive Applications. Simul. Leran Wang, Tom J. Kazmierski
2008	—	`conf`	Automated Performance Optimisation and Layout Synthesis of MEMS Accelerometer with Sigma-Delta Force-Feedback Control Loop. BMAS Chenxu Zhao, Tom J. Kazmierski
2008	A	`conf`	Efficient circuit-level modelling of ballistic CNT using piecewise non-linear approximation of mobile charge density. DATE Tom J. Kazmierski, Dafeng Zhou, Bashir M. Al-Hashimi
2008	A	`conf`	Integrated approach to energy harvester mixed technology modelling and performance optimisation. DATE Leran Wang, Tom J. Kazmierski, Bashir M. Al-Hashimi, Stephen P. Beeby, Russel N. Torah
2008	C	`conf`	VHDL-AMS Implementation of a Numerical Ballistic CNT Model for Logic Circuit Simulation. FDL Dafeng Zhou, Tom J. Kazmierski, Bashir M. Al-Hashimi
2008	—	`conf`	VHDL-AMS Implementation of a Numerical Ballistic CNT Model. FDL (Selected Papers) Dafeng Zhou, Tom J. Kazmierski, Bashir M. Al-Hashimi
2007	—	`conf`	A fast, numerical circuit-level model of carbon nanotube transistor. NANOARCH Tom J. Kazmierski, Dafeng Zhou, Bashir M. Al-Hashimi
2007	C	`conf`	An Extension to VHDL-AMS for AMS Systems with Partial Differential Equations. FDL Leran Wang, Chenxu Zhao, Tom J. Kazmierski
2006	A	`conf`	HDL models of ferromagnetic core hysteresis using timeless discretisation of the magnetic slope. DATE Hessa Al-Junaid, Tom J. Kazmierski
2006	C	`conf`	SystemC-A Modeling of an Automotive Seating Vibration Isolation System. FDL Hessa Al-Junaid, Tom J. Kazmierski, Leran Wang
2006	J	`jnl`	Timeless Discretization of Magnetization Slope in the Modeling of Ferromagnetic Hysteresis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Hessa Al-Junaid, Tom J. Kazmierski, Peter R. Wilson, Jerzy Baranowski
2005	C	`conf`	A VHDL-AMS based Time-Domain Skin Depth Model. FDL M. Burford, Tom J. Kazmierski
2005	C	`conf`	Linearly graded behavioural analogue performance models. FDL Xianqiang Ren, Tom J. Kazmierski
2005	—	`conf`	VHDL-AMS modeling of an automotive vibration isolation seating system. Circuits, Signals, and Systems Leran Wang, Tom J. Kazmierski
2004	C	`conf`	A novel approach to mixed-domain behavioral modeling of ferromagnetic hysteresis in VHDL-AMS. FDL Peter R. Wilson, Tom J. Kazmierski
2004	—	`conf`	Behavioral modelling of RF filters in VHDL-AMS for automated architectural and parametric optimization. ISCAS (1) Tom J. Kazmierski, Fazrena A. Hamid
2004	A	`conf`	Efficient Mixed-Domain Behavioural Modeling of Ferromagnetic Hysteresis Implemented in VHDL-AMS. DATE Peter R. Wilson, J. Neil Ross, Andrew D. Brown, Tom J. Kazmierski, Jerzy Baranowski
2004	—	`conf`	SEAMS - a SystemC environment with analog and mixed-signal extensions. ISCAS (5) Hessa Al-Junaid, Tom J. Kazmierski
2003	A	`conf`	A Secure Web-Based Framework for Electronic System Level Design. DATE Tom J. Kazmierski, Xing Q. Yang
2003	C	`conf`	FIST - a VHDL-AMS based architectural synthesis strategy for integrated high-frequency analogue filters. FDL Fazrena A. Hamid, Tom J. Kazmierski
2003	C	`conf`	Synchronization of analogue and digital solvers in mixed-signal simulation on a SystemC platform. FDL Tom J. Kazmierski, Hessa Al-Junaid
2003	C	`conf`	SystemC - a powerful system-level modelling platform for digital and mixed-signal hardware/software co-design. FDL C. Isaia, Tom J. Kazmierski
2002	A	`conf`	A Two-Tier Distributed Electronic Design Framework. DATE Tom J. Kazmierski, Neil Clayton
2002	—	`conf`	Automated high level synthesis of hardware building blocks present in ART-based neural networks, from VHDL-AMS descriptions. ISCAS (4) J. A. López, Ginés Doménech, R. Ruiz, Tom J. Kazmierski
2002	—	`conf`	Synthesis and optimization of analog VLSI filters from VHDL-AMS parse trees. ISCAS (1) Fazrena A. Hamid, Tom J. Kazmierski
1998	A	`conf`	A Formal Description of VHDL-AMS Analogue Systems. DATE Tom J. Kazmierski
1998	A	`conf`	Fuzzy-logic digital-analogue interfaces for accurate mixed-signal simulation. DATE Tom J. Kazmierski
1998	—	`conf`	Run Time Reusability in Object-Oriented Schematic Capture. ECOOP Workshops David Parsons, Tom J. Kazmierski
1992	J	`jnl`	Confidence in mixed-mode circuit simulation. Comput. Aided Des. Andrew D. Brown, Mark Zwolinski, Ken G. Nichols, Tom J. Kazmierski
1991	—	`conf`	A General Purpose Network Solving System. VLSI Tom J. Kazmierski, Andrew D. Brown, Ken G. Nichols, Mark Zwolinski