Tohru Moto-Oka

23 papers A* 2B 1Journal 10Unranked 10
YearRankTypeTitle / Venue / Authors
1986 J jnl
Design of secondary storage system of database machine grace using generalized KD-tree.
Syst. Comput. Jpn.
Shinya Fushimi, Masaru Kitsuregawa, Hidehiko Tanaka, Tohru Moto-Oka
1986 J jnl
Interconnection networks for bucket distribution on relational algebra machine GRACE.
Syst. Comput. Jpn.
Shuichi Sakai, Masaru Kitsuregawa, Hidehiko Tanaka, Tohru Moto-Oka
1986 B conf
Tokio: Logic Programming Language Based on Temporal Logic and its Compilation to Prolog.
ICLP
Masahiro Fujita, Shinji Kono, Hidehiko Tanaka, Tohru Moto-Oka
1985 — conf
A Note on the Elementary Execution Unit in a Parallel Inference Machine.
LP
Tsutomu Maruyama, Keiji Hirata, Hidehiko Tanaka, Tohru Moto-Oka
1985 — conf
Algorithm and Performance Evaluation of Adaptive Multidimensional Clustering Technique.
SIGMOD Conference
Shinya Fushimi, Masaru Kitsuregawa, Masaya Nakayama, Hidehiko Tanaka, Tohru Moto-Oka
1985 J jnl
Interconnection network for bucket collection on relational algebra machine GRACE.
Syst. Comput. Jpn.
Shuichi Sakai, Masaru Kitsuregawa, Hidehiko Tanaka, Tohru Moto-Oka
1985 — conf
Memory Management Algorithms in Pipeline Merge Sorter.
IWDM
Masaru Kitsuregawa, Shinya Fushimi, Hidehiko Tanaka, Tohru Moto-Oka
1985 — conf
Multidimensional Clustering Techniques for Large Relational Database Machines.
FODO
Shinya Fushimi, Masaru Kitsuregawa, Hidehiko Tanaka, Tohru Moto-Oka
1985 — conf
Temporal Logic Programming Language Tokio - Programming in Tokio.
LP
T. Aoyagi, Masahiro Fujita, Tohru Moto-Oka
1985 — conf
Using the Temporal Logic Programming Language Tokio for Algorithm Description and Automatic CMOS Gate Array Synthesis.
LP
Masahiro Fujita, Makoto Ishisone, Hiroshi Nakamura, Hidehiko Tanaka, Tohru Moto-Oka
1984 J jnl
Fifth-Generation Computer Systems: A Japanese Project.
Computer
Tohru Moto-Oka, Harold S. Stone
1984 J jnl
Highly Parallel Inference Engine PIE: Goal Rewriting Model and Machine Architecture.
New Gener. Comput.
Atsuhiro Goto, Hidehiko Tanaka, Tohru Moto-Oka
1984 — conf
Specifying Hardware in temporal Logic & Efficient Synthesis of State-Diagrams Using Prolog.
FGCS
Masahiro Fujita, Hidehiko Tanaka, Tohru Moto-Oka
1984 — conf
The Architecture of a Parallel Inference Engine - PIE.
FGCS
Tohru Moto-Oka, Hidehiko Tanaka, Hitoshi Aida, Keiji Hirata, Tsutomu Maruyama
1983 J jnl
A Prolog Extension for Handling Negative Knowledge.
New Gener. Comput.
Hitoshi Aida, Hidehiko Tanaka, Tohru Moto-Oka
1983 J jnl
Application of Hash to Data Base Machine and Its Architecture.
New Gener. Comput.
Masaru Kitsuregawa, Hidehiko Tanaka, Tohru Moto-Oka
1983 J jnl
On the Founding of This Journal.
New Gener. Comput.
Tohru Moto-Oka
1983 A* conf
Overview to the Fifth Generation Computer System Project
ISCA
Tohru Moto-Oka
1983 J jnl
Temporal Logic Based Hardware Description and Its Verification with Prolog.
New Gener. Comput.
Masahiro Fujita, Hidehiko Tanaka, Tohru Moto-Oka
1983 — conf
The Architectures in the Fifth Generation Computers.
IFIP Congress
Tohru Moto-Oka, Kazuhiro Fuchi
1982 — conf
Relational Algebra Machine GRACE.
RIMS Symposium on Software Science and Engineering
Masaru Kitsuregawa, Hidehiko Tanaka, Tohru Moto-Oka
1975 A* conf
Logic design system in Japan.
DAC
Tohru Moto-Oka, Tadashi Kurachi, Tsutomu Shiino, Masakatsu Sugimoto
1960 J jnl
Esaki Diode High-Speed Logical Circuits.
IRE Trans. Electron. Comput.
Eiichi Goto, Kenro Murata, Kisaburo Nakazawa, Keisuke Nakagawa, Tohru Moto-Oka, Yasushi Miatsu-Oka, Yoshihiro Ishibashi, Haruhisa Ishida, Takashi Soma, Eiiti Wada