Todd M. Austin

149 papers A* 49A 21B 6C 4Misc 7Journal 31Unranked 29

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	DOME: Automated Validation of Data-Oblivious Program Execution. HOST Donayam Benti, Todd M. Austin
2025	—	`conf`	EDL: Efficient Data-Oblivious Loops. TPS-ISA Biniyam Mengist Tiruye, Lauren Biernacki, Todd M. Austin
2025	—	`conf`	ZKProphet: Understanding Performance of Zero-Knowledge Proofs on GPUs. IISWC Tarunesh Verma, Yichao Yuan, Nishil Talati, Todd M. Austin
2025	J	`jnl`	ZKProphet: Understanding Performance of Zero-Knowledge Proofs on GPUs. CoRR Tarunesh Verma, Yichao Yuan, Nishil Talati, Todd M. Austin
2025	—	`conf`	Zipper: Latency-Tolerant Optimizations for High-Performance Buses. ASP-DAC Shibo Chen, Hailun Zhang, Todd M. Austin
2024	—	`conf`	Channelizer: Explainable ML Inference for Validating Side-Channel Resistant Systems. SEED Donayam Benti, Todd M. Austin
2024	—	`conf`	Octal: Efficient Automatic Data-Oblivious Program Transformations to Eliminate Side-Channel Leakage. SecDev Biniyam Mengist Tiruye, Lauren Biernacki, Tersiteab Adem, Petros Mola, Todd M. Austin
2024	Misc	`conf`	Special Session: Detecting and Defending Vulnerabilities in Heterogeneous and Monolithic Systems: Current Strategies and Future Directions. CASES Venkat Nitin Patnala, Sai Manoj Pudukotai Dinakarrao, Guru Venkataramani, Jie Chen, Preet Derasari, Milos Doroslovacki, Fan Yao, Hongyu Fang, Meron Demissie, Todd M. Austin, Lauren Biernacki, Saket Upadhyay, Arnabjyoti Kalita, Ashish Venkat
2023	B	`conf`	Exploring the Efficiency of Data-Oblivious Programs. ISPASS Lauren Biernacki, Biniyam Mengist Tiruye, Meron Zerihun Demissie, Fitsum Assamnew Andargie, Brandon Reagen, Todd M. Austin
2023	A*	`conf`	Security Verification of Low-Trust Architectures. CCS Qinhan Tan, Yonathan Fisseha, Shibo Chen, Lauren Biernacki, Jean-Baptiste Jeannin, Sharad Malik, Todd M. Austin
2023	J	`jnl`	Security Verification of Low-Trust Architectures. CoRR Qinhan Tan, Yonathan Fisseha, Shibo Chen, Lauren Biernacki, Jean-Baptiste Jeannin, Sharad Malik, Todd M. Austin
2022	A*	`conf`	PriMax: maximizing DSL application performance with selective primitive acceleration. DAC Nicholas Wendt, Todd M. Austin, Valeria Bertacco
2022	—	`conf`	Sequestered Encryption: A Hardware Technique for Comprehensive Data Privacy. SEED Lauren Biernacki, Meron Zerihun Demissie, Kidus Birkayehu Workneh, Fitsum Assamnew Andargie, Todd M. Austin
2022	—	`conf`	These Aren't The Caches You're Looking For: Stochastic Channels on Randomized Caches. SEED Tarunesh Verma, Achilleas Anastasopoulos, Todd M. Austin
2022	A	`conf`	Twine: A Chisel Extension for Component-Level Heterogeneous Design. DATE Shibo Chen, Yonathan Fisseha, Jean-Baptiste Jeannin, Todd M. Austin
2021	B	`conf`	A Defense-Inspired Benchmark Suite. ISPASS Pete Ehrett, Nathan Block, Bing Schaefer, Adrian Berding, John Paul Koenig, Pranav Srinivasan, Valeria Bertacco, Todd M. Austin
2021	—	`conf`	ChipAdvisor: A Machine Learning Approach for Mapping Applications to Heterogeneous Systems. ISQED Hiwot Tadese Kassa, Tarunesh Verma, Todd M. Austin, Valeria Bertacco
2021	C	`conf`	Chopin: Composing Cost-Effective Custom Chips with Algorithmic Chiplets. ICCD Pete Ehrett, Todd M. Austin, Valeria Bertacco
2021	—	`conf`	Morpheus II: A RISC-V Security Extension for Protecting Vulnerable Software and Hardware. HOST Austin Harris, Tarunesh Verma, Shijia Wei, Lauren Biernacki, Alex Kisil, Misiker Tadesse Aga, Valeria Bertacco, Baris Kasikci, Mohit Tiwari, Todd M. Austin
2021	—	`conf`	Morpheus II: A RISC-V Security Extension for Protecting Vulnerable Software and Hardware. HCS Todd M. Austin, Austin Harris, Tarunesh Verma, Shijia Wei, Alex Kisil, Misiker Tadesse Aga, Valeria Bertacco, Baris Kasikci, Mohit Tiwari
2021	A*	`conf`	Prodigy: Improving the Memory Latency of Data-Indirect Irregular Workloads Using Hardware-Software Co-Design. HPCA Nishil Talati, Kyle May, Armand Behroozi, Yichen Yang, Kuba Kaszyk, Christos Vasiladiotis, Tarunesh Verma, Lu Li, Brandon Nguyen, Jiawen Sun, John Magnus Morton, Agreen Ahmadi, Todd M. Austin, Michael F. P. O'Boyle, Scott A. Mahlke, Trevor N. Mudge, Ronald G. Dreslinski
2021	J	`jnl`	Software-driven Security Attacks: From Vulnerability Sources to Durable Hardware Defenses. ACM J. Emerg. Technol. Comput. Syst. Lauren Biernacki, Mark Gallagher, Zhixing Xu, Misiker Tadesse Aga, Austin Harris, Shijia Wei, Mohit Tiwari, Baris Kasikci, Sharad Malik, Todd M. Austin
2021	—	`conf`	VIP-Bench: A Benchmark Suite for Evaluating Privacy-Enhanced Computation Frameworks. SEED Lauren Biernacki, Meron Zerihun Demissie, Kidus Birkayehu Workneh, Galane Basha Namomsa, Plato Gebremedhin, Fitsum Assamnew Andargie, Brandon Reagen, Todd M. Austin
2020	—	`conf`	Thwarting Control Plane Attacks with Displaced and Dilated Address Spaces. HOST Lauren Biernacki, Mark Gallagher, Valeria Bertacco, Todd M. Austin
2019	A*	`conf`	Cyclone: Detecting Contention-Based Cache Information Leaks Through Cyclic Interference. MICRO Austin Harris, Shijia Wei, Prateek Sahu, Pranav Kumar, Todd M. Austin, Mohit Tiwari
2019	A*	`conf`	Morpheus: A Vulnerability-Tolerant Secure Architecture Based on Ensembles of Moving Target Defenses with Churn. ASPLOS Mark Gallagher, Lauren Biernacki, Shibo Chen, Zelalem Birhanu Aweke, Salessawi Ferede Yitbarek, Misiker Tadesse Aga, Austin Harris, Zhixing Xu, Baris Kasikci, Valeria Bertacco, Sharad Malik, Mohit Tiwari, Todd M. Austin
2019	J	`jnl`	Neverland: Lightweight Hardware Extensions for Enforcing Operating System Integrity. CoRR Salessawi Ferede Yitbarek, Todd M. Austin
2019	A	`conf`	SiPterposer: A Fault-Tolerant Substrate for Flexible System-in-Package Design. DATE Pete Ehrett, Todd M. Austin, Valeria Bertacco
2019	A	`conf`	Smokestack: Thwarting DOP Attacks with Runtime Stack Layout Randomization. CGO Misiker Tadesse Aga, Todd M. Austin
2019	—	`ed.`	VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms - 26th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018, Verona, Italy, October 8-10, 2018, Revised and Extended Selected Papers VLSI-SoC (Selected Papers) Nicola Bombieri, Graziano Pravadelli, Masahiro Fujita, Todd M. Austin, Ricardo Reis
2019	B	`conf`	Wrangling in the Power of Code Pointers with ProxyCFI. DBSec Misiker Tadesse Aga, Colton Holoday, Todd M. Austin
2018	A*	`conf`	Reducing the overhead of authenticated memory encryption using delta encoding and ECC memory. DAC Salessawi Ferede Yitbarek, Todd M. Austin
2018	A	`conf`	SWAN: mitigating hardware trojans with design ambiguity. ICCAD Timothy Linscott, Pete Ehrett, Valeria Bertacco, Todd M. Austin
2018	A	`conf`	Vulnerability-tolerant secure architectures. ICCAD Todd M. Austin, Valeria Bertacco, Baris Kasikci, Sharad Malik, Mohit Tiwari
2018	A	`conf`	uSFI: Ultra-lightweight software fault isolation for IoT-class devices. DATE Zelalem Birhanu Aweke, Todd M. Austin
2018	A	`conf`	Øzone: Efficient execution with zero timing leakage for modern microarchitectures. DATE Zelalem Birhanu Aweke, Todd M. Austin
2017	A*	`conf`	Cold Boot Attacks are Still Hot: Security Analysis of Memory Scramblers in Modern Processors. HPCA Salessawi Ferede Yitbarek, Misiker Tadesse Aga, Reetuparna Das, Todd M. Austin
2017	—	`conf`	Energy efficient object detection on the mobile GP-GPU. AFRICON Fitsum Assamnew Andargie, Jonathan Rose, Todd M. Austin, Valeria Bertacco
2017	J	`jnl`	Exploiting the analog properties of digital circuits for malicious hardware. Commun. ACM Kaiyuan Yang, Matthew Hicks, Qing Dong, Todd M. Austin, Dennis Sylvester
2017	A	`conf`	Keynote: Peering into the post Moore's Law world. ISLPED Todd M. Austin
2017	J	`jnl`	Ozone: Efficient Execution with Zero Timing Leakage for Modern Microarchitectures. CoRR Zelalem Birhanu Aweke, Todd M. Austin
2017	A*	`conf`	Regaining Lost Cycles with HotCalls: A Fast Interface for SGX Secure Enclaves. ISCA Ofir Weisse, Valeria Bertacco, Todd M. Austin
2017	—	`conf`	SNIFFER: A high-accuracy malware detector for enterprise-based systems. IVSW Evan Chavis, Harrison Davis, Yijun Hou, Matthew Hicks, Salessawi Ferede Yitbarek, Todd M. Austin, Valeria Bertacco
2017	—	`conf`	When good protections go bad: Exploiting anti-DoS measures to accelerate rowhammer attacks. HOST Misiker Tadesse Aga, Zelalem Birhanu Aweke, Todd M. Austin
2017	—	`conf`	Øzone: Efficient execution with zero timing leakage for modern microarchitectures. HOST Zelalem Birhanu Aweke, Todd M. Austin
2016	A*	`conf`	A2: Analog Malicious Hardware. IEEE Symposium on Security and Privacy Kaiyuan Yang, Matthew Hicks, Qing Dong, Todd M. Austin, Dennis Sylvester
2016	A*	`conf`	ANVIL: Software-Based Protection Against Next-Generation Rowhammer Attacks. ASPLOS Zelalem Birhanu Aweke, Salessawi Ferede Yitbarek, Rui Qiao, Reetuparna Das, Matthew Hicks, Yossi Oren, Todd M. Austin
2016	A	`conf`	Exploring specialized near-memory processing for data intensive operations. DATE Salessawi Ferede Yitbarek, Tao Yang, Reetuparna Das, Todd M. Austin
2016	J	`jnl`	On Architectural Support for Systems Security. IEEE Micro Mohit Tiwari, Todd M. Austin
2015	B	`conf`	Bridging the Moore's Law Performance Gap with Innovation Scaling. ICPE Todd M. Austin
2015	A	`conf`	Getting in control of your control flow with control-data isolation. CGO William Arthur, Ben Mehne, Reetuparna Das, Todd M. Austin
2015	C	`conf`	Keynote talk I: Ending the Tyranny of Amdahl's Law. ICCD Todd M. Austin
2015	A*	`conf`	Locking down insecure indirection with hardware-based control-data isolation. MICRO William Arthur, Sahil Madeka, Reetuparna Das, Todd M. Austin
2013	Misc	`conf`	EVA: An efficient vision architecture for mobile systems. CASES Jason Clemons, Andrea Pellegrini, Silvio Savarese, Todd M. Austin
2013	A	`conf`	Schnauzer: scalable profiling for likely security bug sites. CGO William Arthur, Biruk Mammo, Ricardo Rodríguez Jorge, Todd M. Austin, Valeria Bertacco
2012	A*	`conf`	A case for unlimited watchpoints. ASPLOS Joseph L. Greathouse, Hongyi Xin, Yixin Luo, Todd M. Austin
2012	A	`conf`	CrashTest'ing SWAT: Accurate, gate-level evaluation of symptom-based resiliency solutions. DATE Andrea Pellegrini, Robert Smolinski, Lei Chen, Xin Fu, Siva Kumar Sastry Hari, Junhao Jiang, Sarita V. Adve, Todd M. Austin, Valeria Bertacco
2012	—	`conf`	MVSS: Michigan Visual Sonification System. ESPA Jason Clemons, Sid Ying-Ze Bao, Silvio Savarese, Todd M. Austin, Vinay Sharma
2011	A*	`conf`	Demand-driven software race detection using hardware performance counters. ISCA Joseph L. Greathouse, Zhiqiang Ma, Matthew I. Frank, Ramesh Peri, Todd M. Austin
2011	A*	`conf`	EFFEX: an embedded processor for computer vision based feature extraction. DAC Jason Clemons, Andrew Jones, Robert Perricone, Silvio Savarese, Todd M. Austin
2011	A	`conf`	Highly scalable distributed dataflow analysis. CGO Joseph L. Greathouse, Chelsea LeBlanc, Todd M. Austin, Valeria Bertacco
2011	—	`conf`	MEVBench: A mobile computer vision benchmarking suite. IISWC Jason Clemons, Haishan Zhu, Silvio Savarese, Todd M. Austin
2011	—	`conf`	The potential of sampling for dynamic analysis. PLAS Joseph L. Greathouse, Todd M. Austin
2010	A	`conf`	Fault-based attack of RSA authentication. DATE Andrea Pellegrini, Valeria Bertacco, Todd M. Austin
2010	A*	`conf`	Using introspective software-based testing for post-silicon debug and repair. DAC Kypros Constantinides, Todd M. Austin
2010	A*	`conf`	What input-language is the best choice for high level synthesis (HLS)? DAC Daniel Gajski, Todd M. Austin, Steve Svoboda
2009	J	`jnl`	A Flexible Software-Based Framework for Online Detection of Hardware Defects. IEEE Trans. Computers Kypros Constantinides, Onur Mutlu, Todd M. Austin, Valeria Bertacco
2009	J	`jnl`	Energy-Efficient Subthreshold Processor Design. IEEE Trans. Very Large Scale Integr. Syst. Bo Zhai, Sanjay Pant, Leyla Nazhandali, Scott Hanson, Javin Olson, Anna Reeves, Michael Minuth, Ryan Helfand, Todd M. Austin, Dennis Sylvester, David T. Blaauw
2008	C	`conf`	CrashTest: A fast high-fidelity FPGA-based resiliency analysis framework. ICCD Andrea Pellegrini, Kypros Constantinides, Dan Zhang, Shobana Sudhakar, Valeria Bertacco, Todd M. Austin
2008	J	`jnl`	Exploiting selective placement for low-cost memory protection. ACM Trans. Archit. Code Optim. Mojtaba Mehrara, Todd M. Austin
2008	J	`jnl`	Exploring Variability and Performance in a Sub-200-mV Processor. IEEE J. Solid State Circuits Scott Hanson, Bo Zhai, Mingoo Seok, Brian Cline, Kevin Zhou, Meghna Singhal, Michael Minuth, Javin Olson, Leyla Nazhandali, Todd M. Austin, Dennis Sylvester, David T. Blaauw
2008	A	`conf`	On the rules of low-power design (and how to break them). ISLPED Todd M. Austin
2008	A*	`conf`	Online design bug detection: RTL analysis, flexible mechanisms, and evaluation. MICRO Kypros Constantinides, Onur Mutlu, Todd M. Austin
2008	A*	`conf`	Polymorphic On-Chip Networks. ISCA Martha Mercaldi Kim, John D. Davis, Mark Oskin, Todd M. Austin
2008	J	`jnl`	Reliable Systems on Unreliable Fabrics. IEEE Des. Test Comput. Todd M. Austin, Valeria Bertacco, Scott A. Mahlke, Yu Cao
2008	A*	`conf`	Testudo: Heavyweight security analysis via statistical sampling. MICRO Joseph L. Greathouse, Ilya Wagner, David A. Ramos, Gautam Bhatnagar, Todd M. Austin, Valeria Bertacco, Seth Pettie
2008	J	`jnl`	Using Field-Repairable Control Logic to Correct Design Errors in Microprocessors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ilya Wagner, Valeria Bertacco, Todd M. Austin
2007	J	`jnl`	Architecting a reliable CMP switch architecture. ACM Trans. Archit. Code Optim. Kypros Constantinides, Stephen Plaza, Jason A. Blome, Valeria Bertacco, Scott A. Mahlke, Todd M. Austin, Bin Zhang, Michael Orshansky
2007	A*	`conf`	Architectural implications of brick and mortar silicon manufacturing. ISCA Martha Mercaldi Kim, Mojtaba Mehrara, Mark Oskin, Todd M. Austin
2007	J	`jnl`	DVS for On-Chip Bus Designs Based on Timing Error Correction CoRR Himanshu Kaul, Dennis Sylvester, David T. Blaauw, Trevor N. Mudge, Todd M. Austin
2007	A	`conf`	Low-cost protection for SER upsets and silicon defects. DATE Mojtaba Mehrara, Mona Attariyan, Smitha Shyam, Kypros Constantinides, Valeria Bertacco, Todd M. Austin
2007	J	`jnl`	Microprocessor Verification via Feedback-Adjusted Markov Models. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ilya Wagner, Valeria Bertacco, Todd M. Austin
2007	A*	`conf`	Software-Based Online Detection of Hardware Defects Mechanisms, Architectural Support, and Evaluation. MICRO Kypros Constantinides, Onur Mutlu, Todd M. Austin, Valeria Bertacco
2006	J	`jnl`	A self-tuning DVS processor using delay-error detection and correction. IEEE J. Solid State Circuits Shidhartha Das, David Roberts, SeokWoo Lee, Sanjay Pant, David T. Blaauw, Todd M. Austin, Krisztián Flautner, Trevor N. Mudge
2006	A*	`conf`	BulletProof: a defect-tolerant CMP switch architecture. HPCA Kypros Constantinides, Stephen Plaza, Jason A. Blome, Bin Zhang, Valeria Bertacco, Scott A. Mahlke, Todd M. Austin, Michael Orshansky
2006	—	`conf`	Depth-driven verification of simultaneous interfaces. ASP-DAC Ilya Wagner, Valeria Bertacco, Todd M. Austin
2006	—	`conf`	Razor: a low-power pipeline based on circuit-level timing speculation. SBCCI Todd M. Austin
2006	—	`conf`	Reliability-aware data placement for partial memory protection in embedded processors. Memory System Performance and Correctness Mojtaba Mehrara, Todd M. Austin
2006	—	`conf`	Robust low power computing in the nanoscale era. SBCCI Todd M. Austin
2006	A*	`conf`	Shielding against design flaws with field repairable control logic. DAC Ilya Wagner, Valeria Bertacco, Todd M. Austin
2006	A*	`conf`	Ultra low-cost defect protection for microprocessor pipelines. ASPLOS Smitha Shyam, Kypros Constantinides, Sujay Phadke, Valeria Bertacco, Todd M. Austin
2005	Misc	`conf`	A second-generation sensor network processor with application-driven memory optimizations and out-of-order execution. CASES Leyla Nazhandali, Michael Minuth, Bo Zhai, Javin Olson, Todd M. Austin, David T. Blaauw
2005	A	`conf`	DVS for On-Chip Bus Designs Based on Timing Error Correction. DATE Himanshu Kaul, Dennis Sylvester, David T. Blaauw, Trevor N. Mudge, Todd M. Austin
2005	C	`conf`	Deployment of Better Than Worst-Case Design: Solutions and Needs. ICCD Todd M. Austin, Valeria Bertacco
2005	A*	`conf`	Energy Optimization of Subthreshold-Voltage Sensor Network Processors. ISCA Leyla Nazhandali, Bo Zhai, Javin Olson, Anna Reeves, Michael Minuth, Ryan Helfand, Sanjay Pant, Todd M. Austin, David T. Blaauw
2005	—	`conf`	Error Analysis for the Support of Robust Voltage Scaling. ISQED David Roberts, Todd M. Austin, David T. Blaauw, Trevor N. Mudge, Krisztián Flautner
2005	—	`conf`	Opportunities and challenges for better than worst-case design. ASP-DAC Todd M. Austin, Valeria Bertacco, David T. Blaauw, Trevor N. Mudge
2005	A*	`conf`	StressTest: an automatic approach to test generation via activity monitors. DAC Ilya Wagner, Valeria Bertacco, Todd M. Austin
2004	A*	`conf`	Circuit-aware architectural simulation. DAC SeokWoo Lee, Shidhartha Das, Valeria Bertacco, Todd M. Austin, David T. Blaauw, Trevor N. Mudge
2004	A*	`conf`	Designing robust microarchitectures. DAC Todd M. Austin
2004	J	`jnl`	Making Typical Silicon Matter with Razor. Computer Todd M. Austin, David T. Blaauw, Trevor N. Mudge, Krisztián Flautner
2004	Misc	`conf`	Memory system design space exploration for low-power, real-time speech recognition. CODES+ISSS Rajeev Krishna, Scott A. Mahlke, Todd M. Austin
2004	A	`conf`	Microarchitectural power modeling techniques for deep sub-micron microprocessors. ISLPED Nam Sung Kim, Taeho Kgil, Valeria Bertacco, Todd M. Austin, Trevor N. Mudge
2004	J	`jnl`	Mobile Supercomputers. Computer Todd M. Austin, David T. Blaauw, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Wayne H. Wolf
2004	J	`jnl`	Razor: Circuit-Level Correction of Timing Errors for Low-Power Operation. IEEE Micro Dan Ernst, Shidhartha Das, SeokWoo Lee, David T. Blaauw, Todd M. Austin, Trevor N. Mudge, Nam Sung Kim, Krisztián Flautner
2004	J	`jnl`	Recent extensions to the SimpleScalar tool suite. SIGMETRICS Perform. Evaluation Rev. Doug Burger, Todd M. Austin, Stephen W. Keckler
2004	A	`conf`	Reducing pipeline energy demands with local DVS and dynamic retiming. ISLPED SeokWoo Lee, Shidhartha Das, Toan Pham, Todd M. Austin, David T. Blaauw, Trevor N. Mudge
2003	A*	`conf`	A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor. MICRO Shubhendu S. Mukherjee, Christopher T. Weaver, Joel S. Emer, Steven K. Reinhardt, Todd M. Austin
2003	Misc	`conf`	Architectural optimizations for low-power, real-time speech recognition. CASES Rajeev Krishna, Scott A. Mahlke, Todd M. Austin
2003	A*	`conf`	Cyclone: A Broadcast-Free Dynamic Instruction Scheduler with Selective Replay. ISCA Dan Ernst, Andrew Hamel, Todd M. Austin
2003	A*	`conf`	High Coverage Detection of Input-Related Security Faults. USENIX Security Symposium Eric Larson, Todd M. Austin
2003	J	`jnl`	Leakage Current: Moore's Law Meets Static Power. Computer Nam Sung Kim, Todd M. Austin, David T. Blaauw, Trevor N. Mudge, Krisztián Flautner, Jie S. Hu, Mary Jane Irwin, Mahmut T. Kandemir, Narayanan Vijaykrishnan
2003	J	`jnl`	Measuring Architectural Vulnerability Factors. IEEE Micro Shubhendu S. Mukherjee, Christopher T. Weaver, Joel S. Emer, Steven K. Reinhardt, Todd M. Austin
2003	A*	`conf`	Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation. MICRO Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pant, Rajeev R. Rao, Toan Pham, Conrad H. Ziesler, David T. Blaauw, Todd M. Austin, Krisztián Flautner, Trevor N. Mudge
2002	Misc	`conf`	Effective support of simulation in computer architecture instruction. WCAE Christopher T. Weaver, Eric Larson, Todd M. Austin
2002	A*	`conf`	Efficient Dynamic Scheduling Through Tag Elimination. ISCA Dan Ernst, Todd M. Austin
2002	—	`conf`	High Performance and Energy Efficient Serial Prefetch Architecture. ISHPC Glenn Reinman, Brad Calder, Todd M. Austin
2002	J	`jnl`	Performance Simulation Tools. Computer Shubhendu S. Mukherjee, Sarita V. Adve, Todd M. Austin, Joel S. Emer, Peter S. Magnusson
2002	J	`jnl`	SimpleScalar: An Infrastructure for Computer System Modeling. Computer Todd M. Austin, Eric Larson, Dan Ernst
2001	A	`conf`	A Fault Tolerant Approach to Microprocessor Design. DSN Christopher T. Weaver, Todd M. Austin
2001	Misc	`conf`	Application specific architectures: a recipe for fast, flexible and power efficient designs. CASES Christopher T. Weaver, Rajeev Krishna, Lisa Wu, Todd M. Austin
2001	A*	`conf`	CryptoManiac: a fast flexible architecture for secure communication. ISCA Lisa Wu, Christopher T. Weaver, Todd M. Austin
2001	J	`jnl`	Design for Verification? IEEE Des. Test Comput. Todd M. Austin
2001	B	`conf`	MASE: a novel infrastructure for detailed microarchitectural modeling. ISPASS Eric Larson, Saugata Chatterjee, Todd M. Austin
2001	J	`jnl`	Optimizations Enabled by a Decoupled Front-End Architecture. IEEE Trans. Computers Glenn Reinman, Brad Calder, Todd M. Austin
2001	B	`conf`	Performance analysis using pipeline visualization. ISPASS Christopher T. Weaver, Kenneth C. Barr, Eric D. Marsman, Dan Ernst, Todd M. Austin
2001	A*	`conf`	Scalable Hybrid Verification of Complex Microprocessors. DAC Maher N. Mneimneh, Fadi A. Aloul, Christopher T. Weaver, Saugata Chatterjee, Karem A. Sakallah, Todd M. Austin
2000	A*	`conf`	Architectural Support for Fast Symmetric-Key Cryptography. ASPLOS Jerome Burke, John McDonald, Todd M. Austin
2000	A*	`conf`	Compiler controlled value prediction using branch predictor based confidence. MICRO Eric Larson, Todd M. Austin
2000	J	`jnl`	DIVA: A Dynamic Approach to Microprocessor Verification. J. Instr. Level Parallelism Todd M. Austin
2000	A*	`conf`	Efficient checker processor design. MICRO Saugata Chatterjee, Christopher T. Weaver, Todd M. Austin
1999	A*	`conf`	A Scalable Front-End Architecture for Fast Instruction Delivery. ISCA Glenn Reinman, Todd M. Austin, Brad Calder
1999	J	`jnl`	Challenges in processor modeling and validation [Guest Editors?? introduction]. IEEE Micro Pradip Bose, Thomas M. Conte, Todd M. Austin
1999	A	`conf`	Classifying load and store instructions for memory renaming. International Conference on Supercomputing Glenn Reinman, Brad Calder, Dean M. Tullsen, Gary S. Tyson, Todd M. Austin
1999	A*	`conf`	DIVA: A Reliable Substrate for Deep Submicron Microarchitecture Design. MICRO Todd M. Austin
1999	A*	`conf`	Fetch Directed Instruction Prefetching. MICRO Glenn Reinman, Brad Calder, Todd M. Austin
1999	J	`jnl`	Memory Renaming: Fast, Early and Accurate Processing of Memory Communication. Int. J. Parallel Program. Gary S. Tyson, Todd M. Austin
1998	A*	`conf`	Cache-Conscious Data Placement. ASPLOS Brad Calder, Chandra Krintz, Simmi John, Todd M. Austin
1998	—	`conf`	Dynamic Hammock Predication for Non-Predicated Instruction Set Architectures. IEEE PACT Artur Klauser, Todd M. Austin, Dirk Grunwald, Brad Calder
1998	—	`conf`	The SimpleScalar tool set as an instructional tool: experiences and future directions. WCAE@HPCA Todd M. Austin
1997	A*	`conf`	Improving the Accuracy and Performance of Memory Communication Through Renaming. MICRO Gary S. Tyson, Todd M. Austin
1997	A*	`conf`	On High-Bandwidth Data Cache Design for Multi-Issue Processors. MICRO Jude A. Rivers, Gary S. Tyson, Edward S. Davidson, Todd M. Austin
1997	J	`jnl`	The SimpleScalar tool set, version 2.0. SIGARCH Comput. Archit. News Doug Burger, Todd M. Austin
1996	—	`—`	Hardware and software mechanisms for reducing load latency. Todd M. Austin
1996	A*	`conf`	High-Bandwidth Address Translation for Multiple-Issue Processors. ISCA Todd M. Austin, Gurindar S. Sohi
1995	A*	`conf`	Streamlining Data Cache Access with Fast Address Calculation. ISCA Todd M. Austin, Dionisios N. Pnevmatikatos, Gurindar S. Sohi
1995	A*	`conf`	Zero-cycle loads: microarchitecture support for reducing load latency. MICRO Todd M. Austin, Gurindar S. Sohi
1994	A*	`conf`	Efficient Detection of All Pointer and Array Access Errors. PLDI Todd M. Austin, Scott E. Breach, Gurindar S. Sohi
1992	A*	`conf`	Dynamic Dependency Analysis of Ordinary Programs. ISCA Todd M. Austin, Gurindar S. Sohi