Tobias Wiersema

18 papers A* 1A 2B 1Journal 6Unranked 7
YearRankTypeTitle / Venue / Authors
2024 J jnl
Correction to: Post-configuration Activation of Hardware Trojans in FPGAs.
J. Hardw. Syst. Secur.
Qazi Arbab Ahmed, Tobias Wiersema, Marco Platzner
2024 J jnl
Post-configuration Activation of Hardware Trojans in FPGAs.
J. Hardw. Syst. Secur.
Qazi Arbab Ahmed, Tobias Wiersema, Marco Platzner
2022 A conf
MUSCAT: MUS-based Circuit Approximation Technique.
DATE
Linus Witschen, Tobias Wiersema, Matthias Artmann, Marco Platzner
2022 A* conf
Search space characterization for approximate logic synthesis.
DAC
Linus Witschen, Tobias Wiersema, Lucas Reuter, Marco Platzner
2021 — —
Guaranteeing properties of reconfigurable hardware circuits with proof-carrying hardware.
Tobias Wiersema
2021 A conf
Malicious Routing: Circumventing Bitstream-level Verification for FPGAs.
DATE
Qazi Arbab Ahmed, Tobias Wiersema, Marco Platzner
2021 J jnl
Software/Hardware Co-Verification for Custom Instruction Set Processors.
IEEE Access
Marie-Christine Jakobs, Felix Pauck, Marco Platzner, Heike Wehrheim, Tobias Wiersema
2021 — conf
Timing Optimization for Virtual FPGA Configurations.
ARC
Linus Witschen, Tobias Wiersema, Masood Raeisi Nafchi, Arne Bockhorn, Marco Platzner
2020 J jnl
Proof-Carrying Approximate Circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Linus Witschen, Tobias Wiersema, Marco Platzner
2019 — conf
Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan.
ARC
Qazi Arbab Ahmed, Tobias Wiersema, Marco Platzner
2017 J jnl
Proof-Carrying Hardware via Inductive Invariants.
ACM Trans. Design Autom. Electr. Syst.
Tobias Isenberg, Marco Platzner, Heike Wehrheim, Tobias Wiersema
2016 J jnl
An architecture and design tool flow for embedding a virtual FPGA into a reconfigurable system-on-chip.
Comput. Electr. Eng.
Tobias Wiersema, Arne Bockhorn, Marco Platzner
2016 — conf
Verifying worst-case completion times for reconfigurable hardware modules using proof-carrying hardware.
ReCoSoC
Tobias Wiersema, Marco Platzner
2015 — conf
On-The-Fly Verification of Reconfigurable Image Processing Modules Based on a Proof-Carrying Hardware Approach.
ARC
Tobias Wiersema, Sen Wu, Marco Platzner
2014 — conf
Embedding FPGA overlays into configurable Systems-on-Chip: ReconOS meets ZUMA.
ReConFig
Tobias Wiersema, Arne Bockhorn, Marco Platzner
2014 B conf
Integrating Software and Hardware Verification.
IFM
Marie-Christine Jakobs, Marco Platzner, Heike Wehrheim, Tobias Wiersema
2014 — conf
Memory security in reconfigurable computers: Combining formal verification with monitoring.
FPT
Tobias Wiersema, Stephanie Drzevitzky, Marco Platzner
2011 — conf
Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler.
ASAP
Tobias Beisel, Tobias Wiersema, Christian Plessl, André Brinkmann