Timo Viitanen - RankMe

41 papers Misc 2Journal 14Unranked 24

Year	Rank	Type	Title / Venue / Authors
2019	J	`jnl`	ALMARVI Execution Platform: Heterogeneous Video Processing SoC Platform on FPGA. J. Signal Process. Syst. Joost Hoozemans, Jeroen van Straten, Timo Viitanen, Aleksi Tervo, Jiri Kadlec, Zaid Al-Ars
2019	J	`jnl`	An integrated hardware/software design methodology for signal processing systems. J. Syst. Archit. Lin Li, Carlo Sau, Tiziana Fanni, Jingui Li, Timo Viitanen, François Christophe, Francesca Palumbo, Luigi Raffo, Heikki Huttunen, Jarmo Takala, Shuvra S. Bhattacharyya
2019	—	`conf`	Are we done with ray tracing? SIGGRAPH Courses Alexander Keller, Timo Viitanen, Colin Barré-Brisebois, Christoph Schied, Morgan McGuire
2019	J	`jnl`	Blockwise Multi-Order Feature Regression for Real-Time Path-Tracing Reconstruction. ACM Trans. Graph. Matias Koskela, Kalle Immonen, Markku J. Mäkitalo, Alessandro Foi, Timo Viitanen, Pekka Jääskeläinen, Heikki Kultala, Jarmo Takala
2019	—	`conf`	Foveated Real-Time Path Tracing in Visual-Polar Space. EGSR (DL/I) Matias Koskela, Atro Lotvonen, Markku J. Mäkitalo, Petrus E. J. Kivi, Timo Viitanen, Pekka Jääskeläinen
2019	J	`jnl`	LordCore: Energy-Efficient OpenCL-Programmable Software-Defined Radio Coprocessor. IEEE Trans. Very Large Scale Integr. Syst. Heikki Kultala, Timo Viitanen, Heikki Berg, Pekka Jääskeläinen, Joonas Multanen, Mikko Kokkonen, Kalle Raiskila, Tommi Zetterman, Jarmo Takala
2018	—	`conf`	AivoTTA: an energy efficient programmable accelerator for CNN-based object recognition. SAMOS Jos IJzerman, Timo Viitanen, Pekka Jääskeläinen, Heikki Kultala, Lasse Lehtonen, Maurice Peemen, Henk Corporaal, Jarmo Takala
2018	—	`—`	Hardware Accelerators for Animated Ray Tracing. Timo Viitanen
2018	J	`jnl`	Instantaneous foveated preview for progressive Monte Carlo rendering. Comput. Vis. Media Matias Koskela, Kalle Immonen, Timo Viitanen, Pekka Jääskeläinen, Joonas Multanen, Jarmo H. Takala
2018	J	`jnl`	Instruction Fetch Energy Reduction with Biased SRAMs. J. Signal Process. Syst. Joonas Multanen, Timo Viitanen, Pekka Jääskeläinen, Jarmo Takala
2018	—	`conf`	LoTTA: Energy-Efficient Processor for Always-On Applications. SiPS Joonas Multanen, Heikki Kultala, Pekka Jääskeläinen, Timo Viitanen, Aleksi Tervo, Jarmo Takala
2018	J	`jnl`	PLOCTree: A Fast, High-Quality Hardware BVH Builder. Proc. ACM Comput. Graph. Interact. Tech. Timo Viitanen, Matias Koskela, Pekka Jääskeläinen, Aleksi Tervo, Jarmo Takala
2018	—	`conf`	Sparse Sampling for Real-time Ray Tracing. VISIGRAPP (1: GRAPP) Timo Viitanen, Matias Koskela, Kalle Immonen, Markku J. Mäkitalo, Pekka Jääskeläinen, Jarmo Takala
2018	—	`conf`	Transport-Triggered Soft Cores. IPDPS Workshops Pekka Jääskeläinen, Aleksi Tervo, Guillermo Payá Vayá, Timo Viitanen, Nicolai Behmann, Jarmo Takala, Holger Blume
2018	J	`jnl`	Variable Length Instruction Compression on Transport Triggered Architectures. Int. J. Parallel Program. Timo Viitanen, Janne Helkala, Heikki Kultala, Pekka Jääskeläinen, Jarmo Takala, Tommi Zetterman, Heikki Berg
2017	J	`jnl`	A 5.3 pJ/op approximate TTA VLIW tailored for machine learning. Microelectron. J. Jukka Teittinen, Markus Hiienkari, Indre Zliobaite, Jaakko Hollmén, Heikki Berg, Juha Heiskala, Timo Viitanen, Jesse Simonsson, Lauri Koskinen
2017	—	`conf`	Design and implementation of a multi-mode harris corner detector architecture. NORCAS Jingui Li, Timo Viitanen, Lin Li, Jarmo Takala, Shuvra S. Bhattacharyya
2017	—	`conf`	Exposed datapath optimizations for loop scheduling. SAMOS Heikki O. Kultala, Pekka Jääskeläinen, Johannes IJzerman, Lasse Lehtonen, Timo Viitanen, Markku J. Mäkitalo, Jarmo H. Takala
2017	J	`jnl`	Fast Hardware Construction and Refitting of Quantized Bounding Volume Hierarchies. Comput. Graph. Forum Timo Viitanen, Matias Koskela, Pekka Jääskeläinen, Kalle Immonen, Jarmo Takala
2017	—	`conf`	Foveated instant preview for progressive rendering. SIGGRAPH Asia Technical Briefs Matias Koskela, Kalle Immonen, Timo Viitanen, Pekka Jääskeläinen, Joonas Multanen, Jarmo Takala
2017	J	`jnl`	Hardware design methodology using lightweight dataflow and its integration with low power techniques. J. Syst. Archit. Tiziana Fanni, Lin Li, Timo Viitanen, Carlo Sau, Renjie Xie, Francesca Palumbo, Luigi Raffo, Heikki Huttunen, Jarmo Takala, Shuvra S. Bhattacharyya
2017	J	`jnl`	MergeTree: A Fast Hardware HLBVH Constructor for Animated Ray Tracing. ACM Trans. Graph. Timo Viitanen, Matias Koskela, Pekka Jääskeläinen, Heikki Kultala, Jarmo Takala
2016	—	`conf`	Aggressively bypassing list scheduler for transport triggered architectures. SAMOS Heikki O. Kultala, Timo Viitanen, Pekka Jääskeläinen, Jarmo Takala
2016	—	`conf`	Foveated Path Tracing - A Literature Review and a Performance Gain Analysis. ISVC (1) Matias Koskela, Timo Viitanen, Pekka Jääskeläinen, Jarmo Takala
2016	—	`conf`	Half-precision Floating-point Ray Traversal. VISIGRAPP (1: GRAPP) Matias Koskela, Timo Viitanen, Pekka Jääskeläinen, Jarmo Takala
2016	J	`jnl`	Improving Code Density with Variable Length Encoding Aware Instruction Scheduling. J. Signal Process. Syst. Heikki Kultala, Timo Viitanen, Pekka Jääskeläinen, Janne Helkala, Jarmo Takala
2016	—	`conf`	Low power design methodology for signal processing systems using lightweight dataflow techniques. DASIP Lin Li, Tiziana Fanni, Timo Viitanen, Renjie Xie, Francesca Palumbo, Luigi Raffo, Heikki Huttunen, Jarmo Takala, Shuvra S. Bhattacharyya
2016	—	`conf`	Multi bounding volume hierarchies for ray tracing pipelines. SIGGRAPH Asia Technical Briefs Timo Viitanen, Matias Koskela, Pekka Jääskeläinen, Jarmo Takala
2016	—	`conf`	OpenCL programmable exposed datapath high performance low-power image signal processor. NORCAS Joonas Multanen, Heikki Kultala, Matias Koskela, Timo Viitanen, Pekka Jääskeläinen, Jarmo Takala, Aram Danielyan, Cristóvão Cruz
2016	—	`conf`	Xor-Masking: A Novel Statistical Method for Instruction Read Energy Reduction in Contemporary SRAM Technologies. SiPS Joonas Multanen, Timo Viitanen, Pekka Jääskeläinen, Jarmo Takala
2015	J	`jnl`	Code Density and Energy Efficiency of Exposed Datapath Architectures. J. Signal Process. Syst. Pekka Jääskeläinen, Heikki Kultala, Timo Viitanen, Jarmo Takala
2015	—	`conf`	MergeTree: a HLBVH constructor for mobile systems. SIGGRAPH Asia Technical Briefs Timo Viitanen, Matias Koskela, Pekka Jääskeläinen, Heikki Kultala, Jarmo Takala
2015	—	`conf`	Power optimizations for transport triggered SIMD processors. SAMOS Joonas Multanen, Timo Viitanen, Henry Linjamaki, Heikki Kultala, Pekka Jääskeläinen, Jarmo Takala, Lauri Koskinen, Jesse Simonsson, Heikki Berg, Kalle Raiskila, Tommi Zetterman
2015	—	`conf`	Rapid customization of image processors using Halide. GlobalSIP Ville Korhonen, Pekka Jääskeläinen, Matias Koskela, Timo Viitanen, Jarmo Takala
2014	—	`conf`	Compiler optimizations for code density of variable length instructions. SiPS Heikki Kultala, Timo Viitanen, Pekka Jääskeläinen, Janne Helkala, Jarmo Takala
2014	Misc	`conf`	Heuristics for greedy transport triggered architecture interconnect exploration. CASES Timo Viitanen, Heikki Kultala, Pekka Jääskeläinen, Jarmo Takala
2014	—	`conf`	Variable length instruction compression on Transport Triggered Architectures. ICSAMOS Janne Helkala, Timo Viitanen, Heikki Kultala, Pekka Jääskeläinen, Jarmo Takala, Tommi Zetterman, Heikki Berg
2013	—	`conf`	Inexpensive correctly rounded floating-point division and square root with input scaling. SiPS Timo Viitanen, Pekka Jääskeläinen, Jarmo Takala
2013	Misc	`conf`	Simplified floating-point division and square root. ICASSP Timo Viitanen, Pekka Jääskeläinen, Otto Esko, Jarmo Takala
2012	—	`conf`	Spatter Tracking in Laser Machining. ISVC (2) Timo Viitanen, Jari Kolehmainen, Robert Piché, Yasuhiro Okamoto
2010	—	`conf`	Efficient floating-point texture decompression. SoC Tomi Aarnio, Claudio Brunelli, Timo Viitanen