Tim Piessens

11 papers Journal 5Unranked 6
YearRankTypeTitle / Venue / Authors
2017 J jnl
Introduction to the Special Issue on the 2017 IEEE International Solid-State Circuits Conference.
IEEE J. Solid State Circuits
Tim Piessens, Seung-Tak Ryu, Chih-Ming Hung, Alyosha C. Molnar, Mounir Meghelli
2017 — conf
Session 5 overview: Analog techniques.
ISSCC
Tim Piessens, Vadim Ivanov, Axel Thomsen
2016 — conf
16.5 A flexible thin-film pixel array with a charge-to-current gain of 59µA/pC and 0.33% nonlinearity and a cost effective readout circuit for large-area X-ray imaging.
ISSCC
Florian De Roose, Kris Myny, Soeren Steudel, Myriam Willigems, Steve Smout, Tim Piessens, Jan Genoe, Wim Dehaene
2016 — conf
Session 5 overview: Analog techniques.
ISSCC
Marco Berkhout, Tim Piessens
2012 — conf
A 1.5W 10V-output Class-D amplifier using a boosted supply from a single 3.3V input in standard 1.8V/3.3V 0.18μm CMOS.
ISSCC
Bert Serneels, Eldert Geukens, Bram De Muer, Tim Piessens
2011 J jnl
Nanosecond Delay Floating High Voltage Level Shifters in a 0.35 μ m HV-CMOS Technology.
IEEE J. Solid State Circuits
Yashodhan Moghe, Torsten Lehmann, Tim Piessens
2005 J jnl
A high-voltage output driver in a 2.5-V 0.25-μm CMOS technology.
IEEE J. Solid State Circuits
Bert Serneels, Tim Piessens, Michiel Steyaert, Wim Dehaene
2005 J jnl
Behavioral analysis of self-oscillating class D line drivers.
IEEE Trans. Circuits Syst. I Regul. Pap.
Tim Piessens, Michiel Steyaert
2003 J jnl
Highly efficient xDSL line drivers in 0.35-μm CMOS using a self-oscillating power amplifier.
IEEE J. Solid State Circuits
Tim Piessens, Michiel Steyaert
2003 — conf
Oscillator pulling and synchronisation issues in self-oscillating class D power amplifiers.
ESSCIRC
Tim Piessens, Michiel Steyaert
2002 — conf
A central office combined ADSL-VDSL line driver solution in .35μm CMOS.
CICC
Tim Piessens, Michiel Steyaert