Tim Kogel

29 papers A* 3A 8C 1Misc 3Journal 6Unranked 6
YearRankTypeTitle / Venue / Authors
2025 A conf
AI-Driven Multi-Die Architecture Exploration.
ICCAD
Tim Kogel, Holger Keding
2022 J jnl
AMAIX In-Depth: A Generic Analytical Model for Deep Learning Accelerators.
Int. J. Parallel Program.
Niko Zurstraßen, Lukas Jünger, Tim Kogel, Holger Keding, Rainer Leupers
2020 — conf
AMAIX: A Generic Analytical Model for Deep Learning Accelerators.
SAMOS
Lukas Jünger, Niko Zurstraßen, Tim Kogel, Holger Keding, Rainer Leupers
2020 J jnl
An Overview of Efficient Interconnection Networks for Deep Neural Network Accelerators.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Seyed Morteza Nabavinejad, Mohammad Baharloo, Kun-Chih Chen, Maurizio Palesi, Tim Kogel, Masoumeh Ebrahimi
2020 J jnl
Guest Editorial: Communication-Aware Designs and Methodologies for Reliable and Adaptable On-Chip AI SubSystems and Accelerators.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Kun-Chih Chen, Masoumeh Ebrahimi, Maurizio Palesi, Tim Kogel
2017 — ch.
Synopsys Virtual Prototyping for Software Development and Early Architecture Analysis.
Handbook of Hardware/Software Codesign
Tim Kogel
2012 A conf
Virtual platforms: Breaking new grounds.
DATE
Rainer Leupers, Grant Martin, Roman Plyaskin, Andreas Herkersdorf, Frank Schirrmeister, Tim Kogel, Martin Vaupel
2010 Misc conf
From ESL 2010 to ESL 2015.
CODES+ISSS
Tor E. Jeremiassen, Tim Kogel, Andrés Takach, Grant Martin, Adam Donlin, Karamvir Chatha
2009 A* conf
From milliwatts to megawatts: system level power challenge.
DAC
Ruchir Puri, Eshel Haritan, Stan Krolikoski, Jason Cong, Tim Kogel, Bradley D. McCredie, John Shen, Andrés Takach
2008 A* conf
ESL hand-off: fact or EDA fiction?
DAC
Hiroyuki Yagi, Wolfgang Roesner, Tim Kogel, Eshel Haritan, Hidekazu Tangi, Michael McNamara, Gary Smith, Nikil D. Dutt, Giovanni Mancini
2008 A conf
Heterogeneous System-level Specification Using SystemC.
DATE
Eugenio Villar, Axel Jantsch, Christoph Grimm, Tim Kogel
2008 J jnl
SoC multiprocessor debugging and synchronisation using generic dynamic-connect debugger frontends.
Int. J. Embed. Syst.
Andreas Wieferink, Tim Kogel, Olaf Zerres, Rainer Leupers, Heinrich Meyr
2008 J jnl
Virtual architecture mapping: a SystemC based methodology for architectural exploration of System-on-Chips.
Int. J. Embed. Syst.
Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Heinrich Meyr
2006 — book
Integrated system-level modeling of network-on-chip enabled multi-processor platforms.
Tim Kogel, Rainer Leupers, Heinrich Meyr
2006 A conf
Virtual prototyping of embedded platforms for wireless and multimedia.
DATE
Tim Kogel, Matthew Braun
2005 A conf
A Modular Simulation Framework for Spatial and Temporal Task Mapping onto Multi-Processor SoC Platforms.
DATE
Torsten Kempf, Malte Doerper, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tim Kogel, Bart Vanthournout
2005 — conf
A framework for automated and optimized ASIP implementation supporting multiple hardware description languages.
ASP-DAC
Oliver Schliebusch, Anupam Chattopadhyay, David Kammler, Gerd Ascheid, Rainer Leupers, Heinrich Meyr, Tim Kogel
2005 C conf
OCP TLM for Architectural Modelling.
FDL
Tim Kogel, Anssi Haverinen
2005 Misc conf
Retargetable generation of TLM bus interfaces for MP-SoC platforms.
CODES+ISSS
Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tom Michiels, Achim Nohl, Tim Kogel
2004 A conf
A Methodology and Tool Suite for C Compiler Generation from ADL Processor Models.
DATE
Manuel Hohenauer, Hanno Scharwächter, Kingshuk Karuri, Oliver Wahlen, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun, Hans van Someren
2004 A conf
A System Level Processor/Communication Co-Exploration Methodology for Multi-Processor System-on-Chip Platform.
DATE
Andreas Wieferink, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun, Achim Nohl
2004 — conf
Early ISS Integration into Network-on-Chip Designs.
SAMOS
Andreas Wieferink, Malte Doerper, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
2004 A* conf
Heterogeneous MP-SoC: the solution to energy-efficient signal processing.
DAC
Tim Kogel, Heinrich Meyr
2004 — conf
Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip Designs.
SAMOS
Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
2003 — conf
A highly efficient modeling style for heterogeneous bus architectures.
SoC
Manoj Ariyamparambath, Denis Bussaglia, Bernd Reinkemeier, Tim Kogel, Torsten Kempf
2003 Misc conf
A modular simulation framework for architectural exploration of on-chip interconnection networks.
CODES+ISSS
Tim Kogel, Malte Doerper, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Serge Goossens
2003 — conf
Generic Tool-Set for SoC Mulitiprocessor Debugging and Synchronization.
ASAP
Andreas Wieferink, Tim Kogel, Achim Nohl, Andreas Hoffmann
2001 A conf
A framework for fast hardware-software co-simulation.
DATE
Andreas Hoffmann, Tim Kogel, Heinrich Meyr
2001 J jnl
A novel methodology for the design of application-specificinstruction-set processors (ASIPs) using a machine description language.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Andreas Hoffmann, Tim Kogel, Achim Nohl, Gunnar Braun, Oliver Schliebusch, Oliver Wahlen, Andreas Wieferink, Heinrich Meyr