Tien-Fu Chen

105 papers A* 12A 9B 2C 4Misc 3Journal 47Unranked 28
YearRankTypeTitle / Venue / Authors
2025 J jnl
A Survey of Reasoning and Agentic Systems in Time Series with Large Language Models.
CoRR
Ching Chang, Yidan Shi, Defu Cao, Wei Yang, Jeehyun Hwang, Haixin Wang, Jiacheng Pang, Wei Wang, Yan Liu, Wen-Chih Peng, Tien-Fu Chen
2025 J jnl
Design Space Exploration for Scalable DNN Accelerators Using a Memory-Centric Analytical Model for HW/SW Co-Design.
ACM Trans. Design Autom. Electr. Syst.
Wei-Chun Huang, Chih-Wei Tang, Kuei-Chung Chang, Tien-Fu Chen, Hsiang-Cheng Hsieh, Ming-Hsuan Tsai
2025 — conf
Enhancing Semi-Supervised Learners via Similarity-Based Self-Supervised Models.
NewCAS
ShengPo Lin, Hsiang-Cheng Hsieh, Lianzheng Lin, Kuei-Chung Chang, Juin-Ming Lu, Tay-Jyi Lin, Tien-Fu Chen
2025 — conf
Hybrid Bayesian Optimization with Early Termination Strategies for Auto Tuning.
ISVLSI
Hsiang-Cheng Hsieh, ShengPo Lin, Arbind Kumar Mahto, Kuei-Chung Chang, Juin-Ming Lu, Tay-Jyi Lin, Tien-Fu Chen
2025 J jnl
LLM4TS: Aligning Pre-Trained LLMs as Data-Efficient Time-Series Forecasters.
ACM Trans. Intell. Syst. Technol.
Ching Chang, Wei-Yao Wang, Wen-Chih Peng, Tien-Fu Chen
2025 J jnl
MemPromptTSS: Persistent Prompt Memory for Iterative Multi-Granularity Time Series State Segmentation.
CoRR
Ching Chang, Ming-Chih Lo, Chiao-Tung Chan, Wen-Chih Peng, Tien-Fu Chen
2025 A conf
PromptTSS: A Prompting-Based Approach for Interactive Multi-Granularity Time Series Segmentation.
CIKM
Ching Chang, Ming-Chih Lo, Wen-Chih Peng, Tien-Fu Chen
2025 J jnl
PromptTSS: A Prompting-Based Approach for Interactive Multi-Granularity Time Series Segmentation.
CoRR
Ching Chang, Ming-Chih Lo, Wen-Chih Peng, Tien-Fu Chen
2025 J jnl
Time-IMM: A Dataset and Benchmark for Irregular Multimodal Multivariate Time Series.
CoRR
Ching Chang, Jeehyun Hwang, Yidan Shi, Haixin Wang, Wen-Chih Peng, Tien-Fu Chen, Wei Wang
2024 — conf
A 40-nm 13.88-TOPS/W FC-DNN Engine for 16-bit Intelligent Audio Processing Featuring Weight-Sharing and Approximate Computing.
HCS
Tay-Jyi Lin, Ze Li, Yun-Cheng Chen, Chien-Tung Liu, Tien-Fu Chen, Jinn-Shyan Wang
2024 — conf
Efficient Inference of Transformers on Bare-Metal Devices with RISC-V Vector Processors.
NewCAS
Yi-Xuan Huang, Po-Han Huang, Juin-Ming Lu, Tay-Jyi Lin, Tien-Fu Chen
2024 A* conf
TimeDRL: Disentangled Representation Learning for Multivariate Time-Series.
ICDE
Ching Chang, Chiao-Tung Chan, Wei-Yao Wang, Wen-Chih Peng, Tien-Fu Chen
2023 J jnl
Adaptive Similarity-Aware Hyperparameter Tuners for Classification Tasks.
IEEE Access
Chi-Lin Hsieh, Kuei-Chung Chang, Tien-Fu Chen
2023 J jnl
LLM4TS: Two-Stage Fine-Tuning for Time-Series Forecasting with Pre-Trained LLMs.
CoRR
Ching Chang, Wen-Chih Peng, Tien-Fu Chen
2023 J jnl
TimeDRL: Disentangled Representation Learning for Multivariate Time-Series.
CoRR
Ching Chang, Chiao-Tung Chan, Wei-Yao Wang, Wen-Chih Peng, Tien-Fu Chen
2017 J jnl
A 3T1R Nonvolatile TCAM Using MLC ReRAM for Frequent-Off Instant-On Filters in IoT and Big-Data Processing.
IEEE J. Solid State Circuits
Meng-Fan Chang, Chien-Chen Lin, Albert Lee, Yen-Ning Chiang, Chia-Chen Kuo, Geng-Hau Yang, Hsiang-Jen Tsai, Tien-Fu Chen, Shyh-Shyuan Sheu
2017 J jnl
A Flexible Wildcard-Pattern Matching Accelerator via Simultaneous Discrete Finite Automata.
IEEE Trans. Very Large Scale Integr. Syst.
Hsiang-Jen Tsai, Chien-Chih Chen, Yin-Chi Peng, Ya-Han Tsao, Yen-Ning Chiang, Wei-Cheng Zhao, Meng-Fan Chang, Tien-Fu Chen
2017 J jnl
A Resistance Drift Compensation Scheme to Reduce MLC PCM Raw BER by Over 100× for Storage Class Memory Applications.
IEEE J. Solid State Circuits
Win-San Khwa, Meng-Fan Chang, Jau-Yi Wu, Ming-Hsiu Lee, Tzu-Hsiang Su, Keng-Hao Yang, Tien-Fu Chen, Tien-Yen Wang, Hsiang-Pang Li, Matthew J. BrightSky, Sangbum Kim, Hsiang-Lam Lung, Chung Lam
2017 J jnl
Energy-Efficient TCAM Search Engine Design Using Priority-Decision in Memory Technology.
IEEE Trans. Very Large Scale Integr. Syst.
Hsiang-Jen Tsai, Keng-Hao Yang, Yin-Chi Peng, Chien-Chen Lin, Ya-Han Tsao, Meng-Fan Chang, Tien-Fu Chen
2017 J jnl
Leak Stopper: An Actively Revitalized Snoop Filter Architecture with Effective Generation Control.
ACM Trans. Design Autom. Electr. Syst.
Yin-Chi Peng, Chien-Chih Chen, Hsiang-Jen Tsai, Keng-Hao Yang, Pei-Zhe Huang, Shih-Chieh Chang, Wen-Ben Jone, Tien-Fu Chen
2017 J jnl
ULV-Turbo Cache for an Instantaneous Performance Boost on Asymmetric Architectures.
IEEE Trans. Very Large Scale Integr. Syst.
Po-Hao Wang, Yung-Chen Chien, Shang-Jen Tsai, Xuan-Yu Lin, Rizal Tanjung, Yi-Sian Lin, Shu-Wei Syu, Tay-Jyi Lin, Jinn-Shyan Wang, Tien-Fu Chen
2017 J jnl
eTag: Tag-Comparison in Memory to Achieve Direct Data Access based on eDRAM to Improve Energy Efficiency of DRAM Cache.
IEEE Trans. Circuits Syst. I Regul. Pap.
Keng-Hao Yang, Hsiang-Jen Tsai, Chia-Yin Li, Paul Jendra, Meng-Fan Chang, Tien-Fu Chen
2016 — conf
7.3 A resistance-drift compensation scheme to reduce MLC PCM raw BER by over 100× for storage-class memory applications.
ISSCC
Win-San Khwa, Meng-Fan Chang, Jau-Yi Wu, Ming-Hsiu Lee, Tzu-Hsiang Su, Keng-Hao Yang, Tien-Fu Chen, Tien-Yen Wang, Hsiang-Pang Li, Matthew BrightSky, Sangbum Kim, Hsiang-Lam Lung, Chung Lam
2016 — conf
7.4 A 256b-wordlength ReRAM-based TCAM with 1ns search-time and 14× improvement in wordlength-energyefficiency-density product using 2.5T1R cell.
ISSCC
Chien-Chen Lin, Jui-Yu Hung, Wen-Zhang Lin, Chieh-Pu Lo, Yen-Ning Chiang, Hsiang-Jen Tsai, Geng-Hau Yang, Ya-Chin King, Chrong Jung Lin, Tien-Fu Chen, Meng-Fan Chang
2016 J jnl
A ReRAM-Based 4T2R Nonvolatile TCAM Using RC-Filtered Stress-Decoupled Scheme for Frequent-OFF Instant-ON Search Engines Used in IoT and Big-Data Processing.
IEEE J. Solid State Circuits
Meng-Fan Chang, Li-Yue Huang, Wen-Zhang Lin, Yen-Ning Chiang, Chia-Chen Kuo, Ching-Hao Chuang, Keng-Hao Yang, Hsiang-Jen Tsai, Tien-Fu Chen, Shyh-Shyuan Sheu
2016 J jnl
Cross-matching caches: Dynamic timing calibration and bit-level timing-failure mask caches to reduce timing discrepancies with low voltage processors.
Integr.
Po-Hao Wang, Shang-Jen Tsai, Rizal Tanjung, Tay-Jyi Lin, Jinn-Shyan Wang, Tien-Fu Chen
2016 J jnl
High-Performance Deadlock-Free ID Assignment for Advanced Interconnect Protocols.
IEEE Trans. Very Large Scale Integr. Syst.
Hsuan-Ming Chou, Yi-Chiao Chen, Keng-Hao Yang, Jean Tsao, Shih-Chieh Chang, Wen-Ben Jone, Tien-Fu Chen
2016 — conf
Variable-length VLIW encoding for code size reduction in embedded processors.
SoCC
Ting-Yu Shyu, Bo-Yu Su, Tay-Jyi Lin, Chingwei Yeh, Jinn-Shyan Wang, Tien-Fu Chen
2016 J jnl
Zero-Counting and Adaptive-Latency Cache Using a Voltage-Guardband Breakthrough for Energy-Efficient Operations.
IEEE Trans. Circuits Syst. II Express Briefs
Po-Hao Wang, Wei-Chung Cheng, Yung-Hui Yu, Tang-Chieh Kao, Chi-Lun Tsai, Pei-Yao Chang, Tay-Jyi Lin, Jinn-Shyan Wang, Tien-Fu Chen
2015 — conf
17.5 A 3T1R nonvolatile TCAM using MLC ReRAM with Sub-1ns search time.
ISSCC
Meng-Fan Chang, Chien-Chen Lin, Albert Lee, Chia-Chen Kuo, Geng-Hau Yang, Hsiang-Jen Tsai, Tien-Fu Chen, Shyh-Shyuan Sheu, Pei-Ling Tseng, Heng-Yuan Lee, Tzu-Kun Ku
2015 — conf
A latency-elastic and fault-tolerant cache for improving performance and reliability on low voltage operation.
VLSI-DAT
Yung-Hui Yu, Po-Hao Wang, Shang-Jen Tsai, Tien-Fu Chen
2015 — conf
Adaptive granularity and coordinated management for timely prefetching in multi-core systems.
VLSI-DAT
Chia-Jung Chang, Yin-Chi Peng, Chien-Chih Chen, Tien-Fu Chen, Pen-Chung Yew
2015 A* conf
Energy-efficient non-volatile TCAM search engine design using priority-decision in memory technology for DPI.
DAC
Hsiang-Jen Tsai, Keng-Hao Yang, Yin-Chi Peng, Chien-Chen Lin, Ya-Han Tsao, Meng-Fan Chang, Tien-Fu Chen
2015 — conf
Lifetime-aware LRU promotion policy for last-level cache.
VLSI-DAT
Hong-Yi Wu, Chien-Chih Chen, Hsiang-Jen Tsai, Yin-Chi Peng, Tien-Fu Chen
2015 — conf
Low-cost low-power droop-voltage-aware delay-fault-prevention designs for DVS caches.
ASICON
Pei-Yuan Chou, I-Chen Wu, Jai-Wei Lin, Xuan-Yu Lin, Tien-Fu Chen, Tay-Jyi Lin, Jinn-Shyan Wang
2015 J jnl
Soft-Error-Tolerant Design Methodology for Balancing Performance, Power, and Reliability.
IEEE Trans. Very Large Scale Integr. Syst.
Hsuan-Ming Chou, Ming-Yi Hsiao, Yi-Chiao Chen, Keng-Hao Yang, Jean Tsao, Chiao-Ling Lung, Shih-Chieh Chang, Wen-Ben Jone, Tien-Fu Chen
2014 A* conf
DAPs: Dynamic Adjustment and Partial Sampling for Multithreaded/Multicore Simulation.
DAC
Chien-Chih Chen, Yin-Chi Peng, Cheng-Fen Chen, Wei-Shan Wu, Qinghao Min, Pen-Chung Yew, Weihua Zhang, Tien-Fu Chen
2014 A* conf
Leveraging Data Lifetime for Energy-Aware Last Level Non-Volatile SRAM Caches using Redundant Store Elimination.
DAC
Hsiang-Jen Tsai, Chien-Chih Chen, Keng-Hao Yang, Ting-Chin Yang, Li-Yue Huang, Ching-Hao Chuang, Meng-Fan Chang, Tien-Fu Chen
2014 — conf
ReRAM-based 4T2R nonvolatile TCAM with 7x NVM-stress reduction, and 4x improvement in speed-wordlength-capacity for normally-off instant-on filter-based search engines used in big-data processing.
VLSIC
Li-Yue Huang, Meng-Fan Chang, Ching-Hao Chuang, Chia-Chen Kuo, Chien-Fu Chen, Geng-Hau Yang, Hsiang-Jen Tsai, Tien-Fu Chen, Shyh-Shyuan Sheu, Keng-Li Su, Frederick T. Chen, Tzu-Kun Ku, Ming-Jinn Tsai, Ming-Jer Kao
2014 J jnl
Reconfigurable vertical profiling framework for the android runtime system.
ACM Trans. Embed. Comput. Syst.
Tzu-Hsiang Su, Hsiang-Jen Tsai, Keng-Hao Yang, Po-Chun Chang, Tien-Fu Chen, Yi-Ting Zhao
2013 — conf
A 0.48V 0.57nJ/pixel video-recording SoC in 65nm CMOS.
ISSCC
Tay-Jyi Lin, Cheng-An Chien, Pei-Yao Chang, Ching-Wen Chen, Po-Hao Wang, Ting-Yu Shyu, Chien-Yung Chou, Shien-Chun Luo, Jiun-In Guo, Tien-Fu Chen, Gene C. H. Chuang, Yuan-Hua Chu, Liang-Chia Cheng, Hong-Men Su, Chewnpu Jou, Meikei Ieong, Cheng-Wen Wu, Jinn-Shyan Wang
2013 — conf
A configurable bus-tracer for error reproduction in post-silicon validation.
VLSI-DAT
Shing-Yu Chen, Ming-Yi Hsiao, Wen-Ben Jone, Tien-Fu Chen
2013 — conf
Cross-layer dynamic prefetching allocation strategies for high-performance multicores.
VLSI-DAT
Yin-Chi Peng, Chien-Chih Chen, Chia-Jung Chang, Tien-Fu Chen, Pen-Chung Yew
2013 C conf
Variation-aware and adaptive-latency accesses for reliable low voltage caches.
VLSI-SoC
Po-Hao Wang, Wei-Chung Cheng, Yung-Hui Yu, Tang-Chieh Kao, Chi-Lun Tsai, Pei-Yao Chang, Tay-Jyi Lin, Jinn-Shyan Wang, Tien-Fu Chen
2012 J jnl
A Scalable High-Performance Virus Detection Processor Against a Large Pattern Set for Embedded Network Security.
IEEE Trans. Very Large Scale Integr. Syst.
Chieh-Jen Cheng, Chao-Ching Wang, Wei-Chun Ku, Tien-Fu Chen, Jinn-Shyan Wang
2012 — conf
IMITATOR: A deterministic multicore replay system with refining techniques.
VLSI-DAT
Shing-Yu Chen, Chi-Neng Wen, Geng-Hau Yang, Wen-Ben Jone, Tien-Fu Chen
2012 J jnl
NUDA: A Non-Uniform Debugging Architecture and Nonintrusive Race Detection for Many-Core Systems.
IEEE Trans. Computers
Chi-Neng Wen, Shu-Hsuan Chou, Chien-Chih Chen, Tien-Fu Chen
2011 J jnl
Hierarchical circuit-switched NoC for multicore video processing.
Microprocess. Microsystems
Shu-Hsuan Chou, Chien-Chih Chen, Chi-Neng Wen, Tien-Fu Chen, Tay-Jyi Lin
2011 J jnl
Load and storage balanced posting file partitioning for parallel information retrieval.
J. Syst. Softw.
Yung-Cheng Ma, Chung-Ping Chung, Tien-Fu Chen
2011 J jnl
Maintaining performance on power gating of microprocessor functional units by using a predictive pre-wakeup strategy.
ACM Trans. Archit. Code Optim.
Chang-Ching Yeh, Kuei-Chung Chang, Tien-Fu Chen, Chingwei Yeh
2010 J jnl
Adaptive Pipeline voltage Scaling in High Performance Microprocessor.
J. Circuits Syst. Comput.
Chang-Ching Yeh, Kuei-Chung Chang, Tien-Fu Chen, Chingwei Yeh
2010 A conf
RunAssert: A non-intrusive run-time assertion for parallel programs debugging.
DATE
Chi-Neng Wen, Shu-Hsuan Chou, Tien-Fu Chen, Tay-Jyi Lin
2009 J jnl
An Adaptively Dividable Dual-Port BiTCAM for Virus-Detection Processors in Mobile Devices.
IEEE J. Solid State Circuits
Chao-Ching Wang, Chieh-Jen Cheng, Tien-Fu Chen, Jinn-Shyan Wang
2009 A* conf
NUDA: a non-uniform debugging architecture and non-intrusive race detection for many-core.
DAC
Chi-Neng Wen, Shu-Hsuan Chou, Tien-Fu Chen, Alan Peisheng Su
2009 A* conf
No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips.
DAC
Shu-Hsuan Chou, Chien-Chih Chen, Chi-Neng Wen, Yi-Chao Chan, Tien-Fu Chen, Chao-Ching Wang, Jinn-Shyan Wang
2009 — conf
VeriC: A semi-hardware description language to bridge the gap between ESL design and RTL models.
ISQED
Shu-Hsuan Chou, Chi-Neng Wen, Yan-Ling Liu, Tien-Fu Chen
2009 J jnl
VisoMT: A Collaborative Multithreading Multicore Processor for Multimedia Applications With a Fast Data Switching Mechanism.
IEEE Trans. Circuits Syst. Video Technol.
Wei-Chun Ku, Shu-Hsuan Chou, Jui-Chin Chu, Chi-Lin Liu, Tien-Fu Chen, Jiun-In Guo, Jinn-Shyan Wang
2009 — conf
dIP: A Non-intrusive Debugging IP for Dynamic Data Race Detection in Many-Core.
ISPAN
Chi-Neng Wen, Shu-Hsuan Chou, Tien-Fu Chen
2008 — conf
An Adaptively Dividable Dual-Port BiTCAM for Virus-Detection Processors in Mobile Devices.
ISSCC
Chao-Ching Wang, Chieh-Jen Cheng, Tien-Fu Chen, Jinn-Shyan Wang
2008 J jnl
Low-power algorithm for automatic topology generation for application-specific networks on chips.
IET Comput. Digit. Tech.
Kuei-Chung Chang, Tien-Fu Chen
2008 J jnl
Tailoring circuit-switched network-on-chip to application-specific system-on-chip by two optimization schemes.
ACM Trans. Design Autom. Electr. Syst.
Kuei-Chung Chang, Jih-Sheng Shen, Tien-Fu Chen
2007 A* conf
An Embedded Coherent-Multithreading Multimedia Processor and Its Programming Model.
DAC
Jui-Chin Chu, Wei-Chun Ku, Shu-Hsuan Chou, Tien-Fu Chen, Jiun-In Guo
2007 J jnl
Efficient segment-based video transcoding proxy for mobile multimedia services.
J. Syst. Archit.
Kuei-Chung Chang, Tien-Fu Chen
2007 — conf
Reducing Branch Misprediction Penalties Via Adaptive Pipeline Scaling.
HiPEAC
Chang-Ching Yeh, Kuei-Chung Chang, Tien-Fu Chen, Chingwei Yeh
2006 A conf
Collaborative Multithreading: An Open Scalable Processor Architecture for Embedded Multimedia Applications.
ICME
Wei-Chun Ku, Shu-Hsuan Chou, Jui-Chin Chu, Chih-Heng Kang, Tien-Fu Chen, Jiun-In Guo
2006 C conf
Design of customized functional units for the VLIW-based multi-threading processor core targeted at multimedia applications.
ISCAS
Jui-Chin Chu, Chih-Wen Huang, He-Chun Chen, Keng-Po Lu, Ming-Shuan Lee, Jiun-In Guo, Tien-Fu Chen
2006 A* conf
Evaluation and design trade-offs between circuit-switched and packet-switched NOCs for application-specific SOCs.
DAC
Kuei-Chung Chang, Jih-Sheng Shen, Tien-Fu Chen
2006 A conf
Fast Run-Time Power Monitoring Methodology for Embedded Systems.
ESA
Kuei-Chung Chang, Jih-Sheng Shen, Tien-Fu Chen
2006 C conf
On a design of crossroad switches for low-power on-chip communication architectures.
ISCAS
Jih-Sheng Shen, Kuei-Chung Chang, Tien-Fu Chen
2005 A conf
A low-power crossroad switch architecture and its core placement for network-on-chip.
ISLPED
Kuei-Chung Chang, Jih-Sheng Shen, Tien-Fu Chen
2005 A conf
Crossroad System-on-Chip Communication Architecture for Low Power Embedded Systems.
ESA
Kuei-Chung Chang, Jih-Sheng Shen, Tien-Fu Chen
2005 J jnl
Design techniques for single-low-V
IEEE J. Solid State Circuits
Jinn-Shyan Wang, Hung-Yu Li, Chingwei Yeh, Tien-Fu Chen
2005 B conf
Development of Architecture and Software Technologies in High-Performance Low-Power SoC Design.
RTCSA
Chih-wen Hsueh, Tien-Fu Chen, Rong-Guey Chang, Shi-Wu Lo
2005 A conf
Efficient Segment-Based Video Transcoding Proxy for Mobile Multimedia Services.
ICME
Kuei-Chung Chang, Ren-Yo Wu, Tien-Fu Chen
2005 J jnl
Flexible Heterogeneous Multicore Architectures for Versatile Media Processing Via Customized Long Instruction Words.
IEEE Trans. Circuits Syst. Video Technol.
Tien-Fu Chen, Chia-Ming Hsu, S.-R. Wu
2005 Misc conf
System-Level Power-Aware Scheduling by Operation-based Prediction.
PSC
Kuei-Chung Chang, Tien-Fu Chen, Wei-Yen Chuang
2004 — conf
A parameterized power-aware IP core generator for the 2-D 8×8 DCT/IDCT.
ISCAS (2)
Rei-Chin Ju, Jia-Wei Chen, Jiun-In Guo, Tien-Fu Chen
2004 — conf
A power-aware IP core design for the variable-length DCT/IDCT targeting at MPEG4 shape-adaptive transforms.
ISCAS (2)
Kuan-Hung Chen, Jiun-In Guo, Jinn-Shyan Wang, Ching-Wei Yeh, Tien-Fu Chen
2004 — conf
A power-aware IP core generator for the one-dimensional discrete Fourier transform.
ISCAS (3)
Chih-Da Chien, Chien-Chang Lin, Jiun-In Guo, Tien-Fu Chen
2004 J jnl
Branch-and-bound task allocation with task clustering-based pruning.
J. Parallel Distributed Comput.
Yung-Cheng Ma, Tien-Fu Chen, Chung-Ping Chung
2004 J jnl
Scalable locality-aware event dispatching mechanism for network servers.
IEE Proc. Softw.
Hao-Ran Liu, Tien-Fu Chen
2004 — conf
Unified bus encoding by stream reconstruction with variable strides.
ISCAS (2)
Tien-Fu Chen, Tsung-Ming Hsieh, Chun-Li Wei
2003 — conf
A Scalable Locality-Aware Event Dispatching Mechanism for Network Servers.
WWW (Posters)
Hao-Ran Liu, Tien-Fu Chen
2003 Misc conf
A Tree-Based inverted File for Fast Ranked-Document Retrieval.
IKE
Wann-Yun Shieh, Tien-Fu Chen, Chung-Ping Chung
2003 J jnl
Energy Efficient Caching-on-Cache Architectures for Embedded Systems.
J. Inf. Sci. Eng.
Hung-Cheng Wu, Tien-Fu Chen, Hung-Yu Li, Jinn-Shyan Wang
2003 C conf
Flexible Heterogeneous Multicore Architectures for Media Processing via Customized Long Instruction Words.
VLSI-SOC
Chia-Ming Hsu, Tien-Fu Chen
2003 J jnl
Inverted file compression through document identifier reassignment.
Inf. Process. Manag.
Wann-Yun Shieh, Tien-Fu Chen, Jean Jyh-Jiun Shann, Chung-Ping Chung
2003 J jnl
Variable-size data item placement for load and storage balancing.
J. Syst. Softw.
Yung-Cheng Ma, Jih-Ching Chiu, Tien-Fu Chen, Chung-Ping Chung
2002 J jnl
Decoupling of data and tag arrays for on-chip caches.
Microprocess. Microsystems
Tien-Fu Chen, Yi-Min Hwang
2002 Misc conf
Dynamic voltage leveling scheduling for real-time embedded systems on low-power variable speed processors.
CASES
Jian-Liang Kuo, Tien-Fu Chen
2002 J jnl
Posting file partitioning and parallel information retrieval.
J. Syst. Softw.
Yung-Cheng Ma, Tien-Fu Chen, Chung-Ping Chung
2001 A conf
Compressing inverted files in scalable information systems by binary decision diagram encoding .
SC
Chung-Hung Lai, Tien-Fu Chen
2000 B conf
Dynamic memory management for real-time embedded Java chips.
RTCSA
Chi-Min Lin, Tien-Fu Chen
1999 J jnl
SBA: a server-initiated playback scheme supporting variable bit rate control.
IEEE Trans. Consumer Electron.
Jung-Long Jiang, Tien-Fu Chen
1999 J jnl
Segmented bus design for low-power systems.
IEEE Trans. Very Large Scale Integr. Syst.
J.-Y. Chen, Wen-Ben Jone, Jinn-Shyan Wang, Hsueh-I Lu, Tien-Fu Chen
1998 A* conf
Supporting Highly-Speculative Execution via Adaptive Branch Trees.
HPCA
Tien-Fu Chen
1997 J jnl
Reducing memory penalty by a programmable prefetch engine for on-chip caches.
Microprocess. Microsystems
Tien-Fu Chen
1996 — conf
Efficient trace-sampling simulation techniques for cache performance analysis.
Annual Simulation Symposium
Tien-Fu Chen
1996 J jnl
Techniques for The Efficient Analysis of Cache Performance.
J. Inf. Sci. Eng.
Tien-Fu Chen
1995 A* conf
An effective programmable prefetch engine for on-chip caches.
MICRO
Tien-Fu Chen
1995 J jnl
Effective Hardware Based Data Prefetching for High-Performance Processors.
IEEE Trans. Computers
Tien-Fu Chen, Jean-Loup Baer
1994 A* conf
A Performance Study of Software and Hardware Data Prefetching Schemes.
ISCA
Tien-Fu Chen, Jean-Loup Baer
1994 — conf
An Evaluation of Hardware and Software Data Prefetching.
Applications in Parallel and Distributed Computing
Jean-Loup Baer, Tien-Fu Chen
1992 A* conf
Reducing Memory Latency via Non-blocking and Prefetching Caches.
ASPLOS
Tien-Fu Chen, Jean-Loup Baer
1991 A conf
An effective on-chip preloading scheme to reduce data access penalty.
SC
Jean-Loup Baer, Tien-Fu Chen