Thomas Zeiser

34 papers A 4C 3Misc 1Journal 22Unranked 3
YearRankTypeTitle / Venue / Authors
2020 A conf
What does Power Consumption Behavior of HPC Jobs Reveal? : Demystifying, Quantifying, and Predicting Power Consumption Characteristics.
IPDPS
Tirthak Patel, Adam Wagenhäuser, Christopher Eibel, Timo Hönig, Thomas Zeiser, Devesh Tiwari
2019 J jnl
CRAFT: A Library for Easier Application-Level Checkpoint/Restart and Automatic Fault Tolerance.
IEEE Trans. Parallel Distributed Syst.
Faisal Shahzad, Jonas Thies, Moritz Kreutzer, Thomas Zeiser, Georg Hager, Gerhard Wellein
2019 C conf
ClusterCockpit - A web application for job-specific performance monitoring.
CLUSTER
Jan Eitzinger, Thomas Gruber, Ayesha Afzal, Thomas Zeiser, Gerhard Wellein
2018 J jnl
Building and utilizing fault tolerance support tools for the GASPI applications.
Int. J. High Perform. Comput. Appl.
Faisal Shahzad, Moritz Kreutzer, Thomas Zeiser, Rui Machado, Andreas Pieper, Georg Hager, Gerhard Wellein
2017 J jnl
CRAFT: A library for easier application-level Checkpoint/Restart and Automatic Fault Tolerance.
CoRR
Faisal Shahzad, Jonas Thies, Moritz Kreutzer, Thomas Zeiser, Georg Hager, Gerhard Wellein
2017 J jnl
Lattice Boltzmann Benchmark Kernels as a Testbed for Performance Analysis.
CoRR
Markus Wittmann, Viktor Haag, Thomas Zeiser, Harald Köstler, Gerhard Wellein
2016 J jnl
Chip-level and multi-node analysis of energy-optimized lattice Boltzmann CFD simulations.
Concurr. Comput. Pract. Exp.
Markus Wittmann, Georg Hager, Thomas Zeiser, Jan Treibig, Gerhard Wellein
2016 J jnl
Extreme Scale-out SuperMUC Phase 2 - lessons learned.
CoRR
Nicolay Hammer, Ferdinand Jamitzky, Helmut Satzger, Momme Allalen, Alexander Block, Anupam Karmakar, Matthias Brehm, Reinhold Bader, Luigi Iapichino, Antonio Ragagnin, Vasilios Karakasis, Dieter Kranzlmüller, Arndt Bode, Herbert Huber, Martin Kühn, Rui Machado, Daniel Grünewald, Philipp V. F. Edelmann, Friedrich K. Röpke, Markus Wittmann, Thomas Zeiser, Gerhard Wellein, Gerald Mathias, Magnus Schwörer, Konstantin Lorenzen, Christoph Federrath, Ralf Klessen, Karl-Ulrich Bamberg, Hartmut Ruhl, Florian Schornbaum, Martin Bauer, Anand Nikhil, Jiaxing Qi, Harald Klimach, Hinnerk Stüben, Abhishek Deshmukh, Tobias Falkenstein, Klaus Dolag, Margarita Petkova
2015 C conf
Building a Fault Tolerant Application Using the GASPI Communication Layer.
CLUSTER
Faisal Shahzad, Moritz Kreutzer, Thomas Zeiser, Rui Machado, Andreas Pieper, Georg Hager, Gerhard Wellein
2015 J jnl
Building a fault tolerant application using the GASPI communication layer.
CoRR
Faisal Shahzad, Moritz Kreutzer, Thomas Zeiser, Rui Machado, Andreas Pieper, Georg Hager, Gerhard Wellein
2015 — conf
Extreme Scale-out SuperMUC Phase 2 - lessons learned.
PARCO
Nicolay Hammer, Ferdinand Jamitzky, Helmut Satzger, Momme Allalen, Alexander Block, Anupam Karmakar, Matthias Brehm, Reinhold Bader, Luigi Iapichino, Antonio Ragagnin, Vasilios Karakasis, Dieter Kranzlmüller, Arndt Bode, Herbert Huber, Martin Kühn, Rui Machado, Daniel Grünewald, Philipp V. F. Edelmann, Friedrich K. Röpke, Markus Wittmann, Thomas Zeiser, Gerhard Wellein, Gerald Mathias, Magnus Schwörer, Konstantin Lorenzen, Christoph Federrath, Ralf Klessen, Karl-Ulrich Bamberg, Hartmut Ruhl, Florian Schornbaum, Martin Bauer, Anand Nikhil, Jiaxing Qi, Harald Klimach, Hinnerk Stüben, Abhishek Deshmukh, Tobias Falkenstein, Klaus Dolag, Margarita Petkova
2015 J jnl
Short Note on Costs of Floating Point Operations on current x86-64 Architectures: Denormals, Overflow, Underflow, and Division by Zero.
CoRR
Markus Wittmann, Thomas Zeiser, Georg Hager, Gerhard Wellein
2014 J jnl
Modeling and analyzing performance for highly optimized propagation steps of the lattice Boltzmann method on sparse lattices.
CoRR
Markus Wittmann, Thomas Zeiser, Georg Hager, Gerhard Wellein
2013 J jnl
A Survey of Checkpoint/Restart Techniques on Distributed Memory Systems.
Parallel Process. Lett.
Faisal Shahzad, Markus Wittmann, Moritz Kreutzer, Thomas Zeiser, Georg Hager, Gerhard Wellein
2013 — conf
An Evaluation of Different I/O Techniques for Checkpoint/Restart.
IPDPS Workshops
Faisal Shahzad, Markus Wittmann, Thomas Zeiser, Georg Hager, Gerhard Wellein
2013 J jnl
An analysis of energy-optimized lattice-Boltzmann CFD simulations from the chip to the highly parallel level
CoRR
Markus Wittmann, Georg Hager, Thomas Zeiser, Gerhard Wellein
2013 J jnl
Asynchronous MPI for the Masses
CoRR
Markus Wittmann, Georg Hager, Thomas Zeiser, Gerhard Wellein
2013 J jnl
Comparison of different propagation steps for lattice Boltzmann methods.
Comput. Math. Appl.
Markus Wittmann, Thomas Zeiser, Georg Hager, Gerhard Wellein
2012 C conf
Asynchronous Checkpointing by Dedicated Checkpoint Threads.
EuroMPI
Faisal Shahzad, Markus Wittmann, Thomas Zeiser, Gerhard Wellein
2011 J jnl
Comparison of different Propagation Steps for the Lattice Boltzmann Method
CoRR
Markus Wittmann, Thomas Zeiser, Georg Hager, Gerhard Wellein
2011 J jnl
Domain decomposition and locality optimization for large-scale lattice Boltzmann simulations
CoRR
Markus Wittmann, Thomas Zeiser, Georg Hager, Gerhard Wellein
2011 J jnl
Performance analysis and optimization strategies for a D3Q19 lattice Boltzmann kernel on nVIDIA GPUs using CUDA.
Adv. Eng. Softw.
Johannes Habich, Thomas Zeiser, Georg Hager, Gerhard Wellein
2009 J jnl
Benchmark Analysis and Application Results for Lattice Boltzmann Simulations on NEC SX Vector and Intel Nehalem Systems.
Parallel Process. Lett.
Thomas Zeiser, Georg Hager, Gerhard Wellein
2009 — conf
Efficient Temporal Blocking for Stencil Computations by Multicore-Aware Wavefront Parallelization.
COMPSAC (1)
Gerhard Wellein, Georg Hager, Thomas Zeiser, Markus Wittmann, Holger Fehske
2009 A conf
The world's fastest CPU and SMP node: Some performance results from the NEC SX-9.
IPDPS
Thomas Zeiser, Georg Hager, Gerhard Wellein
2008 J jnl
Data Access Characteristics and Optimizations for Sun UltraSPARC T2 and T2+ Systems.
Parallel Process. Lett.
Georg Hager, Thomas Zeiser, Gerhard Wellein
2008 A conf
Data access optimizations for highly threaded multi-core CPUs with multiple memory controllers.
IPDPS
Georg Hager, Thomas Zeiser, Gerhard Wellein
2008 J jnl
Performance comparison of different parallel lattice Boltzmann implementations on multi-core multi-socket systems.
Int. J. Comput. Sci. Eng.
Stefan Donath, Klaus Iglberger, Gerhard Wellein, Thomas Zeiser, Aditya Nitsure, Ulrich Rüde
2008 J jnl
Performance evaluation of a parallel sparse lattice Boltzmann solver.
J. Comput. Phys.
Lilit Axner, Jörg Bernsdorf, Thomas Zeiser, Peter Lammers, Jan Linxweiler, Alfons G. Hoekstra
2008 — ch.
Vector Computers in a World of Commodity Clusters, Massively Parallel Systems and Many-Core Many-Threaded CPUs: Recent Experience Based on an Advanced Lattice Boltzmann Flow Solver.
High Performance Computing in Science and Engineering
Thomas Zeiser, Georg Hager, Gerhard Wellein
2007 J jnl
Data access optimizations for highly threaded multi-core CPUs with multiple memory controllers
CoRR
Georg Hager, Thomas Zeiser, Gerhard Wellein
2007 J jnl
RZBENCH: Performance evaluation of current HPC architectures using low-level and application benchmarks
CoRR
Georg Hager, Holger Stengel, Thomas Zeiser, Gerhard Wellein
2004 A conf
Performance Evaluation of Parallel Large-Scale Lattice Boltzmann Applications on Three Supercomputing Architectures.
SC
Thomas Pohl, Frank Deserno, Nils Thürey, Ulrich Rüde, Peter Lammers, Gerhard Wellein, Thomas Zeiser
2003 Misc conf
Lattice Boltzmann Simulation and Visualisation of Adsorption Processes in Complex Geometries.
International Conference on Computational Science
Jörg Bernsdorf, Uwe Jaekel, Thomas Zeiser, T. Takei, H. Matsumoto, K. Nishizawa