Thomas Steininger

12 papers A 3C 4Misc 1Unranked 3
YearRankTypeTitle / Venue / Authors
2010 — conf
Model reduction techniques for the formal verification of hardware dependent software.
HLDVT
Wolfgang Ecker, Volkan Esen, Rainer Findenig, Thomas Steininger, Michael Velten
2010 A conf
TLM+ modeling of embedded HW/SW systems.
DATE
Wolfgang Ecker, Volkan Esen, Robert Schwencker, Thomas Steininger, Michael Velten
2009 — —
Automated assertion transformation across multiple abstraction levels.
Thomas Steininger
2007 A conf
Interactive presentation: Impact of description language, abstraction layer, and value representation on simulation performance.
DATE
Wolfgang Ecker, Volkan Esen, Lars Schönberg, Thomas Steininger, Michael Velten, Michael Hull
2007 A conf
Interactive presentation: Implementation of a transaction level assertion framework in SystemC.
DATE
Wolfgang Ecker, Volkan Esen, Thomas Steininger, Michael Velten, Michael Hull
2007 — conf
Requirements and Concepts for Transaction Level Assertion Refinement.
IESS
Wolfgang Ecker, Volkan Esen, Thomas Steininger, Michael Velten
2006 C conf
Case Study on Transaction Level Modeling.
FDL
Wolfgang Ecker, Volkan Esen, Thomas Steininger, Michael Velten
2006 C conf
IP Library For Temporal SystemC Assertions.
FDL
Wolfgang Ecker, Volkan Esen, Thomas Steininger, Michael Velten, Jacob Smit
2006 C conf
Requirements and Concepts for Transaction Level Assertions.
ICCD
Wolfgang Ecker, Volkan Esen, Michael Hull, Thomas Steininger, Michael Velten
2006 — conf
Specification Language for Transaction Level Assertions.
HLDVT
Wolfgang Ecker, Volkan Esen, Thomas Steininger, Michael Velten, Michael Hull
2004 C conf
Memory Models for the Formal Verification of Assembler Code Using Bounded Model Checking.
ISORC
Wolfgang Ecker, Volkan Esen, Thomas Steininger, Martin Zambaldi
2004 Misc conf
Rapid Prototyping for Configurable System-on-a-Chip Platforms: A Simulation Based Approach.
VLSI Design
Jens Bieger, Sorin A. Huss, Michael Jung, Stephan Klaus, Thomas Steininger