Thomas Schweizer

27 papers B 2C 1Misc 1Journal 4Unranked 17

Year	Rank	Type	Title / Venue / Authors
2020	C	`conf`	Can Refactorings Indicate Design Tradeoffs? SCAM Thomas Schweizer, Vassilis Zafeiris, Marios Fokaefs, Michalis Famelis
2016	—	`conf`	Eine Tcl-basierte Methode zur Fehlerinjektion und Fehlereffektsimulation/-emulation auf Xilinx-FPGAs. MBMV Thomas Schweizer, Murat Simsek, Oliver Bringmann, Wolfgang Rosenstiel
2016	—	`conf`	Neues Konzept zur Steigerung der Zuverlässigkeit einer ARM-basierten Prozessorarchitektur unter Verwendung eines CGRAs. MBMV Konstantin Lübeck, David Morgenstern, Thomas Schweizer, Dustin Peterson, Wolfgang Rosenstiel, Oliver Bringmann
2015	J	`jnl`	Adaptive multi-layer techniques for increased system dependability. it Inf. Technol. Lars Bauer, Jörg Henkel, Andreas Herkersdorf, Michael A. Kochte, Johannes Maximilian Kühn, Wolfgang Rosenstiel, Thomas Schweizer, Stefan Wallentowitz, Volker Wenzel, Thomas Wild, Hans-Joachim Wunderlich, Hongyan Zhang
2014	—	`conf`	Rotated parallel mapping: A novel approach for mapping data parallel applications on CGRAs. ReConFig Simon Schulz, Oliver Bringmann, Thomas Schweizer, Wolfgang Rosenstiel
2013	Misc	`conf`	A Fast and Accurate FPGA-Based Fault Injection System. FCCM Thomas Schweizer, Dustin Peterson, Johannes Maximilian Kühn, Tommy Kuhn, Wolfgang Rosenstiel
2013	—	`conf`	StML: Bridging the gap between FPGA design and HDL circuit description. FPT Dustin Peterson, Oliver Bringmann, Thomas Schweizer, Wolfgang Rosenstiel
2013	—	`conf`	Testing reliability techniques for SoCs with fault tolerant CGRA by using live FPGA fault injection. FPT Johannes Maximilian Kühn, Thomas Schweizer, Dustin Peterson, Tommy Kuhn, Wolfgang Rosenstiel
2013	—	`conf`	Timing error handling on CGRAs. ReConFig Thomas Schweizer, Wolfgang Rosenstiel, Luigi Vaz Ferreira, Marcus Ritt
2012	—	`conf`	Using Run-Time Reconfiguration to Implement Fault-Tolerant Coarse Grained Reconfigurable Architectures. IPDPS Workshops Thomas Schweizer, Anja Küster, Sven Eisenhardt, Tommy Kuhn, Wolfgang Rosenstiel
2011	—	`conf`	Low-Cost TMR for Fault-Tolerance on Coarse-Grained Reconfigurable Architectures. ReConFig Thomas Schweizer, Philipp Schlicker, Sven Eisenhardt, Tommy Kuhn, Wolfgang Rosenstiel
2011	—	`conf`	Runtime-datapath-remapping for fault-tolerant coarse-grained reconfigurable architectures. ReCoSoC Sven Eisenhardt, Anja Küster, Thomas Schweizer, Tommy Kuhn, Wolfgang Rosenstiel
2011	—	`conf`	Spatial and Temporal Data Path Remapping for Fault-Tolerant Coarse-Grained Reconfigurable Architectures. DFT Sven Eisenhardt, Anja Küster, Thomas Schweizer, Tommy Kuhn, Wolfgang Rosenstiel
2010	J	`jnl`	Charge Recycling in Voltage-Dithered Circuits. J. Low Power Electron. Thomas Schweizer, Julio A. de Oliveira Filho, Tommy Kuhn, Wolfgang Rosenstiel
2010	—	`ch.`	Evaluation and Design Methods for Processor-Like Reconfigurable Architectures. Dynamically Reconfigurable Systems Sven Eisenhardt, Thomas Schweizer, Julio A. de Oliveira Filho, Tommy Kuhn, Wolfgang Rosenstiel
2010	—	`—`	Verfahren und Schaltkreis zur Ladungswiederverwendung in Schaltungen mit mehrfacher und abschaltbarer Spannungsversorgung. Thomas Schweizer
2009	J	`jnl`	CGADL: An Architecture Description Language for Coarse-Grained Reconfigurable Arrays. IEEE Trans. Very Large Scale Integr. Syst. Julio A. de Oliveira Filho, Stephan Masekowsky, Thomas Schweizer, Wolfgang Rosenstiel
2009	—	`conf`	Low Energy Voltage Dithering in Dual PATMOS Thomas Schweizer, Julio A. de Oliveira Filho, Tommy Kuhn, Wolfgang Rosenstiel
2009	—	`conf`	Prevention of Hot Spot Development on Coarse-Grained Dynamically Reconfigurable Architectures. ReConFig Sven Eisenhardt, Thomas Schweizer, Andreas Bernauer, Tommy Kuhn, Wolfgang Rosenstiel
2008	B	`conf`	Coarse-grained reconfiguration. FPL Sven Eisenhardt, Thomas Schweizer, Julio A. de Oliveira Filho, Tobias Oppold, Wolfgang Rosenstiel, Alexander Thomas, Jürgen Becker, Frank Hannig, Dmitrij Kissler, Hritam Dutta, Jürgen Teich, Heiko Hinkelmann, Peter Zipf, Manfred Glesner
2008	—	`conf`	Optimizing Partial Reconfiguration of Multi-context Architectures. ReConFig Sven Eisenhardt, Tobias Oppold, Thomas Schweizer, Wolfgang Rosenstiel
2007	J	`jnl`	CRC - Concepts and Evaluation of Processor-Like Reconfigurable Architectures (CRC - Konzepte und Bewertung prozessorartig rekonfigurierbarer Architekturen). it Inf. Technol. Tobias Oppold, Thomas Schweizer, Julio A. de Oliveira Filho, Sven Eisenhardt, Wolfgang Rosenstiel
2007	—	`conf`	Exploiting Slack Time in Dynamically Reconfigurable Processor Architectures. FPT Thomas Schweizer, Tobias Oppold, Julio A. de Oliveira Filho, Sven Eisenhardt, Kai Blocher, Wolfgang Rosenstiel
2006	—	`conf`	Tuning Coarse-Grained Reconfigurable Architectures towards an Application Domain. ReConFig Julio A. de Oliveira Filho, Thomas Schweizer, Tobias Oppold, Tommy Kuhn, Wolfgang Rosenstiel
2005	B	`conf`	Evaluation of Ray Casting on Processor-Like Reconfigurable Architectures. FPL Tobias Oppold, Thomas Schweizer, Tommy Kuhn, Wolfgang Rosenstiel, Urs Kanus, Wolfgang Straßer
2004	—	`conf`	A Design Environment for Processor-Like Reconfigurable Hardware. PARELEC Tobias Oppold, Thomas Schweizer, Tommy Kuhn, Wolfgang Rosenstiel
2004	—	`conf`	Object-oriented modeling and synthesis of SystemC specifications. ASP-DAC C. Schulz-Key, Markus Winterholer, Thomas Schweizer, Tommy Kuhn, Wolfgang Rosenstiel