Thomas Marconi

21 papers A 5C 3Misc 1Journal 1Unranked 10

Year	Rank	Type	Title / Venue / Authors
2017	C	`conf`	LDPC-Based Adaptive Multi-Error Correction for 3D Memories. ICCD Mihai Lefter, George Razvan Voicu, Thomas Marconi, Valentin Savin, Sorin Dan Cotofana
2017	—	`conf`	Low cost multi-error correction for 3D polyhedral memories. NANOARCH Mihai Lefter, Thomas Marconi, George Razvan Voicu, Sorin Dan Cotofana
2015	—	`conf`	Dynamic Bitstream Length Scaling Energy Effective Stochastic LDPC Decoding. ACM Great Lakes Symposium on VLSI Thomas Marconi, Sorin Cotofana
2014	J	`jnl`	Online scheduling and placement of hardware tasks with multiple variants on dynamically reconfigurable field-programmable gate arrays. Comput. Electr. Eng. Thomas Marconi
2014	C	`conf`	Towards energy effective LDPC decoding by exploiting channel noise variability. VLSI-SoC Thomas Marconi, Christian Spagnol, Emanuel M. Popovici, Sorin Cotofana
2014	—	`conf`	Transmission Channel Noise Aware Energy Effective LDPC Decoding. VLSI-SoC (Selected Papers) Thomas Marconi, Christian Spagnol, Emanuel M. Popovici, Sorin Cotofana
2013	C	`conf`	Implementation of core coalition on FPGAs. VLSI-SoC Kaushik Triyambaka Mysur, Mihai Pricopi, Thomas Marconi, Tulika Mitra
2012	A	`conf`	Online scheduling for multi-core shared reconfigurable fabric. DATE Liang Chen, Thomas Marconi, Tulika Mitra
2011	—	`conf`	A novel online hardware task scheduling and placement algorithm for 3D partially reconfigurable FPGAs. FPT Thomas Marconi, Tulika Mitra
2011	—	`—`	Efficient Runtime Management of Reconfigurable Hardware Resources. Thomas Marconi
2010	—	`conf`	3D Compaction: A Novel Blocking-Aware Algorithm for Online Hardware Task Scheduling and Placement on 2D Partially Reconfigurable Devices. ARC Thomas Marconi, Yi Lu, Koen Bertels, Georgi Gaydadjiev
2010	Misc	`conf`	A Communication Aware Online Task Scheduling Algorithm for FPGA-Based Partially Reconfigurable Systems. FCCM Yi Lu, Thomas Marconi, Koen Bertels, Georgi Gaydadjiev
2010	—	`conf`	A novel HDL coding style to reduce power consumption for reconfigurable devices. FPT Thomas Marconi, Dimitris Theodoropoulos, Koen Bertels, Georgi Gaydadjiev
2010	—	`conf`	A novel configuration circuit architecture to speedup reconfiguration and relocation for partially reconfigurable devices. SASP Thomas Marconi, Jae Young Hur, Koen Bertels, Georgi Gaydadjiev
2009	A	`conf`	Flexible pipelining design for recursive variable expansion. IPDPS Zubair Nawaz, Thomas Marconi, Koen Bertels, Todor P. Stefanov
2009	—	`conf`	Online Task Scheduling for the FPGA-Based Partially Reconfigurable Systems. ARC Yi Lu, Thomas Marconi, Koen Bertels, Georgi Gaydadjiev
2008	A	`conf`	A self-adaptive on-line task placement algorithm for partially reconfigurable systems. IPDPS Yi Lu, Thomas Marconi, Georgi Gaydadjiev, Koen Bertels, Roel Meeuws
2008	A	`conf`	An efficient algorithm for free resources management on the FPGA. DATE Yi Lu, Thomas Marconi, Georgi Gaydadjiev, Koen Bertels
2008	A	`conf`	Intelligent Merging Online Task Placement Algorithm for Partial Reconfigurable Systems. DATE Thomas Marconi, Yi Lu, Koen Bertels, Georgi Gaydadjiev
2008	—	`conf`	Online Hardware Task Scheduling and Placement Algorithm on Partially Reconfigurable Devices. ARC Thomas Marconi, Yi Lu, Koen Bertels, Georgi Gaydadjiev
2007	—	`conf`	Recursive Variable Expansion: A Loop Transformation for Reconfigurable Systems. FPT Zubair Nawaz, Ozana Silvia Dragomir, Thomas Marconi, Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis