Thomas Luinaud

11 papers A 3B 1C 2Journal 4Unranked 1
YearRankTypeTitle / Venue / Authors
2023 J jnl
Symbolic Analysis for Data Plane Programs Specialization.
ACM Trans. Archit. Code Optim.
Thomas Luinaud, J. M. Pierre Langlois, Yvon Savaria
2022 C conf
An FPGA-based HW/SW Co-Verification Environment for Programmable Network Devices.
ISCAS
Mengyue Su, Jean-Pierre David, Yvon Savaria, Bill Pontikakis, Thomas Luinaud
2021 A conf
Design Principles for Packet Deparsers on FPGAs.
FPGA
Thomas Luinaud, Jeferson Santiago da Silva, J. M. Pierre Langlois, Yvon Savaria
2021 J jnl
Design Principles for Packet Deparsers on FPGAs.
CoRR
Thomas Luinaud, Jeferson Santiago da Silva, J. M. Pierre Langlois, Yvon Savaria
2020 C conf
Bridging the Gap: FPGAs as Programmable Switches.
HPSR
Thomas Luinaud, Thibaut Stimpfling, Jeferson Santiago da Silva, Yvon Savaria, J. M. Pierre Langlois
2020 J jnl
Bridging the Gap: FPGAs as Programmable Switches.
CoRR
Thomas Luinaud, Thibaut Stimpfling, Jeferson Santiago da Silva, Yvon Savaria, J. M. Pierre Langlois
2020 A conf
Unleashing the Power of FPGAs as Programmable Switches.
FPGA
Thomas Luinaud, Thibaut Stimpfling, Jeferson Santiago da Silva, Yvon Savaria, J. M. Pierre Langlois
2018 B conf
One for All, All for One: A Heterogeneous Data Plane for Flexible P4 Processing.
ICNP
Jeferson Santiago da Silva, Thibaut Stimpfling, Thomas Luinaud, Bachir Fradj, Bochra Boughzala
2018 J jnl
One for All, All for One: A Heterogeneous Data Plane for Flexible P4 Processing.
CoRR
Jeferson Santiago da Silva, Thibaut Stimpfling, Thomas Luinaud, Bachir Fradj, Bochra Boughzala
2017 — conf
An FPGA Coarse Grained Intermediate Fabric for Regular Expression Search.
ACM Great Lakes Symposium on VLSI
Thomas Luinaud, Yvon Savaria, J. M. Pierre Langlois
2017 A conf
An FPGA Overlay Architecture for Cost Effective Regular Expression Search (Abstract Only).
FPGA
Thomas Luinaud, Yvon Savaria, J. M. Pierre Langlois