Thomas Hollstein

68 papers A 7B 4C 12Misc 2Journal 11Unranked 29

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Open-Source Based Automated Interrupt-Driven Testing Methodology for Embedded Systems Labs for Undergraduate Students. MECO Anton Jastsuk, Uljana Reinsalu, Thomas Hollstein
2023	Misc	`conf`	An Efficient Feature-based Method for People Counting. SAC Daniel Helmer, Heiko Hinkelmann, Thomas Hollstein
2021	C	`conf`	Lightweight Monitoring Scheme for Flooding DoS Attack Detection in Multi-Tenant MPSoCs. ISCAS Cesar G. Chaves, Johanna Sepúlveda, Thomas Hollstein
2021	A	`conf`	Triple Fixed-Point MAC Unit for Deep Learning. DATE Madis Kerner, Kalle Tammemäe, Jaan Raik, Thomas Hollstein
2020	Misc	`conf`	An Efficient FPGA-based Architecture for Contractive Autoencoders. FCCM Madis Kerner, Kalle Tammemäe, Jaan Raik, Thomas Hollstein
2019	—	`conf`	Detecting and Mitigating Low-and-Slow DoS Attacks in NoC-based MPSoCs. ReCoSoC Cesar G. Chaves, Siavoosh Payandeh Azad, Johanna Sepúlveda, Thomas Hollstein
2018	—	`conf`	A Distributed DoS Detection Scheme for NoC-based MPSoCs. NORCAS Cesar G. Chaves, Siavoosh Payandeh Azad, Thomas Hollstein, Johanna Sepúlveda
2018	C	`conf`	Software-Level TMR Approach for On-Board Data Processing in Space Applications. DDECS Karl Janson, Carl Johann Treudler, Thomas Hollstein, Jaan Raik, Maksim Jenihhin, Görschwin Fey
2017	B	`conf`	Automated area and coverage optimization of minimal latency checkers. ETS Siavoosh Payandeh Azad, Behrad Niazmand, Apneet Kaur Sandhu, Jaan Raik, Gert Jervan, Thomas Hollstein
2017	C	`conf`	Comprehensive performance and robustness analysis of 2D turn models for network-on-chips. ISCAS Siavoosh Payandeh Azad, Behrad Niazmand, Karl Janson, Thilo Kogge, Jaan Raik, Gert Jervan, Thomas Hollstein
2017	C	`conf`	From online fault detection to fault management in Network-on-Chips: A ground-up approach. DDECS Siavoosh Payandeh Azad, Behrad Niazmand, Karl Janson, Nevin George, Stephen Adeboye Oyeniran, Tsotne Putkaradze, Apneet Kaur, Jaan Raik, Gert Jervan, Raimund Ubar, Thomas Hollstein
2017	—	`ed.`	VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability - 24th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016, Revised Selected Papers VLSI-SoC (Selected Papers) Thomas Hollstein, Jaan Raik, Sergei Kostin, Anton Tsertov, Ian O'Connor, Ricardo Reis
2016	C	`conf`	Foreword. VLSI-SoC Jaan Raik, Ian O'Connor, Thomas Hollstein, Krishnendu Chakrabarty
2016	J	`jnl`	Holistic Approach for Fault-Tolerant Network-on-Chip based Many-Core Systems. CoRR Siavoosh Payandeh Azad, Behrad Niazmand, Jaan Raik, Gert Jervan, Thomas Hollstein
2016	—	`conf`	Logic-based implementation of fault-tolerant routing in 3D network-on-chips. NOCS Behrad Niazmand, Siavoosh Payandeh Azad, José Flich, Jaan Raik, Gert Jervan, Thomas Hollstein
2016	—	`conf`	Practicing start-up culture in teaching embedded systems. EWME Uljana Reinsalu, Siavoosh Payandeh Azad, Mairo Leier, Kalle Tammemäe, Thomas Hollstein
2016	—	`conf`	SoCDep ReCoSoC Siavoosh Payandeh Azad, Behrad Niazmand, Peeter Ellervee, Jaan Raik, Gert Jervan, Thomas Hollstein
2015	—	`conf`	A Framework for Combining Concurrent Checking and On-Line Embedded Test for Low-Latency Fault Detection in NoC Routers. NOCS Pietro Saltarelli, Behrad Niazmand, Jaan Raik, Vineeth Govind, Thomas Hollstein, Gert Jervan, Ranganathan Hariharan
2015	C	`conf`	A Framework for Comprehensive Automated Evaluation of Concurrent Online Checkers. DSD Pietro Saltarelli, Behrad Niazmand, Jaan Raik, Ranganathan Hariharan, Gert Jervan, Thomas Hollstein
2015	—	`conf`	Automated minimization of concurrent online checkers for Network-on-Chips. ReCoSoC Pietro Saltarelli, Behrad Niazmand, Ranganathan Hariharan, Jaan Raik, Gert Jervan, Thomas Hollstein
2015	—	`conf`	Mixed-criticality NoC partitioning based on the NoCDepend dependability technique. ReCoSoC Thomas Hollstein, Siavoosh Payandeh Azad, Thilo Kogge, Behrad Niazmand
2015	C	`conf`	NoCDepend: A Flexible and Scalable Dependability Technique for 3D Networks-on-Chip. DDECS Thomas Hollstein, Siavoosh Payandeh Azad, Thilo Kogge, Haoyuan Ying, Klaus Hofmann
2014	—	`conf`	A hardware/software co-design reconfigurable Network-on-Chip FPGA emulation method. ReCoSoC Haoyuan Ying, Thomas Hollstein, Klaus Hofmann
2014	—	`conf`	A modular 6LoWPAN-based wireless sensor body area network for health-monitoring applications. APSIPA Yannick Le Moullec, Yoann Lecat, Paul Annus, Raul Land, Alar Kuusik, Marko Reidla, Thomas Hollstein, Uljana Reinsalu, Kalle Tammemäe, Priit Ruberg
2014	—	`conf`	Dynamic quadrant partitioning adaptive routing algorithm for irregular reduced vertical link density topology 3-Dimensional Network-on-Chips. HPCS Haoyuan Ying, Klaus Hofmann, Thomas Hollstein
2014	—	`conf`	Motivation-driven learning processes at the example of embedded systems. EWME Thomas Hollstein, Uljana Reinsalu, Mairo Leier
2013	J	`jnl`	Deadlock-free generic routing algorithms for 3-dimensional Networks-on-Chip with reduced vertical link density topologies. J. Syst. Archit. Haoyuan Ying, Ashok Jaiswal, Thomas Hollstein, Klaus Hofmann
2013	A	`conf`	Fast and optimized task allocation method for low vertical link density 3-dimensional networks-on-chip based many core systems. DATE Haoyuan Ying, Thomas Hollstein, Klaus Hofmann
2013	—	`conf`	GSNoC - The comprehensive design platform for 3-dimensional Networks-on-Chip based many core embedded systems. HPCS Haoyuan Ying, Thomas Hollstein, Klaus Hofmann
2013	J	`jnl`	Runtime Contention and Bandwidth-Aware Adaptive Routing Selection Strategies for Networks-on-Chip. IEEE Trans. Parallel Distributed Syst. Faizal Arya Samman, Thomas Hollstein, Manfred Glesner
2012	—	`conf`	A genetic algorithm based optimization method for low vertical link density 3-dimensional Networks-on-Chip many core systems. NORCHIP Haoyuan Ying, Kris Heid, Thomas Hollstein, Klaus Hofmann
2012	C	`conf`	A simulation framework for 3-dimension Networks-on-chip with different vertical channel density configurations. DDECS Haoyuan Ying, Ashok Jaiswal, Mohamed A. Abd El-Ghany, Thomas Hollstein, Klaus Hofmann
2012	—	`conf`	Communication-centric high level synthesis metrics for low vertical channel density 3-dimensional Networks-on-Chip. ReCoSoC Haoyuan Ying, Thomas Hollstein, Klaus Hofmann
2012	—	`conf`	Design methodology for fault-tolerant heterogeneous MPSoC under real-time constraints. ReCoSoC Mohsin Amin, Mihkel Tagel, Gert Jervan, Thomas Hollstein
2012	J	`jnl`	Erratum to Planar adaptive network-on-chip supporting deadlock-free and efficient tree-based multicast routing method Microprocessors and Microsystems (2012) 449-461. Microprocess. Microsystems Faizal Arya Samman, Thomas Hollstein, Manfred Glesner
2012	J	`jnl`	Planar adaptive network-on-chip supporting deadlock-free and efficient tree-based multicast routing method. Microprocess. Microsystems Faizal Arya Samman, Thomas Hollstein, Manfred Glesner
2011	C	`conf`	A Fast Congestion-Aware Flow Control Mechanism for ID-Based Networks-on-Chip with Best-Effort Communication. DSD Haoyuan Ying, Ashok Jaiswal, Thomas Hollstein, Klaus Hofmann
2011	—	`conf`	Contention aware scheduling for NoC-based real-time systems. NORCHIP Mihkel Tagel, Peeter Ellervee, Thomas Hollstein, Gert Jervan
2011	—	`conf`	Invited paper: Design criteria for dependable System-on-Chip architectures. ReCoSoC Thomas Hollstein, Faizal Arya Samman, Ashok Jaiswal, Haoyuan Ying, Manfred Glesner, Klaus Hofmann
2011	J	`jnl`	New Theory for Deadlock-Free Multicast Routing in Wormhole-Switched Virtual-Channelless Networks-on-Chip. IEEE Trans. Parallel Distributed Syst. Faizal Arya Samman, Thomas Hollstein, Manfred Glesner
2011	J	`jnl`	Wormhole cut-through switching: Flit-level messages interleaving for virtual-channelless network-on-chip. Microprocess. Microsystems Faizal Arya Samman, Thomas Hollstein, Manfred Glesner
2010	J	`jnl`	Adaptive and Deadlock-Free Tree-Based Multicast Routing for Networks-on-Chip. IEEE Trans. Very Large Scale Integr. Syst. Faizal Arya Samman, Thomas Hollstein, Manfred Glesner
2009	J	`jnl`	Networks-On-Chip Based on Dynamic Wormhole Packet Identity Mapping Management. VLSI Design Faizal Arya Samman, Thomas Hollstein, Manfred Glesner
2008	A	`conf`	Flexible parallel pipeline network-on-chip based on dynamic packet identity management. IPDPS Faizal Arya Samman, Thomas Hollstein, Manfred Glesner
2008	—	`ch.`	Hardware Based Rapid Prototyping. Wiley Encyclopedia of Computer Science and Engineering Manfred Glesner, Tudor Murgan, Thomas Hollstein
2008	A	`conf`	Multicast Parallel Pipeline Router Architecture for Network-on-Chip. DATE Faizal Arya Samman, Thomas Hollstein, Manfred Glesner
2007	J	`jnl`	Advanced hardware/software co-design on reconfigurable network-on-chip based hyper-platforms. Comput. Electr. Eng. Thomas Hollstein, Manfred Glesner
2005	—	`conf`	Advanced On-Chip Communication Architectures and Routing Methods for Systems-on-Chip. ReCoSoC Thomas Hollstein, Sujan Pandey, Manfred Glesner
2005	A	`conf`	Buffer-Architecture Exploration for Routers in a Hierarchical Network-on-Chip. IPDPS Heiko Zimmer, Stefan Zink, Thomas Hollstein, Manfred Glesner
2005	A	`conf`	Deadlock-free routing and component placement for irregular mesh-based networks-on-chip. ICCAD Martin K. F. Schafer, Thomas Hollstein, Heiko Zimmer, Manfred Glesner
2005	—	`ed.`	Proceedings of the 1st International Workshop on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2005, Montpellier, France, June 2005 ReCoSoC Gilles Sassatelli, Manfred Glesner, Lionel Torres, Leandro Soares Indrusiak, Thomas Hollstein
2005	—	`conf`	Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques. SAMOS Manfred Glesner, Heiko Hinkelmann, Thomas Hollstein, Leandro Soares Indrusiak, Tudor Murgan, Abdulfattah Mohammad Obeid, Mihail Petrov, Thilo Pionteck, Peter Zipf
2004	—	`conf`	An Asynchronous Switch Implmentation for Systems-on-a-Chip. MBMV Peter Zipf, Heiko Hinkelmann, Adeel Ashraf, Thomas Hollstein, Manfred Glesner
2004	C	`conf`	Rapid Prototyping of an Integrated Testing and Debugging Unit. IEEE International Workshop on Rapid System Prototyping Ralf Ludewig, Thomas Hollstein, Falko Schütz, Manfred Glesner
2004	—	`conf`	Reconfigurable platforms for ubiquitous computing. Conf. Computing Frontiers Manfred Glesner, Thomas Hollstein, Leandro Soares Indrusiak, Peter Zipf, Thilo Pionteck, Mihail Petrov, Heiko Zimmer, Tudor Murgan
2003	C	`conf`	A hierarchical generic approach for on-chip communication, testing and debugging of SoCs. VLSI-SOC Thomas Hollstein, Ralf Ludewig, Christoph Mager, Peter Zipf, Manfred Glesner
2003	B	`conf`	Evaluation and Run-Time Optimization of On-chip Communication Structures in Reconfigurable Architectures. FPL Tudor Murgan, Mihail Petrov, Alberto García Ortiz, Ralf Ludewig, Peter Zipf, Thomas Hollstein, Manfred Glesner, Bernard Ölkrug, Jörg Brakensiek
2003	—	`conf`	Hinoc: A Hierarchical Generic Approach for on-Chip Communication, Testing and Debugging of SoCs. VLSI-SoC (Selected Papers) Thomas Hollstein, Ralf Ludewig, Heiko Zimmer, Christoph Mager, Simon Hohenstern, Manfred Glesner
2002	C	`conf`	Integrated Design and Test Generation Under Internet Based Environment MOSCITO. DSD André Schneider, Karl-Heinz Diener, Eero Ivask, Raimund Ubar, Elena Gramatová, Thomas Hollstein, Wieslaw Kuzmicz, Zebo Peng
2001	—	`conf`	Concept of a Joint University/Industry Course for Mixed-Signal System-On-Chip Design. MSE Jochen Mades, Thomas Schneider, André Windisch, Thomas Hollstein, Jürgen Becker, Manfred Glesner
1999	—	`conf`	Object-oriented Specification Approach for Synthesis of Hardware-/Software Systems. MBMV Matthias Meixner, Jürgen Becker, Thomas Hollstein, Manfred Glesner
1998	A	`conf`	From Algorithms to Hardware Architectures: A Comparison of Regular and Irregular Structured IDCT Algorithms. DATE Claus Schneider, Martin Kayss, Thomas Hollstein, Jürgen Deicke
1998	—	`conf`	HiPART: a new hierarchical semi-interactive HW-/SW partitioning approach with fast debugging for real-time embedded systems. CODES Thomas Hollstein, Jürgen Becker, Andreas Kirschbaum, Manfred Glesner
1997	B	`conf`	A prototyping environment for fuzzy controllers. FPL Thomas Hollstein, Andreas Kirschbaum, Manfred Glesner
1996	J	`jnl`	Computer-aided design of fuzzy systems based on generic VHDL specifications. IEEE Trans. Fuzzy Syst. Thomas Hollstein, Saman K. Halgamuge, Manfred Glesner
1995	B	`conf`	Advanced Method for Industry Related Education with an FPGA Design Self-Learning Kit. FPL U. Zahm, Thomas Hollstein, Hans-Jürgen Herpel, Norbert Wehn, Manfred Glesner
1994	—	`conf`	Rapid-Prototyping von anwendungsspezifischen Fuzzy Controllern mit Field Programmable Gate Arrays. Fuzzy Days Thomas Hollstein, Saman K. Halgamuge, Andreas Kirschbaum, Manfred Glesner
1992	—	`conf`	High-level synthesis in a rapid-prototype environment for mechatronic systems. EURO-DAC Norbert Wehn, Hans-Jürgen Herpel, Thomas Hollstein, Peter Poechmueller, Manfred Glesner