Thambipillai Srikanthan

299 papers A* 2A 4B 14C 26Misc 12Journal 106Unranked 134
YearRankTypeTitle / Venue / Authors
2024 J jnl
A Versatile Approach for Adaptive Grid Mapping and Grid Flex-Graph Exploration with a Field-Programmable Gate Array-Based Robot Using Hardware Schemes.
Sensors
Mudasar Basha, Munuswamy Siva Kumar, Mangali Chinna Chinnaiah, Siew-Kei Lam, Thambipillai Srikanthan, G. Divya Vani, Narambhatla Janardhan, Dodde Hari Krishna, Sanjay Dubey
2024 — conf
Achieving Real-time Visual Tracking with Low-Cost Edge AI.
ICCPS
Do Van Minh, Meiqing Wu, Siew-Kei Lam, Thambipillai Srikanthan
2024 — conf
GPSFormer: A Global Perception and Local Structure Fitting-Based Transformer for Point Cloud Understanding.
ECCV (8)
Changshuo Wang, Meiqing Wu, Siew-Kei Lam, Xin Ning, Shangshu Yu, Ruiping Wang, Weijun Li, Thambipillai Srikanthan
2024 J jnl
GPSFormer: A Global Perception and Local Structure Fitting-based Transformer for Point Cloud Understanding.
CoRR
Changshuo Wang, Meiqing Wu, Siew-Kei Lam, Xin Ning, Shangshu Yu, Ruiping Wang, Weijun Li, Thambipillai Srikanthan
2024 J jnl
Hardware Schemes for Smarter Indoor Robotics to Prevent the Backing Crash Framework Using Field Programmable Gate Array-Based Multi-Robots.
Sensors
Mudasar Basha, Munuswamy Siva Kumar, Mangali Chinna Chinnaiah, Siew-Kei Lam, Thambipillai Srikanthan, Narambhatla Janardhan, Dodde Hari Krishna, Sanjay Dubey
2024 A* conf
Hierarchical Object-Aware Dual-Level Contrastive Learning for Domain Generalized Stereo Matching.
NeurIPS
Yikun Miao, Meiqing Wu, Siew Kei Lam, Changsheng Li, Thambipillai Srikanthan
2023 J jnl
A Versatile Approach to Polygonal Object Avoidance in Indoor Environments with Hardware Schemes Using an FPGA-Based Multi-Robot.
Sensors
Mudasar Basha, Munuswamy Siva Kumar, Mangali Chinna Chinnaiah, Siew-Kei Lam, Thambipillai Srikanthan, Narambhatla Janardhan, Dodde Hari Krishna, Sanjay Dubey
2022 J jnl
Reconfiguration algorithms for synchronous communication on switch based degradable arrays.
Parallel Comput.
Yalan Wu, Jigang Wu, Peng Liu, Yinhe Han, Thambipillai Srikanthan
2022 — conf
Traffic Speed Prediction of Road Cluster with Heterogeneous Sampling Frequency.
PAAP
Guiyuan Jiang, Peilan He, Jigang Wu, Yidan Sun, Thambipillai Srikanthan
2021 — conf
Incorporating Compiler Optimization in Software Estimation for FPGA-based Embedded Processors.
ICICT
Deshya Wijesundera, Thilina Perera, Dilina Dehigama, Thambipillai Srikanthan
2021 J jnl
Longevity Framework: Leveraging Online Integrated Aging-Aware Hierarchical Mapping and VF-Selection for Lifetime Reliability Optimization in Manycore Processors.
IEEE Trans. Computers
Vijeta Rathore, Vivek Chaturvedi, Amit Kumar Singh, Thambipillai Srikanthan, Muhammad Shafique
2021 J jnl
Power-Efficient Mapping of Large Applications on Modern Heterogeneous FPGAs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Kalindu Herath, Alok Prakash, Suhaib A. Fahmy, Thambipillai Srikanthan
2021 — conf
Road-network aware Dynamic Workload Balancing Technique for Real-time Route Generation in On-Demand Public Transit.
SSCI
Thilina Perera, Lahiru Wijerathna, Deshya Wijesundera, Thambipillai Srikanthan
2020 — conf
Accelerating Computer Vision Algorithms on Heterogeneous Edge Computing Platforms.
SiPS
Alok Prakash, Nirmala Ramakrishnan, Kratika Garg, Thambipillai Srikanthan
2020 J jnl
Blockchain-based public auditing for big data in cloud storage.
Inf. Process. Manag.
Jiaxing Li, Jigang Wu, Guiyuan Jiang, Thambipillai Srikanthan
2020 A conf
Evaluating the Merits of Ranking in Structured Network Pruning.
ICDCS
Kuldeep Sharma, Nirmala Ramakrishnan, Alok Prakash, Siew Kei Lam, Thambipillai Srikanthan
2020 — conf
HARDY: Hardware based Analysis for malwaRe Detection in embedded sYstems.
SoCC
Sai Praveen Kadiyala, Mohit Garg, Manaar Alam, Hau T. Ngo, Debdeep Mukhopadhyay, Thambipillai Srikanthan
2020 J jnl
Hardware Performance Counter-Based Fine-Grained Malware Detection.
ACM Trans. Embed. Comput. Syst.
Sai Praveen Kadiyala, Pranav Jadhav, Siew-Kei Lam, Thambipillai Srikanthan
2020 J jnl
Improving accuracy of HPC-based malware classification for embedded platforms using gradient descent optimization.
J. Cryptogr. Eng.
Manaar Alam, Debdeep Mukhopadhyay, Sai Praveen Kadiyala, Siew-Kei Lam, Thambipillai Srikanthan
2020 J jnl
LAMBDA: Lightweight Assessment of Malware for emBeddeD Architectures.
ACM Trans. Embed. Comput. Syst.
Sai Praveen Kadiyala, Manaar Alam, Yash Shrivastava, Sikhar Patranabis, Muhamed Fauzi Bin Abbas, Arnab Kumar Biswas, Debdeep Mukhopadhyay, Thambipillai Srikanthan
2020 J jnl
Rapid and Robust Background Modeling Technique for Low-Cost Road Traffic Surveillance Systems.
IEEE Trans. Intell. Transp. Syst.
Kratika Garg, Nirmala Ramakrishnan, Alok Prakash, Thambipillai Srikanthan
2020 — conf
Technique for Vendor and Device Agnostic Hardware Area-Time Estimation.
ARC
Deshya Wijesundera, Kushagra Shah, Kisaru Liyanage, Alok Prakash, Thambipillai Srikanthan, Thilina Perera
2019 — conf
An Iterative Technique for Runtime Efficient Hardware-Software Partitioning.
FPT
Deshya Wijesundera, Kisaru Liyanage, Alok Prakash, Thambipillai Srikanthan, Thilina Perera
2019 — conf
Cluster-First, Route-Second Heuristic for EV Scheduling in On-Demand Public Transit.
CIS/RAM
Thilina Perera, Alok Prakash, Deshya Wijesundera, Thambipillai Srikanthan, Chathura Nagoda Gamage
2019 — conf
Dependency-Aware Clustering for Variable-Grained Hardware-Software Partitioning.
FPT
Deshya Wijesundera, Nadeeshan Dissanayake, Alok Prakash, Thambipillai Srikanthan, Damith Anhettigama
2019 J jnl
Fast Computation of Clustered Many-to-many Shortest Paths and Its Application to Map Matching.
ACM Trans. Spatial Algorithms Syst.
George Rosario Jagadeesh, Thambipillai Srikanthan
2019 — conf
Genetic Algorithm based Dynamic Scheduling of EV in a Demand Responsive Bus Service for First Mile Transit.
ITSC
Thilina Perera, Alok Prakash, Thambipillai Srikanthan
2019 — conf
Genetic Algorithm based EV Scheduling for On-Demand Public Transit System.
ICCS (5)
Thilina Perera, Alok Prakash, Thambipillai Srikanthan
2019 — conf
Hardware Efficient NIPALS Architecture for Principal Component Analysis of Hyper Spectral Images.
SoCC
Sai Praveen Kadiyala, Vikram Kumar Pudi, Mohit Garg, Hau T. Ngo, Siew-Kei Lam, Thambipillai Srikanthan
2019 A* conf
LifeGuard: A Reinforcement Learning-Based Task Mapping Strategy for Performance-Centric Aging Management.
DAC
Vijeta Rathore, Vivek Chaturvedi, Amit Kumar Singh, Thambipillai Srikanthan, Muhammad Shafique
2019 A conf
Rapid Technique to Eliminate Moving Shadows for Accurate Vehicle Detection.
WACV
Kratika Garg, Nirmala Ramakrishnan, Alok Prakash, Thambipillai Srikanthan, Punit Bhatt
2019 C conf
Towards Scalable Lifetime Reliability Management for Dark Silicon Manycore Systems.
IOLTS
Vijeta Rathore, Vivek Chaturvedi, Amit Kumar Singh, Thambipillai Srikanthan, Muhammad Shafique
2018 C conf
A Hybrid Methodology for Optimal Fleet Management in an Electric Vehicle Based Flexible Bus Service.
ICARCV
Thilina Perera, Alok Prakash, Thambipillai Srikanthan
2018 — conf
A Simulation Framework for a Real-Time Demand Responsive Public Transit System.
ITSC
Thilina Perera, Chathura Nagoda Gamage, Alok Prakash, Thambipillai Srikanthan
2018 J jnl
Algorithms for Replica Placement and Update in Tree Network.
Comput. J.
Jigang Wu, Long Chen, Xu Wang, Guiyuan Jiang, Siew-Kei Lam, Thambipillai Srikanthan
2018 — conf
Ant Colony Optimization based Module Footprint Selection and Placement for Lowering Power in Large FPGA Designs.
ReConFig
Kalindu Herath, Alok Prakash, Guiyuan Jiang, Thambipillai Srikanthan
2018 — conf
Communication-Aware Module Placement for Power Reduction in Large FPGA Designs.
ISVLSI
Kalindu Herath, Alok Prakash, Udaree Kanewala, Thambipillai Srikanthan
2018 J jnl
Framework for Rapid Performance Estimation of Embedded Soft Core Processors.
ACM Trans. Reconfigurable Technol. Syst.
Deshya Wijesundera, Alok Prakash, Thambipillai Srikanthan, Achintha Ihalage
2018 A conf
HiMap: A hierarchical mapping approach for enhancing lifetime reliability of dark silicon manycore systems.
DATE
Vijeta Rathore, Vivek Chaturvedi, Amit Kumar Singh, Thambipillai Srikanthan, R. Rohith, Siew-Kei Lam, Muhammad Shafique
2018 — conf
Hybrid Genetic Algorithm for an On-Demand First Mile Transit System Using Electric Vehicles.
ICCS (1)
Thilina Perera, Alok Prakash, Chathura Nagoda Gamage, Thambipillai Srikanthan
2018 — conf
LifeSim: A lifetime reliability simulator for manycore systems.
CCWC
R. Rohith, Vijeta Rathore, Vivek Chaturvedi, Amit Kumar Singh, Thambipillai Srikanthan, Siew-Kei Lam
2018 — conf
Performance Estimation of FPGA Modules for Modular Design Methodology Using Artificial Neural Network.
ARC
Kalindu Herath, Alok Prakash, Thambipillai Srikanthan
2018 J jnl
Rapid Memory-Aware Selection of Hardware Accelerators in Programmable SoC Design.
IEEE Trans. Very Large Scale Integr. Syst.
Alok Prakash, Christopher T. Clarke, Siew-Kei Lam, Thambipillai Srikanthan
2018 — conf
Side-Channel Assisted Malware Classifier with Gradient Descent Correction for Embedded Platforms.
PROOFS
Manaar Alam, Debdeep Mukhopadhyay, Sai Praveen Kadiyala, Siew Kei Lam, Thambipillai Srikanthan
2018 J jnl
Vision-based patient monitoring: a comprehensive review of algorithms and technologies.
J. Ambient Intell. Humaniz. Comput.
Supriya Sathyanarayana, Ravi Kumar Satzoda, Suchitra Sathyanarayana, Thambipillai Srikanthan
2018 — conf
Wibheda+: Framework for Data Dependency-aware Multi-constrained Hardware-Software Partitioning in FPGA-based SoCs for IoT Applications.
HEART
Deshya Wijesundera, Alok Prakash, Thilina Perera, Kalindu Herath, Thambipillai Srikanthan
2018 Misc conf
Wibheda: Framework for Data Dependency-Aware Multi-Constrained Hardware-Software Partitioning in FPGA-Based SoCs for IoT Devices.
FCCM
Deshya Wijesundera, Alok Prakash, Thilina Perera, Kalindu Herath, Thambipillai Srikanthan
2017 J jnl
A Framework for Fast and Robust Visual Odometry.
IEEE Trans. Intell. Transp. Syst.
Meiqing Wu, Siew-Kei Lam, Thambipillai Srikanthan
2017 — conf
Communication-aware Partitioning for Energy Optimization of Large FPGA Designs.
ACM Great Lakes Symposium on VLSI
Kalindu Herath, Alok Prakash, Guiyuan Jiang, Thambipillai Srikanthan
2017 — conf
Fault-Driven Reconfiguration Algorithm for Processor Arrays.
ISPA/IUCC
Yalan Wu, Jigang Wu, Yuqing Miu, Thambipillai Srikanthan
2017 — conf
High Speed Performance Estimation of Embedded Hard-core Processors in FPGA-based SoCs.
HEART
Deshya Wijesundera, Achintha Ihalage, Alok Prakash, Thambipillai Srikanthan
2017 — conf
Low complexity techniques for robust real-time traffic incident detection.
ITSC
Kratika Garg, Alok Prakash, Thambipillai Srikanthan
2017 — conf
Low-Complexity Global Motion Estimation for Aerial Vehicles.
CVPR Workshops
Nirmala Ramakrishnan, Alok Prakash, Thambipillai Srikanthan
2017 — conf
Low-Complexity Signature-Based Malware Detection for IoT Devices.
ATIS
Muhamed Fauzi Bin Abbas, Thambipillai Srikanthan
2017 J jnl
Online Map-Matching of Noisy and Sparse Location Data With Hidden Markov and Route Choice Models.
IEEE Trans. Intell. Transp. Syst.
George Rosario Jagadeesh, Thambipillai Srikanthan
2016 J jnl
Algorithms for bi-objective multiple-choice hardware/software partitioning.
Comput. Electr. Eng.
Wenjun Shi, Jigang Wu, Siew Kei Lam, Thambipillai Srikanthan
2016 J jnl
Cost-efficient Acceleration of Hardware Trojan Detection Through Fan-Out Cone Analysis and Weighted Random Pattern Technique.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Bin Zhou, Wei Zhang, Thambipillai Srikanthan, Jason Teo Kian Jin, Vivek Chaturvedi, Tao Luo
2016 J jnl
Enhanced low-complexity pruning for corner detection.
J. Real Time Image Process.
Nirmala Ramakrishnan, Meiqing Wu, Siew Kei Lam, Thambipillai Srikanthan
2016 C conf
Exploiting Configuration Dependencies for Rapid Area-efficient Customization of Soft-core Processors.
SCOPES
Deshya Wijesundera, Alok Prakash, Siew Kei Lam, Thambipillai Srikanthan
2016 — conf
FPGA Based Cyber Security Protocol for Automated Traffic Monitoring Systems: Proposal and Implementation.
ISVLSI
Anupam Chattopadhyay, Vikramkumar Pudi, Anubhab Baksi, Thambipillai Srikanthan
2016 — conf
Heuristic optimizations for high-speed low-latency online map matching with probabilistic sequence models.
ITSC
George Rosario Jagadeesh, Thambipillai Srikanthan
2016 — conf
Modified projected Landweber method for Compressive-Sensing reconstruction of images with non-orthogonal matrices.
ISIC
Vikramkumar Pudi, Anupam Chattopadhyay, Thambipillai Srikanthan
2016 — conf
Performance Constraint-Aware Task Mapping to Optimize Lifetime Reliability of Manycore Systems.
ACM Great Lakes Symposium on VLSI
Vijeta Rathore, Vivek Chaturvedi, Thambipillai Srikanthan
2016 — conf
Rapid design space exploration for soft core processor customization and selection.
FPT
Deshya Wijesundera, Alok Prakash, Thambipillai Srikanthan
2016 A conf
Real-time road traffic density estimation using block variance.
WACV
Kratika Garg, Siew Kei Lam, Thambipillai Srikanthan, Vedika Agarwal
2016 — conf
Reducing Access Latency in Virtual Machine Assignments.
HPCC/SmartCity/DSS
Renfei Gao, Jigang Wu, Guiyuan Jiang, Siew Kei Lam, Thambipillai Srikanthan
2016 — conf
Robust and low complexity obstacle detection and tracking.
ITSC
Meiqing Wu, Chengju Zhou, Thambipillai Srikanthan
2015 C conf
Adaptive Window Strategy for High-Speed and Robust KLT Feature Tracker.
PSIVT
Nirmala Ramakrishnan, Thambipillai Srikanthan, Siew Kei Lam, Gauri Ravindra Tulsulkar
2015 J jnl
Algorithmic aspects of graph reduction for hardware/software partitioning.
J. Supercomput.
Guiyuan Jiang, Jigang Wu, Siew Kei Lam, Thambipillai Srikanthan, Jizhou Sun
2015 — conf
Compute-efficient eye state detection: algorithm, dataset and evaluations.
ICDSC
Supriya Sathyanarayana, Ravi Kumar Satzoda, Thambipillai Srikanthan, Suchitra Sathyanarayana
2015 C conf
Critical-path optimization for efficient hardware realization of lifting and flipping DWTs.
ISCAS
Basant K. Mohanty, Pramod Kumar Meher, Thambipillai Srikanthan
2015 J jnl
Efficient VLSI Architecture for Decimation-in-Time Fast Fourier Transform of Real-Valued Data.
IEEE Trans. Circuits Syst. I Regul. Pap.
Pramod Kumar Meher, Basant Kumar Mohanty, Sujit Kumar Patel, Soumya Ganguly, Thambipillai Srikanthan
2015 B conf
Fast Replica Placement and Update Strategies in Tree Networks.
CCGRID
Xu Wang, Jigang Wu, Guiyuan Jiang, Siew Kei Lam, Thambipillai Srikanthan
2015 B conf
Identifying epileptic seizures based on a template-based eyeball detection technique.
ICIP
Supriya Sathyanarayana, Ravi Kumar Satzoda, Suchitra Sathyanarayana, Thambipillai Srikanthan
2015 — conf
KnapSim - Run-time efficient hardware-software partitioning technique for FPGAs.
SoCC
Kratika Garg, Yan Lin Aung, Siew Kei Lam, Thambipillai Srikanthan
2015 — conf
Leakage-aware intra-task dynamic voltage scaling technique for energy reduction in real-time embedded systems.
DSP
Vivek Chaturvedi, Basant K. Mohanty, Thambipillai Srikanthan
2015 — conf
Memory-access aware work-load distribution for peak-temperature reduction of 3D multi-core embedded systems.
DSP
Basant K. Mohanty, Vivek Chaturvedi, Vijeta Rathore, Thambipillai Srikanthan
2015 J jnl
Nonparametric Technique Based High-Speed Road Surface Detection.
IEEE Trans. Intell. Transp. Syst.
Meiqing Wu, Siew Kei Lam, Thambipillai Srikanthan
2015 — conf
Probabilistic Map Matching of Sparse and Noisy Smartphone Location Data.
ITSC
George Rosario Jagadeesh, Thambipillai Srikanthan
2015 — conf
Rapid estimation of DSPs utilization for efficient high-level synthesis.
DSP
Yan Lin Aung, Siew Kei Lam, Thambipillai Srikanthan
2014 — conf
A Compute-Efficient Algorithm for Robust Eyebrow Detection.
CVPR Workshops
Supriya Sathyanarayana, Ravi Kumar Satzoda, Suchitra Sathyanarayana, Thambipillai Srikanthan
2014 Misc conf
A low cost acceleration method for hardware trojan detection based on fan-out cone analysis.
CODES+ISSS
Bin Zhou, Wei Zhang, Thambipillai Srikanthan, J. K. J. Teo
2014 J jnl
Addressing Productivity Challenges in Domain-Specific Reconfigurable Platforms: A Case Study on Extended Kalman Filter-Based Motor Control.
J. Low Power Electron.
Yan Lin Aung, Siew Kei Lam, Thambipillai Srikanthan
2014 — conf
Algorithmic Aspects for Bi-Objective Multiple-Choice Hardware/Software Partitioning.
PAAP
Wenjun Shi, Jigang Wu, Siew Kei Lam, Thambipillai Srikanthan
2014 J jnl
Architecture and Application-Aware Management of Complexity of Mapping Multiplication to FPGA DSP Blocks in High Level Synthesis.
Int. J. Reconfigurable Comput.
Sharad Sinha, Thambipillai Srikanthan
2014 C conf
Area-delay efficient architecture for MP algorithm using reconfigurable inner-product circuits.
ISCAS
Pramod Kumar Meher, Basant K. Mohanty, Thambipillai Srikanthan
2014 — conf
Automated thresholding for low-complexity corner detection.
AHS
Nirmala Ramakrishnan, Meiqing Wu, Siew Kei Lam, Thambipillai Srikanthan
2014 J jnl
Constructing Low-temperature sub-Arrays on Reconfigurable VLSI Arrays.
J. Circuits Syst. Comput.
Jigang Wu, Yuanbo Zhu, Zhipeng Niu, Thambipillai Srikanthan
2014 J jnl
Constructing Sub-Arrays with ShortInterconnects from Degradable VLSI Arrays.
IEEE Trans. Parallel Distributed Syst.
Jigang Wu, Thambipillai Srikanthan, Guiyuan Jiang, Kai Wang
2014 J jnl
Dataflow Graph Partitioning for Area-Efficient High-Level Synthesis with Systems Perspective.
ACM Trans. Design Autom. Electr. Syst.
Sharad Sinha, Thambipillai Srikanthan
2014 J jnl
Exploiting FPGA-Aware Merging of Custom Instructions for Runtime Reconfiguration.
ACM Trans. Reconfigurable Technol. Syst.
Siew Kei Lam, Christopher T. Clarke, Thambipillai Srikanthan
2014 J jnl
Extended Compatibility Path Based Hardware binding: an Adaptive Algorithm for High Level synthesis of Area-Time Efficient Designs.
J. Circuits Syst. Comput.
Sharad Sinha, Udit Dhawan, Thambipillai Srikanthan
2014 J jnl
IP-Enabled C/C++ Based High Level Synthesis: A Step towards Better Designer Productivity and Design Performance.
Int. J. Reconfigurable Comput.
Sharad Sinha, Thambipillai Srikanthan
2014 — conf
Mask-based non-maximal suppression with iterative pruning for low-complexity corner detection.
ISIC
Nirmala Ramakrishnan, Meiqing Wu, Siew Kei Lam, Thambipillai Srikanthan
2014 J jnl
Parallel reconfiguration algorithms for mesh-connected processor arrays.
J. Supercomput.
Jigang Wu, Guiyuan Jiang, Yuze Shen, Siew Kei Lam, Jizhou Sun, Thambipillai Srikanthan
2014 J jnl
Rapid evaluation of custom instruction selection approaches with FPGA estimation.
ACM Trans. Embed. Comput. Syst.
Siew Kei Lam, Thambipillai Srikanthan, Christopher T. Clarke
2014 — conf
Reducing computational complexity for face detection.
ISIC
Supriya Sathyanarayana, Ravi Kumar Satzoda, Suchitra Sathyanarayana, Thambipillai Srikanthan
2014 — conf
Robust real-time route inference from sparse vehicle position data.
ITSC
George Rosario Jagadeesh, Thambipillai Srikanthan
2014 — conf
Soft error mitigation through selection of noninvert implication paths.
AHS
Bin Zhou, Thambipillai Srikanthan, Wei Zhang
2014 — conf
Stereo based ROIs generation for detecting pedestrians in close proximity.
ITSC
Meiqing Wu, Siew Kei Lam, Thambipillai Srikanthan
2014 C conf
Thermal-aware task scheduling for peak temperature minimization under periodic constraint for 3D-MPSoCs.
RSP
Vivek Chaturvedi, Amit Kumar Singh, Wei Zhang, Thambipillai Srikanthan
2014 — conf
Vision-based pedestrian tracking system using color and motion cue.
ISIC
Meiqing Wu, Siew Kei Lam, Thambipillai Srikanthan, Tushar Shah
2013 — conf
Additive Hough Transform on embedded computing platforms.
MWSCAS
Shantanu S. Sinha, Ravi Kumar Satzoda, S. Suchitra, Thambipillai Srikanthan
2013 C conf
Block-Based Search Space Reduction Technique for Face Detection Using Shoulder and Head Curves.
PSIVT
Supriya Sathyanarayana, Ravi Kumar Satzoda, Suchitra Sathyanarayana, Thambipillai Srikanthan
2013 J jnl
CADSE: communication aware design space exploration for efficient run-time MPSoC management.
Frontiers Comput. Sci.
Amit Kumar Singh, Akash Kumar, Jigang Wu, Thambipillai Srikanthan
2013 J jnl
Efficient heuristic and tabu search for hardware/software partitioning.
J. Supercomput.
Jigang Wu, Pu Wang, Siew Kei Lam, Thambipillai Srikanthan
2013 J jnl
FPGA-aware techniques for rapid generation of profitable custom instructions.
Microprocess. Microsystems
Alok Prakash, Siew Kei Lam, Christopher T. Clarke, Thambipillai Srikanthan
2013 — conf
Hardware-Software Codesign of EKF-Based Motor Control for Domain-Specific Reconfigurable Platform.
ISED
Yan Lin Aung, Siew Kei Lam, Thambipillai Srikanthan
2013 — conf
Identifying lane types: A modular approach.
ITSC
Suchitra Suchitra, Ravi Kumar Satzoda, Thambipillai Srikanthan
2013 J jnl
Iris Recognition Using Stable Dark Features.
J. Comput.
Bo Liu, Siew Kei Lam, Thambipillai Srikanthan, Weiqi Yuan
2013 — conf
Modelling communication overhead for accessing local memories in hardware accelerators.
ASAP
Alok Prakash, Siew Kei Lam, Thambipillai Srikanthan, Christopher T. Clarke
2013 J jnl
Perceptual Full-Reference Quality Assessment of Stereoscopic Images by Considering Binocular Visual Characteristics.
IEEE Trans. Image Process.
Feng Shao, Weisi Lin, Shanbo Gu, Gangyi Jiang, Thambipillai Srikanthan
2013 C conf
Preprocessing technique for accelerating reconfiguration of degradable VLSI arrays.
ISCAS
Yuanbo Zhu, Jigang Wu, Siew Kei Lam, Thambipillai Srikanthan
2013 — conf
Real-Time Image Resizing Hardware Accelerator for Object Detection Algorithms.
ISED
Gaurav Mishra, Yan Lin Aung, Meiqing Wu, Siew Kei Lam, Thambipillai Srikanthan
2012 J jnl
Accelerating throughput-aware runtime mapping for heterogeneous MPSoCs.
ACM Trans. Design Autom. Electr. Syst.
Amit Kumar Singh, Akash Kumar, Thambipillai Srikanthan
2012 J jnl
Algorithmic aspects for multiple-choice hardware/software partitioning.
Comput. Oper. Res.
Jigang Wu, Qiqiang Sun, Thambipillai Srikanthan
2012 — conf
Area-time estimation of C-based functions for design space exploration.
FPT
Yan Lin Aung, Siew Kei Lam, Thambipillai Srikanthan
2012 B conf
Custom instructions with local memory elements without expensive DMA transfers.
FPL
Alok Prakash, Christopher T. Clarke, Thambipillai Srikanthan
2012 B conf
Dataflow graph partitioning for high level synthesis.
FPL
Sharad Sinha, Thambipillai Srikanthan
2012 B conf
Detection & classification of arrow markings on roads using signed edge signatures.
Intelligent Vehicles Symposium
Suchitra Sathyanarayana, Ravi Kumar Satzoda, Thambipillai Srikanthan
2012 — conf
Exploiting FPGA-aware merging of custom instructions for runtime reconfiguration.
ReCoSoC
Siew Kei Lam, Thambipillai Srikanthan, Christopher T. Clarke
2012 C conf
Exploiting stable features for iris recognition of defocused images.
ISCAS
Bo Liu, Siew Kei Lam, Thambipillai Srikanthan, Weiqi Yuan
2012 J jnl
Iris Recognition of Defocused Images for Mobile phones.
Int. J. Pattern Recognit. Artif. Intell.
Bo Liu, Siew Kei Lam, Thambipillai Srikanthan, Weiqi Yuan
2012 C conf
Low-complexity pruning for accelerating corner detection.
ISCAS
Meiqing Wu, Nirmala Ramakrishnan, Siew Kei Lam, Thambipillai Srikanthan
2012 J jnl
Psychoacoustic Model Compensation for Robust Speaker Verification in Environmental Noise.
IEEE Trans. Speech Audio Process.
Ashish Panda, Thambipillai Srikanthan
2012 B conf
Reconfiguration Algorithms for Degradable VLSI Arrays with Switch Faults.
ICPADS
Yuanbo Zhu, Jigang Wu, Siew Kei Lam, Thambipillai Srikanthan
2012 B conf
Robust extraction of lane markings using gradient angle histograms and directional signed edges.
Intelligent Vehicles Symposium
Ravi Kumar Satzoda, Suchitra Sathyanarayana, Thambipillai Srikanthan
2011 — conf
A Design Space Exploration Methodology for Application Specific MPSoC Design.
ISVLSI
Amit Kumar Singh, Akash Kumar, Thambipillai Srikanthan
2011 — conf
A Low-Complexity Speaker-and-Word Recognition Application for Resource-Constrained Devices.
ISED
George Rosario Dhinesh, George Rosario Jagadeesh, Thambipillai Srikanthan
2011 J jnl
A Modular Simulator Framework for Network-on-Chip Based Manycore Chips Using UNISIM.
Trans. High Perform. Embed. Archit. Compil.
Xiongfei Liao, Wu Jigang, Thambipillai Srikanthan
2011 — conf
A Novel Binding Algorithm to Reduce Critical Path Delay During High Level Synthesis.
ISVLSI
Sharad Sinha, Udit Dhawan, Siew Kei Lam, Thambipillai Srikanthan
2011 Misc conf
A hybrid strategy for mapping multiple throughput-constrained applications on MPSoCs.
CASES
Amit Kumar Singh, Akash Kumar, Thambipillai Srikanthan
2011 J jnl
Accelerating UNISIM-Based Cycle-Level Microarchitectural Simulations on Multicore Platforms.
ACM Trans. Design Autom. Electr. Syst.
Xiongfei Liao, Thambipillai Srikanthan
2011 J jnl
Accelerating identification of custom instructions for extensible processors.
IET Circuits Devices Syst.
Tao Li, Jigang Wu, Yun Deng, Thambipillai Srikanthan, Xicheng Lu
2011 Misc conf
Algorithm for Time-dependent Shortest Safe Path on Transportation Networks.
ICCS
Jigang Wu, Song Jin, Haikun Ji, Thambipillai Srikanthan
2011 J jnl
Architecture-Aware Technique for Mapping Area-Time Efficient Custom Instructions onto FPGAs.
IEEE Trans. Computers
Siew Kei Lam, Thambipillai Srikanthan, Christopher T. Clarke
2011 — conf
Automatic Compilation of C Applications for FPGA-Based Hardware Acceleration.
PAAP
Lieu My Chuong, Yan Lin Aung, Siew Kei Lam, Thambipillai Srikanthan, Chai-Soon Lim
2011 — conf
Communication-Aware Design Space Exploration for Efficient Run-Time MPSoC Management.
PAAP
Amit Kumar Singh, Akash Kumar, Wu Jigang, Thambipillai Srikanthan
2011 — conf
Compiler-assisted technique for rapid performance estimation of FPGA-based processors.
SoCC
Yan Lin Aung, Siew Kei Lam, Thambipillai Srikanthan
2011 — conf
Computation and communication aware run-time mapping for NoC-based MPSoC platforms.
SoCC
Samarth Kaushik, Amit Kumar Singh, Thambipillai Srikanthan
2011 J jnl
Field programmable gate array-based acceleration of shortest-path computation.
IET Comput. Digit. Tech.
George Rosario Jagadeesh, Thambipillai Srikanthan, C. M. Lim
2011 — conf
Instruction set customization for area-constrained FPGA designs.
SoCC
Alok Prakash, Siew Kei Lam, Christopher T. Clarke, Thambipillai Srikanthan
2011 — conf
Preprocessing-Based Run-Time Mapping of Applications on NoC-based MPSoCs.
ISVLSI
Samarth Kaushik, Amit Kumar Singh, Thambipillai Srikanthan
2011 — conf
Run-Time Computation and Communication Aware Mapping Heuristic for NoC-Based Heterogeneous MPSoC Platforms.
PAAP
Samarth Kaushik, Amit Kumar Singh, Wu Jigang, Thambipillai Srikanthan
2011 — conf
Utilizing Dark Features for Iris Recognition in Less Constrained Environments.
PAAP
Bo Liu, Siew Kei Lam, Thambipillai Srikanthan, Weiqi Yuan
2010 — conf
A Novel Approach for Multilevel Fixed Outline Floorplanning.
PAAP
Baofang Chang, Wu Jigang, Thambipillai Srikanthan, Lian Li
2010 — conf
Accelerating shortest path computations in hardware.
CASE
Siew Kei Lam, Thambipillai Srikanthan
2010 J jnl
Algorithmic Aspects of Hardware/Software Partitioning: 1D Search Algorithms.
IEEE Trans. Computers
Wu Jigang, Thambipillai Srikanthan, Guang Chen
2010 C conf
An efficient edge and corner detector.
ICARCV
Song Yang, Siew Kei Lam, Thambipillai Srikanthan
2010 — conf
Architecture-Aware Custom Instruction Generation for Reconfigurable Processors.
ARC
Alok Prakash, Siew Kei Lam, Amit Kumar Singh, Thambipillai Srikanthan
2010 J jnl
Communication-aware heuristics for run-time task mapping on NoC-based MPSoC platforms.
J. Syst. Archit.
Amit Kumar Singh, Thambipillai Srikanthan, Akash Kumar, Wu Jigang
2010 J jnl
Efficient heuristic algorithms for path-based hardware/software partitioning.
Math. Comput. Model.
Jigang Wu, Thambipillai Srikanthan, Ting Lei
2010 J jnl
Hierarchical Additive Hough Transform for Lane Detection.
IEEE Embed. Syst. Lett.
Ravi Kumar Satzoda, Suchitra Sathyanarayana, Thambipillai Srikanthan, Supriya Sathyanarayana
2010 — conf
Hierarchical Loop Partitioning for Rapid Generation of Runtime Configurations.
ARC
Siew Kei Lam, Yun Deng, Jian Hu, Xilong Zhou, Thambipillai Srikanthan
2010 J jnl
Instruction cache tuning for embedded multitasking applications.
IET Comput. Digit. Tech.
Santanu Kumar Dash, Thambipillai Srikanthan
2010 — conf
Mapping real-life applications on run-time reconfigurable NoC-based MPSoC on FPGA.
FPT
Amit Kumar Singh, Akash Kumar, Thambipillai Srikanthan, Yajun Ha
2010 — conf
Performance estimation framework for FPGA-based processors.
FPT
Yan Lin Aung, Siew Kei Lam, Thambipillai Srikanthan
2010 J jnl
Preprocessing and Partial Rerouting Techniques for Accelerating Reconfiguration of Degradable VLSI Arrays.
IEEE Trans. Very Large Scale Integr. Syst.
Jigang Wu, Thambipillai Srikanthan, Xiaogang Han
2010 J jnl
Rapid Techniques for Performance Estimation of Processors.
J. Res. Pract. Inf. Technol.
Abhijit Ray, Thambipillai Srikanthan, Wu Jigang
2010 Misc conf
Run-time mapping of multiple communicating tasks on MPSoC platforms.
ICCS
Amit Kumar Singh, Wu Jigang, Akash Kumar, Thambipillai Srikanthan
2010 J jnl
Selecting profitable custom instructions for reconfigurable processors.
J. Syst. Archit.
Tao Li, Wu Jigang, Siew Kei Lam, Thambipillai Srikanthan, Xicheng Lu
2009 — conf
A Hybrid Branch-and-Bound Strategy for Hardware/Software Partitioning.
ACIS-ICIS
Wu Jigang, Baofang Chang, Thambipillai Srikanthan
2009 — conf
A Parallel Paths Communication Technique for Energy Efficient Wireless Sensor Networks.
ADHOCNETS
Balasaravanan Venugopal, Gayathri Venkataraman, Thambipillai Srikanthan
2009 C conf
Area-Time Estimation of Controller for Porting C-Based Functions onto FPGA.
IEEE International Workshop on Rapid System Prototyping
Lieu My Chuong, Siew Kei Lam, Thambipillai Srikanthan
2009 — conf
Efficient Approximate Algorithm for Hardware/Software Partitioning.
ACIS-ICIS
Wu Jigang, Ting Lei, Thambipillai Srikanthan
2009 — conf
Efficient Heuristic Algorithm for Rapid Custom-Instruction Selection.
ACIS-ICIS
Tao Li, Wu Jigang, Siew Kei Lam, Thambipillai Srikanthan, Xicheng Lu
2009 C conf
Efficient Heuristics for Minimizing Communication Overhead in NoC-based Heterogeneous MPSoC Platforms.
IEEE International Workshop on Rapid System Prototyping
Amit Kumar Singh, Wu Jigang, Alok Prakash, Thambipillai Srikanthan
2009 J jnl
Exploiting Inherent Parallelisms for Accelerating Linear Hough Transform.
IEEE Trans. Image Process.
Suchitra Sathyanarayana, Ravi Kumar Satzoda, Thambipillai Srikanthan
2009 B conf
Gradient angle histograms for efficient linear Hough transform.
ICIP
Ravi Kumar Satzoda, Suchitra Sathyanarayana, Thambipillai Srikanthan
2009 C conf
Instruction Cache Tuning for Embedded Multitasking Applications.
IEEE International Workshop on Rapid System Prototyping
Santanu Kumar Dash, Thambipillai Srikanthan
2009 C conf
Mapping Algorithms for NoC-Based Heterogeneous MPSoC Platforms.
DSD
Amit Kumar Singh, Wu Jigang, Alok Prakash, Thambipillai Srikanthan
2009 J jnl
Minimizing interconnect length on reconfigurable meshes.
Frontiers Comput. Sci. China
Jigang Wu, Thambipillai Srikanthan, Kai Wang
2009 C conf
Modeling RTOS Components for Instruction Cache Hit Rate Estimation.
ISCAS
Santanu Kumar Dash, Thambipillai Srikanthan
2009 B conf
Rapid design exploration framework for application-aware customization of soft core processors.
FPL
Alok Prakash, Siew Kei Lam, Amit Kumar Singh, Thambipillai Srikanthan
2009 J jnl
Rapid design of area-efficient custom instructions for reconfigurable embedded processing.
J. Syst. Archit.
Siew Kei Lam, Thambipillai Srikanthan
2009 J jnl
Run-time management of custom instructions on a partially reconfigurable architecture.
Int. J. Inf. Commun. Technol.
Siew Kei Lam, Huang Fan, Thambipillai Srikanthan, Wu Jigang
2009 J jnl
Selecting Profitable Custom Instructions for Area-Time-Efficient Realization on Reconfigurable Architectures.
IEEE Trans. Ind. Electron.
Siew Kei Lam, Thambipillai Srikanthan, Christopher T. Clarke
2009 C conf
Techniques for Area-time Efficient Image Rotation.
ISCAS
Ravi Kumar Satzoda, Suchitra Sathyanarayana, Thambipillai Srikanthan
2008 B conf
A Short Course on Implementing FPGA Based Digital Systems.
ICPADS
George Rosario Jagadeesh, Siew Kei Lam, Thambipillai Srikanthan
2008 B conf
A temperature-aware virtual submesh allocation scheme for noc-based manycore chips.
SPAA
Xiongfei Liao, Wu Jigang, Thambipillai Srikanthan
2008 J jnl
Algorithmic aspects for functional partitioning and scheduling in hardware/software co-design.
Des. Autom. Embed. Syst.
Wu Jigang, Thambipillai Srikanthan, Tao Jiao
2008 J jnl
Algorithmic aspects for power-efficient hardware/software partitioning.
Math. Comput. Simul.
Jigang Wu, Thambipillai Srikanthan, Chengbin Yan
2008 J jnl
Compiler Back End Design for Translating Multi-radio Descriptions to Operating System-less Asynchronous Processor Datapaths.
J. Comput.
Dipnarayan Guha, Thambipillai Srikanthan
2008 J jnl
Energy-efficient cluster-based scheme for failure management in sensor networks.
IET Commun.
Gayathri Venkataraman, Sabu Emmanuel, Thambipillai Srikanthan
2008 C conf
Finding minimum interconnect sub-arrays in reconfigurable VLSI arrays.
ISCAS
Wu Jigang, Thambipillai Srikanthan, Kai Wang
2008 J jnl
New Model and Algorithm for Hardware/Software Partitioning.
J. Comput. Sci. Technol.
Jigang Wu, Thambipillai Srikanthan, Guang-Wei Zou
2008 J jnl
Parallelizing the Hough Transform Computation.
IEEE Signal Process. Lett.
Ravi Kumar Satzoda, Suchitra Sathyanarayana, Thambipillai Srikanthan
2008 — conf
Performance Estimation: IPC.
ICYCS
Abhijit Ray, Wu Jigang, Thambipillai Srikanthan
2008 — conf
Rapid estimation of instruction cache hit rates using loop profiling.
ASAP
Santanu Kumar Dash, Thambipillai Srikanthan
2007 J jnl
A Residue-to-Binary Converter for a New Five-Moduli Set.
IEEE Trans. Circuits Syst. I Regul. Pap.
Bin Cao, Chip-Hong Chang, Thambipillai Srikanthan
2007 B conf
An Embedded Systems graduate education for Singapore.
ICPADS
Ian McLoughlin, Douglas L. Maskell, Thambipillai Srikanthan, Wooi-Boon Goh
2007 — conf
Estimating Area Costs of Custom Instructions for FPGA-based Reconfigurable Processors.
ASAP
Siew Kei Lam, Thambipillai Srikanthan
2007 — conf
Improved Spectral Subtraction Technique for Text-Independent Speaker Verification.
DSP
Ashish Panda, Neha Tripathi, Thambipillai Srikanthan
2007 J jnl
Integrated Row and Column Rerouting for Reconfiguration of VLSI Arrays with Four-Port Switches.
IEEE Trans. Computers
Wu Jigang, Thambipillai Srikanthan, Xiaodong Wang
2007 C conf
One-dimensional Search Algorithms for Hardware/Software Partitioning.
MEMOCODE
Wu Jigang, Thambipillai Srikanthan, Guang Chen
2007 J jnl
Rapid Area-Time Estimation Technique for Porting C-based Applications onto FPGA platforms.
Scalable Comput. Pract. Exp.
Lieu My Chuong, Siew Kei Lam, Thambipillai Srikanthan
2007 — conf
Reconfigurable Frame Parser Design for Multi-Radio Support on Asynchronous Microprocessor Cores.
ICCTA
Dipnarayan Guha, Thambipillai Srikanthan
2007 J jnl
Size-restricted cluster formation and cluster maintenance technique for mobile ad hoc networks.
Int. J. Netw. Manag.
Gayathri Venkataraman, Sabu Emmanuel, Thambipillai Srikanthan
2007 — conf
Temperature-Aware Submesh Allocation Scheme for Heat Balancing on Chip-Multiprocessors.
ASAP
Xiongfei Liao, Wu Jigang, Thambipillai Srikanthan
2006 J jnl
Algorithmic aspects of area-efficient hardware/software partitioning.
J. Supercomput.
Wu Jigang, Thambipillai Srikanthan
2006 — conf
An Efficient Algorithm for DPA-resistent RSA.
APCCAS
Yi Wang, Jussipekka Leiwo, Thambipillai Srikanthan, Luo Jianwen
2006 J jnl
An efficient algorithm for the collapsing knapsack problem.
Inf. Sci.
Wu Jigang, Thambipillai Srikanthan
2006 B conf
Area and delay estimation for FPGA implementation of coarse-grained reconfigurable architectures.
LCTES
Leipo Yan, Thambipillai Srikanthan, Niu Gang
2006 Misc conf
Design considerations for multi-radio co-existence on asynchronous processors using LAD extensions.
CISS
Dipnarayan Guha, Kugan Vivekanandarajah, Thambipillai Srikanthan
2006 — conf
Efficient Algorithms for Hardware/Software Partitioning to Minimize Hardware Area.
APCCAS
Wu Jigang, Thambipillai Srikanthan
2006 J jnl
Efficient Architectures for Segmentation of Endoscopic Images in Micro-Robotic Auto Navigation Systems.
Int. J. Humanoid Robotics
C. S. Lim, Siew Kei Lam, Hui Tian, Thambipillai Srikanthan
2006 — conf
Efficient algorithm for functional scheduling in hardware/software co-design.
FPT
Wu Jigang, Thambipillai Srikanthan, Tao Jiao
2006 — conf
Efficient management of custom instructions for run-time reconfigurable instruction set processors.
FPT
Siew Kei Lam, Bharathi N. Krishnan, Thambipillai Srikanthan
2006 — conf
Energy Efficient Cache Tuning with Performance Bound.
DELTA
Leipo Yan, Siew Kei Lam, Thambipillai Srikanthan, Wu Jigang
2006 — conf
FPGA based DPA-resistant Unified Architecture for Signcryption.
ITNG
Yi Wang, Jussipekka Leiwo, Thambipillai Srikanthan, Yu Yu
2006 C conf
Low Area-time Complexity Averaging Scheme for Thumbnail Generation.
ICARCV
Ravi Kumar Satzoda, Suchitra Sathyanarayana, Thambipillai Srikanthan
2006 J jnl
Low-complex dynamic programming algorithm for hardware/software partitioning.
Inf. Process. Lett.
Wu Jigang, Thambipillai Srikanthan
2006 — conf
Modeling Arbitrator Delay-Area Dependencies in Customizable Instruction Set Processors.
DELTA
Siew Kei Lam, Mohammed Shoaib, Thambipillai Srikanthan
2006 — conf
New Reconfiguration Algorithm for Degradable VLSI Arrays.
APCCAS
Wu Jigang, Thambipillai Srikanthan, Xiaodong Wang
2006 — conf
Profile Directed Instruction Cache Tuning for Embedded Systems.
ISVLSI
Kugan Vivekanandarajah, Thambipillai Srikanthan, Christopher T. Clarke
2006 J jnl
Rapid generation of custom instructions using predefined dataflow structures.
Microprocess. Microsystems
Siew Kei Lam, Thambipillai Srikanthan, Christopher T. Clarke
2006 J jnl
Reconfiguration Algorithms for Power Efficient VLSI Subarrays with Four-Port Switches.
IEEE Trans. Computers
Wu Jigang, Thambipillai Srikanthan
2006 J jnl
Scalable and modular memory-based systolic architectures for discrete Hartley transform.
IEEE Trans. Circuits Syst. I Regul. Pap.
Pramod Kumar Meher, Thambipillai Srikanthan, Jagdish Chandra Patra
2006 — conf
Unified Signed-Digit Number Adder for RSA and ECC Public-key Cryptosystems.
APCCAS
Yi Wang, Douglas L. Maskell, Jussipekka Leiwo, Thambipillai Srikanthan
2005 — conf
A configurable dual moduli multi-operand modulo adder.
ISCAS (2)
Chip-Hong Chang, Shibu Menon, Bin Cao, Thambipillai Srikanthan
2005 — conf
A new design method to modulo 2
ISCAS (1)
Bin Cao, Thambipillai Srikanthan, Chip-Hong Chang
2005 — conf
A new formulation of fast diminished-one multioperand modulo 2
ISCAS (1)
Bin Cao, Chip-Hong Chang, Thambipillai Srikanthan
2005 — ed.
Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, ACSAC 2005, Singapore, October 24-26, 2005, Proceedings
Asia-Pacific Computer Systems Architecture Conference
Thambipillai Srikanthan, Jingling Xue, Chip-Hong Chang
2005 C conf
Custom Instruction Filter Cache Synthesis for Low-Power Embedded Systems.
IEEE International Workshop on Rapid System Prototyping
Kugan Vivekanandarajah, Thambipillai Srikanthan
2005 C conf
Efficient Techniques and Hardware Analysis for Mesh-Connected Processors.
ICA3PP
Wu Jigang, Thambipillai Srikanthan, Heiko Schröder
2005 — conf
Efficient high radix modular multiplication for high-speed computing in re-configurable hardware [cryptographic applications].
ISCAS (2)
Yi Wang, Jussipekka Leiwo, Thambipillai Srikanthan
2005 J jnl
Efficient reconfigurable techniques for VLSI arrays with 6-port switches.
IEEE Trans. Very Large Scale Integr. Syst.
Wu Jigang, Thambipillai Srikanthan, Heiko Schröder
2005 — conf
Elimination of sign precomputation in flat CORDIC.
ISCAS (4)
Suchitra Sathyanarayana, S. Sukthankar, Thambipillai Srikanthan, Christopher T. Clarke
2005 — conf
Minimizing Power in Hardware/Software Partitioning.
Asia-Pacific Computer Systems Architecture Conference
Wu Jigang, Thambipillai Srikanthan, Chengbin Yan
2005 — conf
Morphable Structures for Reconfigurable Instruction Set Processors.
Asia-Pacific Computer Systems Architecture Conference
Siew Kei Lam, Yun Deng, Thambipillai Srikanthan
2005 J jnl
New adaptive color quantization method based on self-organizing maps.
IEEE Trans. Neural Networks
Chip-Hong Chang, Pengfei Xu, Rui Xiao, Thambipillai Srikanthan
2005 J jnl
Power Efficient Sub-Array in Reconfigurable VLSI Meshes.
J. Comput. Sci. Technol.
Wu Jigang, Thambipillai Srikanthan
2005 — conf
Practical Techniques for Performance Estimation of Processors.
IWSOC
Abhijit Ray, Thambipillai Srikanthan, Wu Jigang
2005 J jnl
VLSI-efficient schemes for high-speed construction of tangent graph.
Robotics Auton. Syst.
Siew Kei Lam, K. Sridharan, Thambipillai Srikanthan
2004 J jnl
An efficient data structure for branch-and-bound algorithm.
Inf. Sci.
Wu Jigang, Thambipillai Srikanthan
2004 J jnl
Area-Time Efficient Sign Detection Technique for Binary Signed-Digit Number System.
IEEE Trans. Computers
Thambipillai Srikanthan, Siew Kei Lam, Mishra Suman
2004 — conf
Decode filter cache for energy efficient instruction cache hierarchy in super scalar architectures.
ASP-DAC
Kugan Vivekanandarajah, Thambipillai Srikanthan, Saurav Bhattacharyya
2004 — conf
Design of residue-to-binary converter for a new 5-moduli superset residue number system.
ISCAS (2)
Bin Cao, Thambipillai Srikanthan, Chip-Hong Chang
2004 C conf
Dynamic Filter Cache for Low Power Instruction Memory Hierarchy.
DSD
Kugan Vivekanandarajah, Thambipillai Srikanthan, Saurav Bhattacharyya
2004 — conf
Fast reconfiguring mesh-connected VLSI arrays.
ISCAS (2)
Wu Jigang, Thambipillai Srikanthan
2004 — conf
Finding High Performance Solution in Reconfigurable Mesh-Connected VLSI Arrays.
Asia-Pacific Computer Systems Architecture Conference
Wu Jigang, Thambipillai Srikanthan
2004 J jnl
Hardware-efficient schemes for logarithmic approximation and binary search with application to visibility graph construction.
IEEE Trans. Ind. Electron.
Siew Kei Lam, K. Sridharan, Thambipillai Srikanthan
2004 B conf
High-throughput image rotation using sign-prediction based redundant cordic algorithm.
ICIP
Suchitra Sathyanarayana, Siew Kei Lam, Thambipillai Srikanthan
2004 Misc conf
Knapsack Model and Algorithm for HW/SW Partitioning Problem.
International Conference on Computational Science
Abhijit Ray, Wu Jigang, Thambipillai Srikanthan
2004 J jnl
Knapsack Model and Algorithm for Hardware/Software Partitioning Problem.
Comput. Artif. Intell.
Abhijit Ray, Wu Jigang, Thambipillai Srikanthan
2004 — conf
RTOS acceleration on soft-core processors using instruction set customization.
FPT
Jin Zhenyu, Mohit Sindhwani, Thambipillai Srikanthan
2003 — conf
A Low Power Algorithm for Reconfigurable VLSI/WSI Arrays.
Embedded Systems and Applications
Wu Jigang, Thambipillai Srikanthan, Chandni R. Patel
2003 Misc conf
A Run-time Reconfiguration Algorithm for VLSI Arrays.
VLSI Design
Wu Jigang, Thambipillai Srikanthan
2003 J jnl
A VLSI architecture for 3-D self-organizing map based color quantization and its FPGA implementation.
J. Syst. Archit.
N. Sudha, Thambipillai Srikanthan, Babu Mailachalam
2003 — conf
An adaptive initialization technique for color quantization by self organizing feature map.
ICASSP (3)
Chip-Hong Chang, Rui Xiao, Thambipillai Srikanthan
2003 J jnl
An improved reconfiguration algorithm for degradable VLSI/WSI arrays.
J. Syst. Archit.
Wu Jigang, Thambipillai Srikanthan
2003 — conf
Architectural design and analysis toolbox to implement shortest path algorithms in hardware.
ISCAS (3)
K. H. Quek, Siew Kei Lam, N. K. Agrawal, Thambipillai Srikanthan
2003 — conf
Design of a high speed reverse converter for a new 4-moduli set residue number system.
ISCAS (4)
Bin Cao, Thambipillai Srikanthan, Chip-Hong Chang
2003 — conf
Implementing Otsu's thresholding process using area-time efficient logarithmic approximation unit.
ISCAS (4)
Hui Tian, Siew Kei Lam, Thambipillai Srikanthan
2003 — conf
Incorporating Pattern Prediction Technique for Energy Efficient Filter Cache Design.
IWSOC
Kugan Vivekanandarajah, Thambipillai Srikanthan, Saurav Bhattacharyya, Prasanna Venkatesh Kannan
2003 — conf
Low cost logarithmic techniques for high-precision computations.
ISCAS (5)
Siew Kei Lam, Devendra K. Chaudhaiy, Thambipillai Srikanthan
2003 — conf
Low-Power Transform-Domain Coding by Separable Two-Dimensional Hartley-Like Transform.
Embedded Systems and Applications
Pramod Kumar Meher, Thambipillai Srikanthan, M. Mahesh Kumar, S. Arunkumar
2003 — conf
New efficient residue-to-binary converters for 4-moduli set {2
ISCAS (4)
Bin Cao, Chip-Hong Chang, Thambipillai Srikanthan
2003 Misc conf
On the Reconfiguration Algorithm for Fault-Tolerant VLSI Arrays.
International Conference on Computational Science
Wu Jigang, Thambipillai Srikanthan
2003 — conf
Partial rerouting algorithm for reconfigurable VLSI arrays.
ISCAS (5)
Wu Jigang, Thambipillai Srikanthan
2003 — conf
Static Pattern Predictor (SPP) Based Low Power Instruction Cache Design.
Embedded Systems and Applications
Kugan Vivekanandarajah, Thambipillai Srikanthan, Christopher T. Clarke, Saurav Bhattacharyya
2003 — conf
Vector quantization techniques for GMM based speaker verification.
ICASSP (2)
Gurmeet Singh, Ashish Panda, Saurav Bhattacharyya, Thambipillai Srikanthan
2002 — conf
A Hardware Efficient Technique for Rapid Lumen Segmentation from Endoscopic Images.
JCIS
Hui Tian, Thambipillai Srikanthan, Vijayan K. Asari
2002 — conf
A MSB-biased self-organizing feature map for still color image compression.
APCCAS (2)
Chip-Hong Chang, Rui Xiao, Thambipillai Srikanthan
2002 J jnl
A linear approximation based hybrid approach for binary logarithmic conversion.
Microprocess. Microsystems
Siew Kei Lam, Thambipillai Srikanthan
2002 J jnl
A novel technique for eliminating iterative based computation of polarity of micro-rotations in CORDIC based sine-cosine generators.
Microprocess. Microsystems
Thambipillai Srikanthan, Bimal Gisuthan
2002 — conf
An efficient architecture for adaptive progressive thresholding.
APCCAS (1)
Hui Tian, Siew Kei Lam, Thambipillai Srikanthan, Chip-Hong Chang
2002 J jnl
Area-time issues in the VLSI implementation of self organizing map neural networks.
Microprocess. Microsystems
Babu Mailachalam, Thambipillai Srikanthan
2002 J jnl
Environment Modelling for Robot Navigation Using VLSI-Efficient Logarithmic Approximation Method.
J. Intell. Robotic Syst.
Siew Kei Lam, Thambipillai Srikanthan
2002 J jnl
Field programable gate array based architecture for real time image segmentation by region growing algorithm.
J. Electronic Imaging
Chip-Hong Chang, Hui Tian, Thambipillai Srikanthan, Chai-Soon Lim
2002 — conf
Fuzzy-ART based image compression for hardware implementation.
APCCAS (2)
C. S. Lim, Thambipillai Srikanthan, Vijayan K. Asari, Siew Kei Lam
2002 J jnl
Heuristic techniques for accelerating hierarchical routing on road networks.
IEEE Trans. Intell. Transp. Syst.
George Rosario Jagadeesh, Thambipillai Srikanthan, K. H. Quek
2002 — conf
Incorporating area-time flexibility to a binary signed-digit adder.
APCCAS (1)
Siew Kei Lam, Thambipillai Srikanthan, Nitin Goyal, Neeraj Tyagi
2002 Misc conf
Load Sharing in Large Scale Distributed Systems: A Novel Approach.
PDPTA
Gurdeep S. Hura, Sheeja Mohan, Thambipillai Srikanthan
2002 — conf
Multiple sequence families with efficient hardware architecture for use in spread spectrum watermarking.
ISCAS (1)
C. S. Lim, Saman S. Abeysekera, Thambipillai Srikanthan, S. K. Amarasinghe
2002 Misc conf
New Architecture and Algorithms for Degradable VLSI/WSI Arrays.
COCOON
Wu Jigang, Heiko Schröder, Thambipillai Srikanthan
2002 J jnl
On Load Sharing in Distributed Systems: a Novel Approach.
Trans. SDPS
Gurdeep S. Hura, Sheeja Mohan, Thambipillai Srikanthan
2002 — conf
On the Initialization and Training Methods for Kohonen Self-Organizing Feature Maps in Color Image Quantization.
DELTA
Rui Xiao, Chip-Hong Chang, Thambipillai Srikanthan
2002 J jnl
Optimizing Scaling Factor Computations in Flat Cordic.
J. Circuits Syst. Comput.
Thambipillai Srikanthan, Bimal Gisuthan
2002 J jnl
Segmenting endoscopic images using adaptive progressive thresholding: a hardware perspective.
J. Syst. Archit.
Vijayan K. Asari, Thambipillai Srikanthan
2002 — conf
Study on the Effect of Object to Camera Distance on Polynomial Expansion Coefficients in Barrel Distortion Correction.
SSIAI
Hui Tian, Thambipillai Srikanthan, Vijayan K. Asari, Siew Kei Lam
2001 — conf
A Recursive Otsu-Iris Filter Technique for High-Speed Detection of Lumen Region from Endoscopic Images.
AIPR
Hui Tian, Thambipillai Srikanthan, Vijayan K. Asari
2001 J jnl
High-Speed Environment Representation Scheme for Dynamic Path Planning.
J. Intell. Robotic Syst.
Siew Kei Lam, Thambipillai Srikanthan
2001 J jnl
Network Simulation Environment (NSE): A Generic Framework for Network Graphs.
Telecommun. Syst.
Gurdeep S. Hura, Thambipillai Srikanthan, Chia Cher Yong
2000 — conf
A High Speed Flat CORDIC Based Neuron with Multi-Level Activation Function for Robust Pattern Recognition.
CAMP
Bimal Gisutham, Thambipillai Srikanthan, Vijayan K. Asari
2000 — conf
A Robust Parallel Architecture for Adaptive Color Quantization.
ITCC
Babu Mailachalam, Thambipillai Srikanthan
2000 J jnl
Dynamic multicast routing in VLSI.
Comput. Commun.
Siew Kei Lam, Thambipillai Srikanthan
1999 C conf
A Reverse Converter for the 4-moduli Superset {2
IEEE Symposium on Computer Arithmetic
Manish Bhardwaj, Thambipillai Srikanthan, Christopher T. Clarke
1999 J jnl
A pipelined architecture for image segmentation by adaptive progressive thresholding.
Microprocess. Microsystems
K. Vijayan Asari, Thambipillai Srikanthan, Sanjiv Kumar, D. Radhakrishnan
1999 — conf
New area efficient residue-to-weighted number system converters.
ICECS
Jimson Mathew, D. Radhakrishnan, Thambipillai Srikanthan
1999 — conf
Residue-to-binary arithmetic converter for moduli set {2n -1, 2n, 2n+1, 2n+1 -1}.
NSIP
Jimson Mathew, D. Radhakrishnan, Thambipillai Srikanthan
1999 C conf
VLSI Costs of Arithmetic Parallelism: A Residue Reverse Conversion Perspectiv.
IEEE Symposium on Computer Arithmetic
Manish Bhardwaj, Thambipillai Srikanthan, Christopher T. Clarke
1998 J jnl
An Internet application for on-line banking.
Comput. Commun.
S. K. Leong, Thambipillai Srikanthan, Gurdeep S. Hura
1998 J jnl
An OLE-based speech compression system for multimedia applications.
Microprocess. Microsystems
Thambipillai Srikanthan, Goh Wee Leng, S. K. Amarasinghe
1998 — conf
An Object Oriented GUI for Clustering Technique Based Network Simulations.
ESM
Thambipillai Srikanthan, Gurdeep S. Hura, Chia Cher Yong
1998 Misc conf
Designing efficient residue arithmetic based VLSI correlators.
ICASSP
Aniruddha A. Deodhar, Manish Bhardwaj, Christopher T. Clarke, Thambipillai Srikanthan
1997 J jnl
An efficient adaptive routing algorithm for a network management system.
Comput. Commun.
Thambipillai Srikanthan, Gurdeep S. Hura
1996 — conf
An Efficient Adaptive Routing Strategy for Network Management Protocol.
ESM
Thambipillai Srikanthan, Gurdeep Singh Hura
1995 J jnl
A transputer based vehicle simulator.
Microprocess. Microsystems
Thambipillai Srikanthan, Kai-Yun Chan, Hock Soon Seah, S. K. Leong