Tetsuya Uemura

12 papers A* 1Journal 2Unranked 9
YearRankTypeTitle / Venue / Authors
2007 — conf
Four-State Magnetic Random Access Memory and Ternary Content Addressable Memory Using CoFe-Based Magnetic Tunnel Junctions.
ISMVL
Tetsuya Uemura, Takao Marukame, Ken-ichi Matsuda, Masafumi Yamamoto
2005 J jnl
Clinical support system using information aggregation and visualization for order data.
Syst. Comput. Jpn.
Shuichi Toyoda, Noboru Niki, Tetsuya Uemura, Hiromu Nishitani
2005 J jnl
Four-Valued Magnetic Random Access Memory Based on Magneto Tunnel Junction and Resonant Tunneling Diode.
J. Multiple Valued Log. Soft Comput.
Tetsuya Uemura, Masafumi Yamamoto
2003 — conf
Proposal of Four-Valued MRAM based on MTJ/RTD Structure.
ISMVL
Tetsuya Uemura, Masafumi Yamamoto
2002 — conf
Rise time analysis of MOBILE circuit.
ISCAS (5)
Tetsuya Uemura, Pinaki Mazumder
2001 — conf
A Three-Valued D-Flip-Flop and Shift Register Using Multiple-Junction Surface Tunnel Transistors.
ISMVL
Tetsuya Uemura, Toshio Baba
2000 — conf
Demonstration of a Novel Multiple-Valued T-Gate Using Multiple-Junction Surface Tunnel Transistors and Its Application to Three-Valued Data Flip-Flop.
ISMVL
Tetsuya Uemura, Toshio Baba
1999 — conf
Design and Analysis of a Novel Quantum-MOS Sense Amplifier Circuit.
Great Lakes Symposium on VLSI
Tetsuya Uemura, Pinaki Mazumder
1998 — conf
Development of InGaAs-Based Multiple-Junction Surface Tunnel Transistors for Multiple-Valued Logic Circuits.
ISMVL
Toshio Baba, Tetsuya Uemura
1997 — conf
Multiple-Junction Surface Tunnel Transistors for Multiple-Valued Logic Circuits .
ISMVL
Toshio Baba, Tetsuya Uemura
1992 — conf
3D facial image analysis for human identification.
ICPR (1)
Takashi Nagamine, Tetsuya Uemura, Isao Masuda
1990 A* conf
Region-based reconstruction of an indoor scene using an integration of active and passive sensing techniques.
ICCV
Junichi Hoshino, Tetsuya Uemura, Isao Masuda