Teruo Tanaka

22 papers A 3C 2Journal 3Unranked 14
YearRankTypeTitle / Venue / Authors
2024 J jnl
Light Weight Coarse Grid Aggregation for Smoothed Aggregation Algebraic Multigrid Solver.
IEEE Access
Akihiro Fujii, Teruo Tanaka, Kengo Nakajima
2023 C conf
Parallelization of Automatic Tuning for Hyperparameter Optimization of Pedestrian Route Prediction Applications using Machine Learning.
HPC Asia
Sorataro Fujika, Yuga Yajima, Teruo Tanaka, Akihiro Fujii, Yuka Kato, Satoshi Ohshima, Takahiro Katagiri
2019 C conf
Acceleration of Symmetric Sparse Matrix-Vector Product using Improved Hierarchical Diagonal Blocking Format.
HPC Asia
Ryo Muro, Akihiro Fujii, Teruo Tanaka
2019 J jnl
Time Segment Correction Method for Parallel Time Integration.
J. Inf. Process.
Akihiro Fujii, Shigeo Kaneko, Teruo Tanaka, Takeshi Iwashita
2018 — conf
Algebraic Multigrid Solver Using Coarse Grid Aggregation with Independent Aggregation.
IPDPS Workshops
Naoya Nomura, Akihiro Fujii, Teruo Tanaka, Osni Marques, Kengo Nakajima
2017 — conf
D-Spline Performance Tuning Method Flexibly Responsive to Execution Time Perturbation.
PPAM (1)
Guning Fan, Masayoshi Mochizuki, Akihiro Fujii, Teruo Tanaka, Takahiro Katagiri
2017 — conf
Fast Multidimensional Performance Parameter Estimation with Multiple One-Dimensional d-Spline Parameter Search.
IPDPS Workshops
Masayoshi Mochizuki, Akihiro Fujii, Teruo Tanaka
2016 — conf
Performance Analysis of SA-AMG Method by Setting Extracted Near-Kernel Vectors.
VECPAR
Naoya Nomura, Akihiro Fujii, Teruo Tanaka, Kengo Nakajima, Osni Marques
2016 — conf
SIMD Parallel Sparse Matrix-Vector and Transposed-Matrix-Vector Multiplication in DD Precision.
VECPAR
Toshiaki Hishinuma, Hidehiko Hasegawa, Teruo Tanaka
2016 — conf
Xev-GMP: Automatic Code Generation for GMP Multiple-Precision Code from C Code.
CSE/EUC/DCABES
Toshiaki Hishinuma, Takuma Sakakibara, Akihiro Fujii, Teruo Tanaka, Shoichi Hirasawa
2015 — conf
Enhancement of Incremental Performance Parameter Estimation on ppOpen-AT.
MCSoC
Riku Murata, Jun Irie, Akihiro Fujii, Teruo Tanaka, Takahiro Katagiri
2015 — conf
Performance Analysis of the Chebyshev Basis Conjugate Gradient Method on the K Computer.
PPAM (1)
Yosuke Kumagai, Akihiro Fujii, Teruo Tanaka, Yusuke Hirota, Takeshi Fukaya, Toshiyuki Imamura, Reiji Suda
2014 J jnl
Implementation of d-Spline-based incremental performance parameter estimation method with ppOpen-AT.
Sci. Program.
Teruo Tanaka, Ryo Otsuka, Akihiro Fujii, Takahiro Katagiri, Toshiyuki Imamura
2014 — conf
Mixed-Precision AMG method for Many Core Accelerators.
EuroMPI/ASIA
Yuki Sumiyoshi, Akihiro Fujii, Akira Nukada, Teruo Tanaka
2013 — conf
AVX Acceleration of DD Arithmetic Between a Sparse Matrix and Vector.
PPAM (1)
Toshiaki Hishinuma, Akihiro Fujii, Teruo Tanaka, Hidehiko Hasegawa
1998 — conf
Dynamic Gateways: A Novel Approach to Improve Networking Performance and Availability on Parallel Servers.
HPCN Europe
Frederico B. Maciel, Nobutoshi Sagawa, Teruo Tanaka
1997 — conf
Deadlock-Free Fault-tolerant Routing in the Multi-dimensional Crossbar Network and Its Implementation for the Hitachi SR2201.
IPPS
Yoshiko Yasuda, Hiroaki Fujii, Hideya Akashi, Yasuhiro Inagami, Teruo Tanaka, Junji Nakagoshi, Hideo Wada, Tsutomu Sumimoto
1994 — conf
An interprocessor memory access arbitrating scheme for the S-3800 vector supercomputer.
ISPAN
Tadayuki Sakakibara, Katsuyoshi Kitai, Tadaaki Isobe, Shigeko Yazawa, Teruo Tanaka, Yoshiko Tamaki, Yasuhiro Inagami
1994 A conf
Distributed storage control unit for the Hitachi S-3800 multivector supercomputer.
International Conference on Supercomputing
Katsuyoshi Kitai, Tadaaki Isobe, Tadayuki Sakakibara, Shigeko Yazawa, Yoshiko Tamaki, Teruo Tanaka, Kouichi Ishii
1993 A conf
Parallel Processing Architecture for the Hitachi S-3800 Shared-Memory Vector Multiprocessor.
International Conference on Supercomputing
Katsuyoshi Kitai, Tadaaki Isobe, Yoshikazu Tanaka, Yoshiko Tamaki, Masakazu Fukagawa, Teruo Tanaka, Yasuhiro Inagami
1993 A conf
Scalable Parallel Memory Architecture with a Skew Scheme.
International Conference on Supercomputing
Tadayuki Sakakibara, Katsuyoshi Kitai, Tadaaki Isobe, Shigeko Yazawa, Teruo Tanaka, Yasuhiro Inagami, Yoshiko Tamaki
1992 — conf
Reducing Network Hardware Quantity by Employing Multi-Processor Cluster Structure in Distributed Memory Parallel Processors.
CONPAR
Naoki Hamanaka, Junji Nakagoshi, Teruo Tanaka