Taras Iakymchuk

14 papers C 4Journal 6Unranked 4
YearRankTypeTitle / Venue / Authors
2019 J jnl
A Novel Systolic Parallel Hardware Architecture for the FPGA Acceleration of Feedforward Neural Networks.
IEEE Access
Leandro D. Medus, Taras Iakymchuk, José Vicente Francés-Víllora, Manuel Bataller-Mompeán, Alfredo Rosado Muñoz
2017 J jnl
An Event-based Fast Movement Detection Algorithm for a Positioning Robot Using POWERLINK Communication.
CoRR
Juan Barrios-Aviles, Taras Iakymchuk, Jorge Samaniego, Alfredo Rosado Muñoz
2017 C conf
Live demonstration: Multiplexing AER asynchronous channels over LVDS links with flow-control and clock-correction for scalable neuromorphic systems.
ISCAS
Amirreza Yousefzadeh, Miroslaw Jablonski, Taras Iakymchuk, Alejandro Linares-Barranco, Alfredo Rosado Muñoz, Luis A. Plana, Teresa Serrano-Gotarredona, Steve B. Furber, Bernabé Linares-Barranco
2017 C conf
Multiplexing AER asynchronous channels over LVDS links with flow-control and clock-correction for scalable neuromorphic systems.
ISCAS
Amirreza Yousefzadeh, Miroslaw Jablonski, Taras Iakymchuk, Alejandro Linares-Barranco, Alfredo Rosado Muñoz, Luis A. Plana, Teresa Serrano-Gotarredona, Stephen B. Furber, Bernabé Linares-Barranco
2017 J jnl
On Multiple AER Handshaking Channels Over High-Speed Bit-Serial Bidirectional LVDS Links With Flow-Control and Clock-Correction on Commercial FPGAs for Scalable Neuromorphic Systems.
IEEE Trans. Biomed. Circuits Syst.
Amirreza Yousefzadeh, Miroslaw Jablonski, Taras Iakymchuk, Alejandro Linares-Barranco, Alfredo Rosado, Luis A. Plana, Steve Temple, Teresa Serrano-Gotarredona, Steve B. Furber, Bernabé Linares-Barranco
2016 C conf
Event-based encoding from digital magnetic compass and ultrasonic distance sensor for navigation in mobile systems.
INDIN
Juan Barrios-Aviles, Taras Iakymchuk, Alfredo Rosado Muñoz, José V. Francés-Víllora, Manuel Bataller-Mompeán, Juan Guerrero-Martínez
2016 J jnl
Novel Resistance Measurement Method: Analysis of Accuracy and Thermal Dependence with Applications in Fiber Materials.
Sensors
Silvia Casans Berga, Alfredo Rosado Muñoz, Taras Iakymchuk
2016 J jnl
Versatile Direct and Transpose Matrix Multiplication with Chained Operations: An Optimized Architecture Using Circulant Matrices.
IEEE Trans. Computers
Taras Iakymchuk, Alfredo Rosado Muñoz, Manuel Bataller-Mompeán, José Vicente Francés-Víllora, Emmanuel Ovie Osimiry
2015 J jnl
Simplified spiking neural network architecture and STDP learning algorithm applied to image classification.
EURASIP J. Image Video Process.
Taras Iakymchuk, Alfredo Rosado Muñoz, Juan Guerrero-Martínez, Manuel Bataller-Mompeán, José V. Francés-Víllora
2014 C conf
An AER handshake-less modular infrastructure PCB with x8 2.5Gbps LVDS serial links.
ISCAS
Taras Iakymchuk, Alfredo Rosado, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco, Angel Jiménez-Fernandez, Alejandro Linares-Barranco, Gabriel Jiménez-Moreno
2012 — conf
Fast spiking neural network architecture for low-cost FPGA devices.
ReCoSoC
Taras Iakymchuk, Alfredo Rosado, José V. Francés, Manuel Bataller
2012 — conf
Hardware-efficient matrix inversion algorithm for complex adaptive systems.
ICECS
Alfredo Rosado, Taras Iakymchuk, Manuel Bataller, Marek Wegrzyn
2012 — conf
Implementation of a new adaptive algorithm using fuzzy cost function and robust to impulsive noise.
ICECS
Taras Iakymchuk, Alfredo Rosado, Emilio Soria-Olivas, Manuel Bataller
2011 — conf
Temperature-based covert channel in FPGA systems.
ReCoSoC
Taras Iakymchuk, Maciej Nikodem, Krzysztof Kepa