Tao Zhang

33 papers A* 11A 2C 2Misc 2Journal 8Unranked 8
YearRankTypeTitle / Venue / Authors
2026 J jnl
LUMINA: LLM-Guided GPU Architecture Exploration via Bottleneck Analysis.
CoRR
Tao Zhang, Rui Ma, Shuotao Xu, Yongqiang Xiong, Peng Cheng
2025 J jnl
FengHuang: Next-Generation Memory Orchestration for AI Inferencing.
CoRR
Jiamin Li, Lei Qu, Tao Zhang, Grigory Chirkov, Shuotao Xu, Peng Cheng, Lidong Zhou
2024 A* conf
NeoMem: Hardware/Software Co-Design for CXL-Native Memory Tiering.
MICRO
Zhe Zhou, Yiqi Chen, Tao Zhang, Yang Wang, Ran Shu, Shuotao Xu, Peng Cheng, Lei Qu, Yongqiang Xiong, Jie Zhang, Guangyu Sun
2024 J jnl
Toward CXL-Native Memory Tiering via Device-Side Profiling.
CoRR
Zhe Zhou, Yiqi Chen, Tao Zhang, Yang Wang, Ran Shu, Shuotao Xu, Peng Cheng, Lei Qu, Yongqiang Xiong, Guangyu Sun
2023 A* conf
HBP: Hierarchically Balanced Pruning and Accelerator Co-Design for Efficient DNN Inference.
DAC
Ao Ren, Yuhao Wang, Tao Zhang, Jiaxing Shi, Duo Liu, Xianzhang Chen, Yujuan Tan, Yuan Xie
2023 — conf
Polaris: Enhancing CXL-based Memory Expanders with Memory-side Prefetching.
APPT
Zhe Zhou, Shuotao Xu, Yiqi Chen, Tao Zhang, Ran Shu, Lei Qu, Peng Cheng, Yongqiang Xiong, Guangyu Sun
2022 J jnl
Flatfish: A Reinforcement Learning Approach for Application-Aware Address Mapping.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xingchen Li, Zhihang Yuan, Yijin Guan, Guangyu Sun, Tao Zhang, Rongshan Wei, Dimin Niu
2020 A* conf
DARB: A Density-Adaptive Regular-Block Pruning for Deep Neural Networks.
AAAI
Ao Ren, Tao Zhang, Yuhao Wang, Sheng Lin, Peiyan Dong, Yen-Kuang Chen, Yuan Xie, Yanzhi Wang
2019 J jnl
DARB: A Density-Aware Regular-Block Pruning for Deep Neural Networks.
CoRR
Ao Ren, Tao Zhang, Yuhao Wang, Sheng Lin, Peiyan Dong, Yen-Kuang Chen, Yuan Xie, Yanzhi Wang
2019 J jnl
RC-NVM: Dual-Addressing Non-Volatile Memory Architecture Supporting Both Row and Column Memory Accesses.
IEEE Trans. Computers
Shuo Li, Nong Xiao, Peng Wang, Guangyu Sun, Xiaoyang Wang, Yiran Chen, Hai Helen Li, Jason Cong, Tao Zhang
2019 A* conf
Sparse Tensor Core: Algorithm and Hardware Co-Design for Vector-wise Sparse Neural Networks on Modern GPUs.
MICRO
Maohua Zhu, Tao Zhang, Zhenyu Gu, Yuan Xie
2018 A* conf
RC-NVM: Enabling Symmetric Row and Column Memory Accesses for In-memory Databases.
HPCA
Peng Wang, Shuo Li, Guangyu Sun, Xiaoyang Wang, Yiran Chen, Hai Li, Jason Cong, Nong Xiao, Tao Zhang
2016 J jnl
BACH: A Bandwidth-Aware Hybrid Cache Hierarchy Design with Nonvolatile Memories.
J. Comput. Sci. Technol.
Jishen Zhao, Cong Xu, Tao Zhang, Yuan Xie
2016 C conf
Building a Low Latency, Highly Associative DRAM Cache with the Buffered Way Predictor.
SBAC-PAD
Zhe Wang, Daniel A. Jiménez, Tao Zhang, Gabriel H. Loh, Yuan Xie
2016 A* conf
Fine-granularity tile-level parallelism in non-volatile memory architecture with two-dimensional bank subdivision.
DAC
Matthew Poremba, Tao Zhang, Yuan Xie
2016 A* conf
PRIME: A Novel Processing-in-Memory Architecture for Neural Network Computation in ReRAM-Based Main Memory.
ISCA
Ping Chi, Shuangchen Li, Cong Xu, Tao Zhang, Jishen Zhao, Yongpan Liu, Yu Wang, Yuan Xie
2015 J jnl
NVMain 2.0: A User-Friendly Memory Simulator to Model (Non-)Volatile Memory Systems.
IEEE Comput. Archit. Lett.
Matthew Poremba, Tao Zhang, Yuan Xie
2015 A* conf
Overcoming the challenges of crossbar resistive memory architectures.
HPCA
Cong Xu, Dimin Niu, Naveen Muralimanohar, Rajeev Balasubramonian, Tao Zhang, Shimeng Yu, Yuan Xie
2014 — conf
3D-SWIFT: a high-performance 3D-stacked wide IO DRAM.
ACM Great Lakes Symposium on VLSI
Tao Zhang, Cong Xu, Ke Chen, Guangyu Sun, Yuan Xie
2014 A* conf
CREAM: A Concurrent-Refresh-Aware DRAM Memory architecture.
HPCA
Tao Zhang, Matthew Poremba, Cong Xu, Guangyu Sun, Yuan Xie
2014 A* conf
Half-DRAM: A high-bandwidth and low-power DRAM architecture from the rethinking of fine-grained activation.
ISCA
Tao Zhang, Ke Chen, Cong Xu, Guangyu Sun, Tao Wang, Yuan Xie
2014 — conf
TSV power supply array electromigration lifetime analysis in 3D ICS.
ACM Great Lakes Symposium on VLSI
Qiaosha Zou, Tao Zhang, Cong Xu, Yuan Xie
2014 A conf
Using multi-level cell STT-RAM for fast and energy-efficient local checkpointing.
ICCAD
Ping Chi, Cong Xu, Tao Zhang, Xiangyu Dong, Yuan Xie
2013 Misc conf
An efficient run-time encryption scheme for non-volatile main memory.
CASES
Xian Zhang, Chao Zhang, Guangyu Sun, Jia Di, Tao Zhang
2013 C conf
Lazy Precharge: An overhead-free method to reduce precharge overhead for memory parallelism improvement of DRAM system.
ICCD
Tao Zhang, Cong Xu, Yuan Xie, Guangyu Sun
2013 A conf
Thermomechanical stress-aware management for 3D IC designs.
DATE
Qiaosha Zou, Tao Zhang, Eren Kursun, Yuan Xie
2011 A* conf
MorphCache: A Reconfigurable Adaptive Multi-level Cache hierarchy.
HPCA
Shekhar Srikantaiah, Emre Kultursay, Tao Zhang, Mahmut T. Kandemir, Mary Jane Irwin, Yuan Xie
2011 — conf
Using NEM relay to improve 3DIC cost efficiency.
3DIC
Tao Zhang, Guangyu Sun
2010 — conf
A 3D SoC design for H.264 application with on-chip DRAM stacking.
3DIC
Tao Zhang, Kui Wang, Yi Feng, Yan Chen, Qun Li, Bing Shao, Jing Xie, Xiaodi Song, Lian Duan, Yuan Xie, Xu Cheng, Youn-Long Lin
2010 — conf
A customized design of DRAM controller for on-chip 3D DRAM stacking.
CICC
Tao Zhang, Kui Wang, Yi Feng, Xiaodi Song, Lian Duan, Yuan Xie, Xu Cheng, Youn-Long Lin
2009 — conf
Arithmetic unit design using 180nm TSV-based 3D stacking technology.
3DIC
Jin Ouyang, Guangyu Sun, Yibo Chen, Lian Duan, Tao Zhang, Yuan Xie, Mary Jane Irwin
2009 Misc conf
CheckerCore: enhancing an FPGA soft core to capture worst-case execution times.
CASES
Jin Ouyang, Raghuveer Raghavendra, Sibin Mohan, Tao Zhang, Yuan Xie, Frank Mueller
2009 — conf
Investigation and comparison of thermal distribution in synchronous and asynchronous 3D ICs.
3DIC
Brent Hollosi, Tao Zhang, Ravi Sankar Parameswaran Nair, Yuan Xie, Jia Di, Scott C. Smith