Takeshi Matsumoto

47 papers A 5B 1C 7Misc 1Journal 13Unranked 20

Year	Rank	Type	Title / Venue / Authors
2024	A	`conf`	Covariate Ordered Systematic Sampling as an Improvement to Randomized Controlled Trials. CIKM Deddy Jobson, Yilin Li, Naoki Nishimura, Koya Ohashi, Jie Yang, Takeshi Matsumoto
2024	—	`conf`	Fast Solution to the Fair Ranking Problem Using the Sinkhorn Algorithm. PRICAI (5) Yuki Uehara, Shunnosuke Ikeda, Naoki Nishimura, Koya Ohashi, Yilin Li, Jie Yang, Deddy Jobson, Xingxia Zha, Takeshi Matsumoto, Noriyoshi Sukegawa, Yuichi Takano
2024	J	`jnl`	Fast solution to the fair ranking problem using the Sinkhorn algorithm. CoRR Yuki Uehara, Shunnosuke Ikeda, Naoki Nishimura, Koya Ohashi, Yilin Li, Jie Yang, Deddy Jobson, Xingxia Zha, Takeshi Matsumoto, Noriyoshi Sukegawa, Yuichi Takano
2024	J	`jnl`	Robust portfolio optimization model for electronic coupon allocation. CoRR Yuki Uehara, Naoki Nishimura, Yilin Li, Jie Yang, Deddy Jobson, Koya Ohashi, Takeshi Matsumoto, Noriyoshi Sukegawa, Yuichi Takano
2024	J	`jnl`	Robust portfolio optimization model for electronic coupon allocation. INFOR Inf. Syst. Oper. Res. Yuki Uehara, Naoki Nishimura, Yilin Li, Jie Yang, Deddy Jobson, Koya Ohashi, Takeshi Matsumoto, Noriyoshi Sukegawa, Yuichi Takano
2019	C	`conf`	High-Level Engineering Change Through Programmable Datapath and SMT Solvers. ISCAS Qinhao Wang, Amir Masoud Gharehbaghi, Takeshi Matsumoto, Masahiro Fujita
2018	—	`conf`	In-line Optical Amplification for Silicon Photonics Platform by Flip-Chip Bonded InP-SOAs. OFC Takeshi Matsumoto, Teruo Kurahashi, Ryotaro Konoike, Ken Tanizawa, Keijiro Suzuki, Ayahito Uetake, Kazumasa Takabayashi, Kazuhiro Ikeda, Hitoshi Kawashima, Suguru Akiyama, Shigeaki Sekiguchi
2018	—	`conf`	Lossless Operation of SOA-Integrated Silicon Photonics Switch for 8 × 32-Gbaud 16-QAM WDM Signals. OFC Ryotaro Konoike, Keijiro Suzuki, Takashi Inoue, Takeshi Matsumoto, Teruo Kurahashi, Ayahito Uetake, Kazumasa Takabayashi, Suguru Akiyama, Shigeaki Sekiguchi, Kazuhiro Ikeda, Shu Namiki, Hitoshi Kawashima
2017	J	`jnl`	Effect of low-intensity whole-body vibration on bone defect repair and associated vascularization in mice. Medical Biol. Eng. Comput. Takeshi Matsumoto, Daichi Goto
2017	J	`jnl`	Experimental Study of Ankle Joint Pushing Mechanism Concerning About the Horizontal Movement of Talus. J. Robotics Mechatronics Hideki Toda, Takeshi Matsumoto, Takeuchi Hiroya
2017	—	`conf`	Motion recognition by natural language including success and failure of tasks for co-working robot with human. AIM Yuichi Kobayashi, Takeshi Matsumoto, Wataru Takano, Dirk Wollherr, Volker Gabler
2017	J	`jnl`	Pulmonary kinematic analysis with non-rigid deformable registration for detecting localised emphysema. Comput. methods Biomech. Biomed. Eng. Imaging Vis. Ryosuke Higashi, Toshihiro Sera, Hisashi Naito, Takeshi Matsumoto, Masao Tanaka
2016	—	`conf`	In-line optical amplification for Si waveguides on 1×8 splitter and selector by flip-chip bonded InP-SOAs. OFC Takeshi Matsumoto, Teruo Kurahashi, Ken Tanizawa, Keijiro Suzuki, Ayahito Uetake, Kazumasa Takabayashi, Kazuhiro Ikeda, Hitoshi Kawashima, Suguru Akiyama
2015	—	`conf`	Proposal of an ankle joint bending machine using exoskeleton support from foot to hip. ROBIO Takeuchi Hiroya, Hideki Toda, Takeshi Matsumoto
2015	C	`conf`	Trace signal selection methods for post silicon debugging. VLSI-SoC Shridhar Choudhary, Amir Masoud Gharehbaghi, Takeshi Matsumoto, Masahiro Fujita
2014	—	`conf`	Flip-chip-bonded, 8-wavelength AlGaInAs DFB laser array operable up to 70°C for silicon WDM interconnects. ECOC S. Tanaka, Takeshi Matsumoto, Teruo Kurahashi, M. Matsuda, Ayahito Uetake, S. Sekiguchi, Y. Tanaka, K. Morito
2014	J	`jnl`	SAT-based Automatic Rectification and Debugging of Combinational Circuits with LUT Insertions. IPSJ Trans. Syst. LSI Des. Methodol. Satoshi Jo, Takeshi Matsumoto, Masahiro Fujita
2013	C	`conf`	A debugging method for gate level circuit designs by introducing programmability. VLSI-SoC Kosuke Oshima, Takeshi Matsumoto, Masahiro Fujita
2013	—	`conf`	Debugging Methods Through Identification of Appropriate Functions for Internal Gates. VLSI-SoC (Selected Papers) Kosuke Oshima, Takeshi Matsumoto, Masahiro Fujita
2013	—	`conf`	Debugging processors with advanced features by reprogramming LUTs on FPGA. FPT Satoshi Jo, Amir Masoud Gharehbaghi, Takeshi Matsumoto, Masahiro Fujita
2013	C	`conf`	FOF: Functionally Observable Fault and its ATPG techniques. VLSI-SoC Masahiro Fujita, Takeshi Matsumoto, Satoshi Jo
2013	—	`conf`	Fast simulation of Digital Spiking Silicon Neuron model employing reconfigurable dataflow computing. FPT Will X. Y. Li, Shridhar Chaudhary, Ray C. C. Cheung, Takeshi Matsumoto, Masahiro Fujita
2013	A	`conf`	Hardware implementation of BLTL property checkers for acceleration of statistical model checking. ICCAD Kosuke Oshima, Takeshi Matsumoto, Masahiro Fujita
2013	A	`conf`	Partial synthesis through sampling with and without specification. ICCAD Masahiro Fujita, Satoshi Jo, Shohei Ono, Takeshi Matsumoto
2013	A	`conf`	Rectification of advanced microprocessors without changing routing on FPGAs (abstract only). FPGA Satoshi Jo, Amir Masoud Gharehbaghi, Takeshi Matsumoto, Masahiro Fujita
2012	C	`conf`	An efficient method to localize and correct bugs in high-level designs using counterexamples and potential dependence. VLSI-SoC Takeshi Matsumoto, Shohei Ono, Masahiro Fujita
2012	C	`conf`	Automatic assertion extraction in gate-level simulation using GPGPUs. ICCD Shohei Ono, Takeshi Matsumoto, Masahiro Fujita
2012	—	`conf`	SAT-Based Automatic Rectification and Debugging of Combinational Circuits with LUT Insertions. Asian Test Symposium Satoshi Jo, Takeshi Matsumoto, Masahiro Fujita
2011	J	`jnl`	An Automatic Method of Mapping I/O Sequences of Chip Execution onto High-level Design for Post-Silicon Debugging. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Yeonbok Lee, Takeshi Matsumoto, Masahiro Fujita
2011	J	`jnl`	Multi-Level Bounded Model Checking with Symbolic Counterexamples. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Tasuku Nishihara, Takeshi Matsumoto, Masahiro Fujita
2011	—	`conf`	On-chip dynamic signal sequence slicing for efficient post-silicon debugging. ASP-DAC Yeonbok Lee, Takeshi Matsumoto, Masahiro Fujita
2010	C	`conf`	Generation of I/O sequences for a high-level design from those in post-silicon for efficient post-silicon debugging. ICCD Yeonbok Lee, Takeshi Matsumoto, Masahiro Fujita
2010	B	`conf`	Hybrid world object tracking for a virtual teaching agent. IJCNN William Newman, David Franzel, Takeshi Matsumoto, Richard Leibbrandt, Trent W. Lewis, Martin H. Luerssen, David M. W. Powers
2010	J	`jnl`	Performance Estimation with Automatic False-Path Detection for System-Level Designs. IPSJ Trans. Syst. LSI Des. Methodol. Takeshi Matsumoto, Tasuku Nishihara, Masahiro Fujita
2010	—	`conf`	Synthesis and formal verification of on-chip protocol transducers through decomposed specification. ISQED Masahiro Fujita, Hideo Tanida, Fei Gao, Tasuku Nishihara, Takeshi Matsumoto
2009	—	`conf`	A Post-Silicon Debug Support Using High-Level Design Description. Asian Test Symposium Yeonbok Lee, Tasuku Nishihara, Takeshi Matsumoto, Masahiro Fujita
2009	J	`jnl`	Word-Level Equivalence Checking in Bit-Level Accuracy by Synthesizing Designs onto Identical Datapath. IEICE Trans. Inf. Syst. Tasuku Nishihara, Takeshi Matsumoto, Masahiro Fujita
2008	—	`conf`	A HW/SW Co-Reuse Methodology Based on Design Refinement Templates in UML Diagrams. ICSOFT (SE/MUSE/GSDCA) Masahiro Fujita, Takeshi Matsumoto, Hiroaki Yoshida
2008	—	`conf`	An Interactive Verification and Debugging Environment by Concrete/Symbolic Simulations for System-Level Designs. ATS Yoshihisa Kojima, Tasuku Nishihara, Takeshi Matsumoto, Masahiro Fujita
2008	—	`conf`	Multi-level Bounded Model Checking to detect bugs beyond the bound. HLDVT Tasuku Nishihara, Takeshi Matsumoto, Masahiro Fujita
2007	—	`conf`	Development and Verification of a Collaborative Printing Environment. C5 Takeshi Matsumoto, Daisuke Ando, Tasuku Nishihara, Masahiro Fujita
2006	A	`conf`	Adaptive Human-Robot Interaction System using Interactive EC. IROS Yuki Suga, Chihiro Endo, Daizo Kobayashi, Takeshi Matsumoto, Shigeki Sugano, Tetsuya Ogata
2006	—	`conf`	Equivalence Checking of C Programs by Locally Performing Symbolic Simulation on Dependence Graphs. ISQED Takeshi Matsumoto, Hiroshi Saito, Masahiro Fujita
2006	—	`conf`	Equivalence Checking with Rule-Based Equivalence Propagation and High-Level Synthesis. HLDVT Tasuku Nishihara, Takeshi Matsumoto, Masahiro Fujita
2006	J	`jnl`	Lattice Boltzmann simulation of blood cell behavior at microvascular bifurcations. Math. Comput. Simul. Toru Hyakutake, Takeshi Matsumoto, Shinichiro Yanase
2005	J	`jnl`	An Equivalence Checking Method for C Descriptions Based on Symbolic Simulation with Textual Differences. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Takeshi Matsumoto, Hiroshi Saito, Masahiro Fujita
2003	Misc	`conf`	Application of search algorithms to natural language processing. ALTA Takeshi Matsumoto, David M. W. Powers, Geoff A. Jarrad