Takeomi Tamesada

30 papers A 2C 2Journal 7Unranked 19

Year	Rank	Type	Title / Venue / Authors
2006	—	`conf`	Current Testable Design of Resistor String DACs. DELTA Masaki Hashizume, Tomomi Nishida, Hiroyuki Yotsuyanagi, Takeomi Tamesada, Yukiya Miura
2005	—	`conf`	Electric field for detecting open leads in CMOS logic circuits by supply current testing. ISCAS (3) Masaki Hashizume, Masahiro Ichimiya, Hiroyuki Yotsuyanagi, Takeomi Tamesada
2004	—	`conf`	A Power Supply Circuit Recycling Charge in Adiabatic Dynamic CMOS Logic Circuits. DELTA Daisuke Ezaki, Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada
2004	J	`jnl`	A test circuit for pin shorts generating oscillation in CMOS logic circuits. Syst. Comput. Jpn. Masahiro Ichimiya, Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada
2004	—	`conf`	CMOS Open Fault Detection by Appearance Time of Switching Supply Current. DELTA Masaki Hashizume, Tetsuo Akita, Hiroyuki Yotsuyanagi, Takeomi Tamesada
2004	—	`conf`	I_DDQ Test Method Based on Wavelet Transformation for Noisy Current Measurement Environment. Asian Test Symposium Masaki Hashizume, Daisuke Yoneda, Hiroyuki Yotsuyanagi, Tetsuo Tada, Takeshi Koyama, Ikuro Morita, Takeomi Tamesada
2004	J	`jnl`	Identification and Frequency Estimation of Feedback Bridging Faults Generating Logical Oscillation in CMOS Circuits. IEICE Trans. Inf. Syst. Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada
2004	—	`conf`	Practical Fault Coverage of Supply Current Tests for Bipolar ICs. DELTA Isao Tsukimoto, Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada
2004	J	`jnl`	Test Sequence Generation for Test Time Reduction of IDDQ Testing. IEICE Trans. Inf. Syst. Hiroyuki Yotsuyanagi, Masaki Hashizume, Takeomi Tamesada
2003	—	`conf`	A BIST Circuit for IDDQ Tests. Asian Test Symposium Masaki Hashizume, Teppei Takeda, Hiroyuki Yotsuyanagi, Takeomi Tamesada, Yukiya Miura, Kozo Kinoshita
2002	—	`conf`	Power Supply Circuit for High Speed Operation of Adiabatic Dynamic CMOS Logic Circuits. DELTA Masaki Hashizume, Masashi Sato, Hiroyuki Yotsuyanagi, Takeomi Tamesada
2002	—	`conf`	Random Pattern Testability of the Open Defect Detection Method using Application of Time-variable Electric Field. DELTA Hiroyuki Yotsuyanagi, Masaki Hashizume, Taisuke Iwakiri, Masahiro Ichimiya, Takeomi Tamesada
2002	—	`conf`	Test Time Reduction for I DDQ Testing by Arranging Test Vectors. Asian Test Symposium Hiroyuki Yotsuyanagi, Masaki Hashizume, Takeomi Tamesada
2001	—	`conf`	CMOS Open Defect Detection Based on Supply Current in Time-Variable Electric Field and Supply Voltage Application. Asian Test Symposium Masaki Hashizume, Masahiro Ichimiya, Hiroyuki Yotsuyanagi, Takeomi Tamesada
2001	A	`conf`	CMOS open defect detection by supply current test. DATE Masaki Hashizume, Masahiro Ichimiya, Hiroyuki Yotsuyanagi, Takeomi Tamesada
2001	—	`conf`	Sequential Redundancy Removal Using Test Generation and Multiple Unreachable States. Asian Test Symposium Hiroyuki Yotsuyanagi, Shinsuke Hata, Masaki Hashizume, Takeomi Tamesada
2001	—	`conf`	Test Pattern for Supply Current Test of Open Defects by Applying Time-Variable Electric Field. DFT Hiroyuki Yotsuyanagi, Masaki Hashizume, Taisuke Iwakiri, Masahiro Ichimiya, Takeomi Tamesada
2000	—	`conf`	High speed IDDQ test and its testability for process variation. Asian Test Symposium Masaki Hashizume, Hiroyuki Yotsuyanagi, Masahiro Ichimiya, Takeomi Tamesada, Masashi Takeda
2000	—	`conf`	Testability Analysis of IDDQ Testing with Large Threshold Value. DFT Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada, Masashi Takeda
1999	—	`conf`	Identification of Feedback Bridging Faults with Oscillation. Asian Test Symposium Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada
1998	—	`conf`	A High-Speed IDDQ Sensor for Low-Voltage ICs. Asian Test Symposium Masaki Hashizume, Yukiya Miura, Masahiro Ichimiya, Takeomi Tamesada, Kozo Kinoshita
1997	—	`conf`	Supply Current Test for Unit-to-unit Variations of Electrical Characteristics in Gates. Asian Test Symposium Masaki Hashizume, Toshimasa Kuchii, Takeomi Tamesada
1996	—	`conf`	Algorithmic Test Generation for Supply Current Testing of TTL Combinational Circuits. Asian Test Symposium Toshimasa Kuchii, Masaki Hashizume, Takeomi Tamesada
1994	C	`conf`	A Maximum Clique Derivation Algorithm for Simplification of Incompletely Specified Machines. ISCAS Masaki Hashizume, Takeomi Tamesada, Akio Sakamoto
1990	C	`conf`	A parameter adjustment method for analog circuits based on convex fuzzy decision using constraints of satisfactory level. ICCD Masaki Hashizume, Takeomi Tamesada, Koji Nii
1989	J	`jnl`	Evaluation of a retrieval system using content addressable memory. Syst. Comput. Jpn. Masaki Hashizume, Hirosuke Yamamoto, Takeomi Tamesada, Toshiaki Hanibuti
1989	J	`jnl`	High-speed multioperand addition and subtraction using a p-ary representation with necessary and minimum redundancy. Syst. Comput. Jpn. Takeomi Tamesada
1988	A	`conf`	Fault Detection of Combinational Circuits Based on Supply Current. ITC Masaki Hashizume, Takeomi Tamesada, Kazuhiro Yamada, Masaaki Kawakami
1988	J	`jnl`	High-speed addition and subtraction using a minimum redundant p-ary representation. Syst. Comput. Jpn. Takeomi Tamesada
1980	J	`jnl`	Sequential Machines Having Quasi-Stable States. IEEE Trans. Computers Takeomi Tamesada