Takefumi Miyoshi

41 papers B 3C 3Misc 12Journal 11Unranked 12

Year	Rank	Type	Title / Venue / Authors
2026	C	`conf`	Evaluation of FPGA Resource Requirements for a Scalable Heterogeneous Quantum Control System. ICCE Takefumi Miyoshi, Keisuke Koike, Shinichi Morisaka, Yuuya Sugita, Toshi Sumida, Makoto Negoro, Hidehisa Shiomi, Ryutaro Ohira
2025	—	`conf`	A Novel Data Representation Towards Efficient FPGA-based Quantum Computer Simulation. ISMVL Haruhiko Hasegawa, Masayuki Shimoda, Hiroki Nakahara, Takefumi Miyoshi
2025	J	`jnl`	Preliminary evaluation of SHAVER: sharing vector registers with an accelerator. J. Supercomput. Tomoaki Tanaka, Michiya Kato, Yasunori Osana, Takefumi Miyoshi, Jubee Tada, Kiyofumi Tanaka, Hironori Nakajo
2025	J	`jnl`	Qu-Trefoil: Large-Scale Quantum Circuit Simulator Working on FPGA With SATA Storages. IEEE Trans. Computers Kaijie Wei, Hideharu Amano, Ryohei Niwase, Yoshiki Yamaguchi, Takefumi Miyoshi
2025	J	`jnl`	Simulation environment for reconfigurable virtual accelerators using a field programmable gate array development environment. J. Supercomput. Shunya Kawai, Eriko Maeda, Kazuki Yaguchi, Yasunori Osana, Takefumi Miyoshi, Hironori Nakajo
2025	C	`conf`	Toward Scalable Heterogeneous Controller System for Various Quantum Computer by Using Multiple FPGAs. ICCE Takefumi Miyoshi, Keisuke Koike, Shinichi Morisaka, Yuuya Sugita, Toshi Sumida, Yutaka Tabuchi, Makoto Negoro, Hidehisa Shiomi, Ippei Nakamura, Takafumi Tomita, Sylvain De Léséleuc, Atsushi Noguchi, Ryutaro Ohira
2024	Misc	`conf`	A Microwave-Based QCCD Trapped-Ion Quantum Computer with Scalable Control System. QCE Takefumi Miyoshi, Keisuke Koike, Shinichi Morisaka, Toshi Sumida, Makoto Negoro, Atsushi Noguchi, Ryutaro Ohira
2024	Misc	`conf`	A Power Reduction Scheme by Arithmetic Format Conversion for a DSP to Estimate Qubit States Under 4K Cryogenic Environment. QCE Takashi Imagawa, Ryo Kishida, Yuki Koyama, Kazutoshi Kobayashi, Takefumi Miyoshi
2024	—	`conf`	A Table Look-Up Based Quantum Simulation Accelerator on an FPGA. ICFPT Haruhiko Hasegawa, Masayuki Shimoda, Hiroki Nakahara, Takefumi Miyoshi
2024	Misc	`conf`	Square-Wave Defined Pulse Generator for High Fidelity Gate Operation of Superconducting Qubits. QCE Ryosuke Matsuo, Kazuhisa Ogawa, Hidehisa Shiorni, Makoto Negoro, Ryutaro Ohira, Takefumi Miyoshi, Michihiro Shintani, Hiromitsu Awano, Takashi Sato, Jun Shiomi
2023	Misc	`conf`	A Fully Pipelined Architecture of Quantum-Classical Interface for Realizing Fault-Tolerant Quantum Computer. QCE Takefumi Miyoshi, Keisuke Koike, Shinichi Morisaka, Hidehisa Shiomi, Ryo Matsuda, Kazuhisa Ogawa, Yutaka Tabuchi, Makoto Negoro
2023	—	`conf`	A state vector quantum simulator working on FPGAs with extensible SATA storage. ICFPT Kaijie Wei, Ryohei Niwase, Hideharu Amano, Yoshiki Yamaguchi, Takefumi Miyoshi
2023	—	`conf`	Enormous-Scale Quantum State Vector Calculation with FPGA-accelerated SATA storages. ICFPT Ryohei Niwase, Hikaru Harasawa, Yoshiki Yamaguchi, Kaijie Wei, Hideharu Amano, Takefumi Miyoshi
2022	B	`conf`	FPL Demo: A Flexible and Scalable Quantum-Classical Interface based on FPGAs. FPL Takefumi Miyoshi, Keisuke Koike, Shinichi Morisaka, Hidehisa Shiomi, Kazuhisa Ogawa, Yutaka Tabuchi, Makoto Negoro
2017	—	`conf`	Hardware Acceleration with Multi-Threading of Java-Based High Level Synthesis Tool. HEART Yuto Ishikawa, Keitaro Yanai, Keisuke Koike, Takefumi Miyoshi, Hironori Nakajo
2015	J	`jnl`	Design and Evaluation of a Configurable Query Processing Hardware for Data Streams. IEICE Trans. Inf. Syst. Yasin Oge, Masato Yoshimi, Takefumi Miyoshi, Hideyuki Kawashima, Hidetsugu Irie, Tsutomu Yoshinaga
2015	—	`conf`	Hexa Cam: An FPGA-Based Multi-view Camera System. CPSNA Abraham Monrroy, Manato Hirabayashi, Shinpei Kato, Masato Edahiro, Takefumi Miyoshi, Satoshi Funada
2013	B	`conf`	A fast handshake join implementation on FPGA with adaptive merging network. SSDBM Yasin Oge, Takefumi Miyoshi, Hideyuki Kawashima, Tsutomu Yoshinaga
2013	—	`conf`	An Efficient and Scalable Implementation of Sliding-Window Aggregate Operator on FPGA. CANDAR Yasin Oge, Masato Yoshimi, Takefumi Miyoshi, Hideyuki Kawashima, Hidetsugu Irie, Tsutomu Yoshinaga
2012	J	`jnl`	Design and Implementation of a Handshake Join Architecture on FPGA. IEICE Trans. Inf. Syst. Yasin Oge, Takefumi Miyoshi, Hideyuki Kawashima, Tsutomu Yoshinaga
2012	—	`conf`	Design and Implementation of a Merging Network Architecture for Handshake Join Operator on FPGA. MCSoC Yasin Oge, Takefumi Miyoshi, Hideyuki Kawashima, Tsutomu Yoshinaga
2012	—	`conf`	FLAT: a GPU programming framework to provide embedded MPI. GPGPU@ASPLOS Takefumi Miyoshi, Hidetsugu Irie, Keigo Shima, Hiroki Honda, Masaaki Kondo, Tsutomu Yoshinaga
2012	—	`conf`	Throttling Control for Bufferless Routing in On-chip Networks. MCSoC Yicheng Guan, Cisse Ahmadou Dit Adi, Takefumi Miyoshi, Michihiro Koibuchi, Hidetsugu Irie, Tsutomu Yoshinaga
2012	J	`jnl`	Using Cacheline Reuse Characteristics for Prefetcher Throttling. IEICE Trans. Inf. Syst. Hidetsugu Irie, Takefumi Miyoshi, Goki Honjo, Kei Hiraki, Tsutomu Yoshinaga
2011	B	`conf`	A Coarse Grain Reconfigurable Processor Architecture for Stream Processing Engine. FPL Takefumi Miyoshi, Hideyuki Kawashima, Yuta Terada, Tsutomu Yoshinaga
2011	J	`jnl`	An Efficient Path Setup for a Hybrid Photonic Network-on-Chip. Int. J. Netw. Comput. Cisse Ahmadou Dit Adi, Hiroki Matsutani, Michihiro Koibuchi, Hidetsugu Irie, Takefumi Miyoshi, Tsutomu Yoshinaga
2011	Misc	`conf`	An Implementation of Handshake Join on FPGA. ICNC Yasin Oge, Takefumi Miyoshi, Hideyuki Kawashima, Tsutomu Yoshinaga
2011	Misc	`conf`	CCCPO: Robust Prefetcher Optimization Technique Based on Cache Convection. ICNC Hidetsugu Irie, Takefumi Miyoshi, Goki Honjo, Kei Hiraki, Tsutomu Yoshinaga
2011	J	`jnl`	Computation-Communication Overlap of Linpack on a GPU-Accelerated PC Cluster. IEICE Trans. Inf. Syst. Junichi Ohmura, Takefumi Miyoshi, Hidetsugu Irie, Tsutomu Yoshinaga
2011	Misc	`conf`	Multi-GPU Acceleration of Optical Flow Computation in Visual Functional Simulation. ICNC Junichi Ohmura, Akira Egashira, Shunji Satoh, Takefumi Miyoshi, Hidetsugu Irie, Tsutomu Yoshinaga
2010	Misc	`conf`	An Efficient Path Setup for a Photonic Network-on-Chip. ICNC Cisse Ahmadou Dit Adi, Hiroki Matsutani, Michihiro Koibuchi, Hidetsugu Irie, Takefumi Miyoshi, Tsutomu Yoshinaga
2010	Misc	`conf`	CODIE: Continuation-Based Overlapping Data-Transfers with Instruction Execution. ICNC Takefumi Miyoshi, Kenji Kise, Hidetsugu Irie, Tsutomu Yoshinaga
2010	—	`conf`	OREX - An Optical Ring with Electrical Crossbar Hybrid Photonic Network-on-Chip. IWIA Cisse Ahmadou Dit Adi, Ping Qiu, Hidetsugu Irie, Takefumi Miyoshi, Tsutomu Yoshinaga
2010	Misc	`conf`	Parallel Matrix-Matrix Multiplication Based on HPL with a GPU-Accelerated PC Cluster. ICNC Qin Wang, Junichi Ohmura, Axida Shan, Takefumi Miyoshi, Hidetsugu Irie, Tsutomu Yoshinaga
2010	Misc	`conf`	Pattern-Based Systematic Task Mapping for Many-Core Processors. ICNC Shintaro Sano, Masahiro Sano, Shimpei Sato, Takefumi Miyoshi, Kenji Kise
2010	Misc	`conf`	Smart Core System for Dependable Many-Core Processor with Multifunction Routers. ICNC Shinya Takamaeda, Shimpei Sato, Takefumi Miyoshi, Kenji Kise
2009	C	`conf`	A Study of an Infrastructure for Research and Development of Many-Core Processors. PDCAT Koh Uehara, Shimpei Sato, Takefumi Miyoshi, Kenji Kise
2009	—	`conf`	Triple Line-Based Playout for Go - An Accelerator for Monte Carlo Go. ReConFig Kenichi Koizumi, Mary Inaba, Kei Hiraki, Yasuo Ishii, Takefumi Miyoshi, Kazuki Yoshizoe
2007	J	`jnl`	Compiler for Architecture with Dynamic Reconfigurable Processing Unit by Use of Automatic Assignment Method of Sub-Programs Based on Their Quantitative Evaluation. IEICE Trans. Inf. Syst. Takefumi Miyoshi, Nobuhiko Sugino
2007	J	`jnl`	Fine-grain compensation method with consideration of trade-offs between computation and data transfer for power consumption. SIGARCH Comput. Archit. News Takefumi Miyoshi, Nobuhiko Sugino
2005	J	`jnl`	Unified Phase Compiler by Use of 3-D Representation Space. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Takefumi Miyoshi, Nobuhiko Sugino