Takashi Nanya - RankMe

97 papers A 4B 3C 15Misc 3Journal 32Unranked 39

Year	Rank	Type	Title / Venue / Authors
2012	J	`jnl`	Nanocomputing: Small Devices, Large Dependability Challenges. IEEE Secur. Priv. Jean Arlat, Zbigniew Kalbarczyk, Takashi Nanya
2011	A	`conf`	Introduction to the fifth workshop on dependable and secure nanocomputing. DSN Jean Arlat, Cristian Constantinescu, Johan Karlsson, Takashi Nanya, Alan Wood
2011	—	`conf`	Introduction to the fifth workshop on dependable and secure nanocomputing. DSN Workshops Jean Arlat, Cristian Constantinescu, Johan Karlsson, Takashi Nanya, Alan Wood
2010	C	`conf`	A floorplan method for asynchronous circuits with bundled-data implementation on FPGAs. ISCAS Hiroshi Saito, Naohiro Hamada, Tomohiro Yoneda, Takashi Nanya
2010	C	`conf`	An Efficient Decision Unit for the Pair and Swap Methodology within Chip Multiprocessors. PRDC James L. Weston, Masashi Imai, Tomohide Nagai, Takashi Nanya
2010	Misc	`conf`	Analysis of Inter-Module Error Propagation Paths in Monolithic Operating System Kernels. EDCC Roberto Jung Drebes, Takashi Nanya
2010	—	`conf`	Pair and swap: An approach to graceful degradation for dependable chip multiprocessors. DSN Workshops Masashi Imai, Tomohide Nagai, Takashi Nanya
2009	J	`jnl`	A Behavioral Synthesis System for Asynchronous Circuits with Bundled-data Implementation. Inf. Media Technol. Naohiro Hamada, Yuki Shiga, Takao Konishi, Hiroshi Saito, Tomohiro Yoneda, Chris J. Myers, Takashi Nanya
2009	J	`jnl`	A Behavioral Synthesis System for Asynchronous Circuits with Bundled-data Implementation. IPSJ Trans. Syst. LSI Des. Methodol. Naohiro Hamada, Yuki Shiga, Takao Konishi, Hiroshi Saito, Tomohiro Yoneda, Chris J. Myers, Takashi Nanya
2009	J	`jnl`	An optimal lifetime-adaptive method for wireless sensor networks. Comput. Syst. Sci. Eng. Wenyu Qu, Masaru Kitsuregawa, Yanming Shen, Takashi Nanya
2009	—	`conf`	Fine-Grain Leakage Power Reduction Method for m-out-of-n Encoded Circuits Using Multi-threshold-Voltage Transistors. ASYNC Masashi Imai, Kouei Takada, Takashi Nanya
2009	C	`conf`	N-way ring and square arbiters. ICCD Masashi Imai, Tomohiro Yoneda, Takashi Nanya
2009	C	`conf`	Zapmem: A Framework for Testing the Effect of Memory Corruption Errors on Operating System Kernel Reliability. PRDC Roberto Jung Drebes, Takashi Nanya
2008	—	`conf`	A behavioral synthesis method for asynchronous circuits with bundled-data implementation (Tool paper). ACSD Naohiro Hamada, Yuki Shiga, Hiroshi Saito, Tomohiro Yoneda, Chris J. Myers, Takashi Nanya
2008	—	`conf`	A design method for 1-out-of-4 encoded low-power self-timed circuits using standard cell libraries. ACSD Masashi Imai, Takashi Nanya
2008	C	`conf`	Detecting Inconsistent Values Caused by Interaction Faults Using Automatically Located Implicit Redundancies. PRDC Bogdan Tomoyuki Nassu, Takashi Nanya, Hiroshi Nakamura
2008	—	`conf`	Discovering Implicit Redundancies in Network Communications for Detecting Inconsistent Values. ICDM Workshops Bogdan Tomoyuki Nassu, Takashi Nanya, Hiroshi Nakamura
2008	Misc	`conf`	Injecting Inconsistent Values Caused by Interaction Faults for Experimental Dependability Evaluation. EDCC Bogdan Tomoyuki Nassu, Kiyonobu Uehara, Takashi Nanya
2008	—	`conf`	Interaction Faults Caused by Third-Party External Systems - A Case Study and Challenges. ISAS Bogdan Tomoyuki Nassu, Takashi Nanya
2008	C	`conf`	Limitations of the Linux Fault Injection Framework to Test Direct Memory Access Address Errors. PRDC Roberto Jung Drebes, Takashi Nanya
2008	—	`ed.`	Service Availability, 5th International Service Availability Symposium, ISAS 2008, Tokyo, Japan, May 19-21, 2008, Proceedings ISAS Takashi Nanya, Fumihiro Maruyama, András Pataricza, Miroslaw Malek
2007	A	`conf`	A Minimal Access Cost-Based Multimedia Object Replacement Algorithm. IPDPS Keqiu Li, Takashi Nanya, Wenyu Qu
2007	—	`conf`	An Efficient Method for Improving Data Collection Precision in Lifetime-adaptive Wireless Sensor Networks. ICC Wenyu Qu, Keqiu Li, Masaru Kitsuregawa, Takashi Nanya
2007	J	`jnl`	An efficient cache replacement algorithm for multimedia object caching. Comput. Syst. Sci. Eng. Keqiu Li, Takashi Nanya, Hong Shen, Francis Y. L. Chin, Weishi Zhang
2007	J	`jnl`	An optimal solution for caching multimedia objects in transcoding proxies. Comput. Commun. Wenyu Qu, Keqiu Li, Masaru Kitsuregawa, Takashi Nanya
2007	C	`conf`	Challenges in Dependability of Networked Systems for Information Society. NPC Takashi Nanya
2007	—	`conf`	Energy Efficient Methods and Techniques for Mobile Computing. SKG Keqiu Li, Takashi Nanya, Wenyu Qu
2007	A	`conf`	Interactive presentation: Task scheduling under performance constraints for reducing the energy consumption of the GALS multi-processor SoC. DATE Ryo Watanabe, Masaaki Kondo, Masashi Imai, Hiroshi Nakamura, Takashi Nanya
2007	C	`conf`	Power reduction of chip multi-processors using shared resource control cooperating with DVFS. ICCD Ryo Watanabe, Masaaki Kondo, Hiroshi Nakamura, Takashi Nanya
2007	J	`jnl`	Scheduling Methods for Asynchronous Circuits with Bundled-Data Implementations Based on the Approximation of Start Times. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Hiroshi Saito, Naohiro Hamada, Nattha Jindapetch, Tomohiro Yoneda, Chris J. Myers, Takashi Nanya
2007	C	`conf`	Topology Discovery in Dynamic and Decentralized Networks with Mobile Agents and Swarm Intelligence. ISDA Bogdan Tomoyuki Nassu, Takashi Nanya, Elias P. Duarte Jr.
2006	—	`conf`	A Novel Design Method for Asynchronous Bundled-data Transfer Circuits Considering Characteristics of Delay Variations. ASYNC Masashi Imai, Takashi Nanya
2006	C	`conf`	A Scenario of Tolerating Interaction Faults Between Otherwise Correct Systems. PRDC Bogdan Tomoyuki Nassu, Takashi Nanya
2006	J	`jnl`	Design Method of High Performance and Low Power Functional Units Considering Delay Variations. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Kouichi Watanabe, Masashi Imai, Masaaki Kondo, Hiroshi Nakamura, Takashi Nanya
2006	C	`conf`	ILP-based Scheduling for Asynchronous Circuits in Bundled-Data Implementation. CIT Hiroshi Saito, Nattha Jindapetch, Tomohiro Yoneda, Chris J. Myers, Takashi Nanya
2006	—	`conf`	State-of-Art Techniques for Object Caching over the Internet. IMSCCS (2) Keqiu Li, Takashi Nanya, Bo Jiang, Wenyu Qu
2005	—	`conf`	The Cache Replacement Problem for Multimedia Object Caching. SKG Wenyu Qu, Keqiu Li, Hong Shen, Yingwei Jin, Takashi Nanya
2005	—	`conf`	Two Cache Replacement Algorithms Based on Association Rules and Markov Models. SKG Keqiu Li, Wenyu Qu, Hong Shen, Di Wu, Takashi Nanya
2004	C	`conf`	Asynchronous Scan-Latch controller for Low Area Overhead DFT. ICCD Masayuki Tsukisaka, Masashi Imai, Takashi Nanya
2004	—	`conf`	Evaluation of Delay Variation in Asynchronous Circuits Based on the Scalable-Delay-Insensitive Model. ASYNC Masashi Imai, Metehan Özcan, Takashi Nanya
2004	B	`conf`	Skewed Checkpointing for Tolerating Multi-Node Failures. SRDS Hiroshi Nakamura, Takuro Hayashida, Masaaki Kondo, Yuya Tajima, Masashi Imai, Takashi Nanya
2003	—	`conf`	A Reconfigurable High Availability Infrastructure in Cluster for Grid. GCC (1) Wen Gao, Xinyu Liu, Lei Wang, Takashi Nanya
2003	—	`conf`	A zero-time-overhead asynchronous four-phase controller. ISCAS (5) Nattha Sretasereekul, Hiroshi Saito, Masashi Imai, Euiseok Kim, Metehan Özcan, K. Thongnoo, Hiroshi Nakamura, Takashi Nanya
2003	—	`conf`	Control Signal Sharing Using Data-Path Delay Information at Control Data Flow Graph Descriptions. ASYNC Hiroshi Saito, Euiseok Kim, Nattha Sretasereekul, Masashi Imai, Hiroshi Nakamura, Takashi Nanya
2003	—	`conf`	Control signal sharing of asynchronous circuits using datapath delay information. ISCAS (5) Hiroshi Saito, Euiseok Kim, Masashi Imai, Nattha Sretasereekul, Hiroshi Nakamura, Takashi Nanya
2003	A	`conf`	Distributed Synchronous Control Units for Dataflow Graphs under Allocation of Telescopic Arithmetic Units. DATE Euiseok Kim, Hiroshi Saito, Jeong-Gun Lee, Dong-Ik Lee, Hiroshi Nakamura, Takashi Nanya
2003	J	`jnl`	Eliminating Isochronic-Fork Constraints in Quasi-Delay-Insensitive Circuits. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Nattha Sretasereekul, Takashi Nanya
2003	—	`conf`	Logic optimization for asynchronous speed independent controllers using transduction method. ASP-DAC Hiroshi Saito, Hiroshi Nakamura, Masahiro Fujita, Takashi Nanya
2003	—	`conf`	Performance optimization of synchronous control units for datapaths with variable delay arithmetic units. ASP-DAC Euiseok Kim, Dong-Ik Lee, Hiroshi Saito, Hiroshi Nakamura, Jeong-Gun Lee, Takashi Nanya
2003	J	`jnl`	Synthesis of Serial Local Clock Controllers for Asynchronous Circuit Design. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Nattha Sretasereekul, Hiroshi Saito, Euiseok Kim, Metehan Özcan, Masashi Imai, Hiroshi Nakamura, Takashi Nanya
2002	—	`conf`	An equivalence checking methodology for hardware oriented C-based specifications. HLDVT Hiroshi Saito, Takaya Ogawa, Thanyapat Sakunkonchak, Masahiro Fujita, Takashi Nanya
2002	—	`conf`	Design of Asynchronous Controllers with Delay Insensitive Interface. ASP-DAC/VLSI Design Hiroshi Saito, Alex Kondratyev, Takashi Nanya
2002	J	`jnl`	Design of Asynchronous Controllers with Delay Insensitive Interface. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Hiroshi Saito, Alex Kondratyev, Jordi Cortadella, Luciano Lavagno, Alex Yakovlev, Takashi Nanya
2002	—	`conf`	Generation and Verification of Timing Constraints for Fine-Grain Pipelined Asynchronous Data-Path Circuits. ASYNC Metehan Özcan, Masashi Imai, Takashi Nanya
2002	—	`conf`	High Throughput Asynchronous Domino Using Dual output Buffer. IWLS Masayuki Tsukisaka, Masashi Imai, Takashi Nanya
2002	—	`conf`	Logic Optimization for Asynchronous SI Controllers using Transduction Method. IWLS Hiroshi Saito, Hiroshi Nakamura, Masahiro Fujita, Takashi Nanya
2001	—	`conf`	Eliminating isochronic-fork constraints in quasi-delay-insensitive circuits. ASP-DAC Nattha Sretasereekul, Takashi Nanya
2001	—	`conf`	Performance Evaluation of Cascade ALU Architecture for Asynchronous Super-Scalar Processors. ASYNC Motokazu Ozawa, Masashi Imai, Hiroshi Nakamura, Takashi Nanya, Yoichiro Ueno
2001	—	`conf`	Synthesis of four-phase asynchronous control circuits from pipeline dependency graphs. ASP-DAC Hiroto Kagotani, Takuji Okamoto, Takashi Nanya
2000	C	`conf`	A testable design for asynchronous fine-grain pipeline circuits. PRDC Masayuki Tsukisaka, Takashi Nanya
1999	J	`jnl`	A Gracefully Degrading Massively Parallel System Using the BSP Model, and Its Evaluation. IEEE Trans. Computers Andreas Savva, Takashi Nanya
1998	J	`jnl`	A Hierarachical Adaptive Distributed System-Level Diagnosis Algorithm. IEEE Trans. Computers Elias Procópio Duarte Jr., Takashi Nanya
1998	J	`jnl`	Improving the dependability of network management systems. Int. J. Netw. Manag. Elias Procópio Duarte Jr., Glenn Mansfield, Takashi Nanya, Shoichi Noguchi
1998	—	`conf`	On the CSC Property of Signal Transition Graph Specifications for Asynchronous Circuit Design. ASP-DAC Mohit Sahni, Takashi Nanya
1998	—	`conf`	Primitive-Level Pipelining Method on Delay-Insensitive Model for RSFQ Pulse-Driven Logic. ASYNC Yoshio Kameda, Stanislav Polonsky, Masaaki Maezawa, Takashi Nanya
1998	J	`jnl`	Stuck-at-fault testing for quasi-delay-insensitive logic circuits. Syst. Comput. Jpn. Arthit Thongtak, Takashi Nanya
1998	—	`conf`	TITAC-2: An Asynchronous 32-bit Microprocessor. ASP-DAC Akihiro Takamura, Motokazu Ozawa, Izumi Fukasaku, Taro Fujii, Yoichiro Ueno, Masashi Imai, Masashi Kuwako, Takashi Nanya
1997	—	`conf`	Non-Broadcast Network Fault-Monitoring Based on System-Level Diagnosis. Integrated Network Management Elias Procópio Duarte Jr., Glenn Mansfield, Takashi Nanya, Shoichi Noguchi
1997	C	`conf`	TITAC-2: An asynchronous 32-bit microprocessor based on Scalable-Delay-Insensitive model. ICCD Akihiro Takamura, Masashi Kuwako, Masashi Imai, Taro Fujii, Motokazu Ozawa, Izumi Fukasaku, Yoichiro Ueno, Takashi Nanya
1997	J	`jnl`	Verification of asynchronous logic circuit design using process algebra. Syst. Comput. Jpn. Tomohiro Yoneda, Atsufumi Shibayama, Takashi Nanya
1996	B	`conf`	An SNMP-based implementation of the adaptive distributed system-level diagnosis algorithm for LAN fault management. NOMS Elias Procópio Duarte Jr., Takashi Nanya
1996	Misc	`conf`	Automatic Synthesis of Speed-Independent Circuits from Signal Transition Graph Specifications. VLSI Design Sung-Bum Park, Takashi Nanya
1996	B	`conf`	Hierarchical Adaptive Distributed System-Level Diagnosis Applied for SNMP-based Network Fault Management. SRDS Elias Procópio Duarte Jr., Takashi Nanya
1996	J	`jnl`	Performance enhancement of two-phase quasi-delay-insensitive circuits. Syst. Comput. Jpn. Hiroto Kagotani, Takashi Nanya
1996	—	`conf`	Pulse-driven dual-rail logic gate family based on rapid single-flux-quantum (RSFQ) devices for asynchronous circuits. ASYNC Masaaki Maezawa, Itaru Kurosawa, Yoshio Kameda, Takashi Nanya
1995	—	`conf`	Gracefully Degrading Systems Using the Bulk-Synchronous Parallel Model with Randomised Shared Memory. FTCS Andreas Savva, Takashi Nanya
1995	J	`jnl`	Logic circuit design for testability using orthonormal expansions. Syst. Comput. Jpn. Ryuichi Takahashi, Takashi Nanya
1995	J	`jnl`	Synthesis of two-phase quasi-delay-insensitive circuits from dependency graphs. Syst. Comput. Jpn. Hiroto Kagotani, Takashi Nanya
1995	—	`conf`	Towards Totally Self-Checking Delay-Insensitive Systems. FTCS Stanislaw J. Piestrak, Takashi Nanya
1994	J	`jnl`	A fault-tolerant multilayer neural network model and its properties. Syst. Comput. Jpn. Yasuo Tan, Takashi Nanya
1994	J	`jnl`	TITAC: Design of A Quasi-Delay-Insensitive Microprocessor. IEEE Des. Test Comput. Takashi Nanya, Yoichiro Ueno, Hiroto Kagotani, Masashi Kuwako, Akihiro Takamura
1994	—	`conf`	Timing-reliability evaluation of asynchronous circuits based on different delay models. ASYNC Masashi Kuwako, Takashi Nanya
1992	—	`conf`	Design of Fully Exercised SFS/SCD Logic Networks. FTCS Takashi Nanya, Shin'ichi Hatakenaka, Ryuichi Onoo
1989	—	`conf`	A strongly fault-secure and strongly code-disjoint realization of combinational circuits. FTCS Takashi Nanya, Masatoshi Uchida
1989	J	`jnl`	The Byzantine hardware fault model. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Takashi Nanya, Hendrik A. Goosen
1988	C	`conf`	A higher level hardware design verification. ICCD Atsushi Takahara, Takashi Nanya
1988	J	`jnl`	Error/Secure/Propagating Concept and its Application to the Design of Strongly Fault-Secure Processors. IEEE Trans. Computers Takashi Nanya, Toshiaki Kawamura
1988	—	`conf`	Multiple stuck-at fault testability of self-testing checkers. FTCS Takashi Nanya, Samiha Mourad, Edward J. McCluskey
1988	J	`jnl`	Test research in Japan. IEEE Des. Test Hideo Fujiwara, Yuzo Takamatsu, Takashi Nanya, Teruhiko Yamada, Hideo Tamamoto, Kiyoshi Furuya
1987	J	`jnl`	A Note on Strongly Fault-Secure Sequential Circuits. IEEE Trans. Computers Takashi Nanya, Toshiaki Kawamura
1987	J	`jnl`	Error-secure and error-propagating concepts for strongly fault-secure systems. Syst. Comput. Jpn. Takashi Nanya, Toshiaki Kawamura
1987	J	`jnl`	On Error Indication for Totally Self-Checking Systems. IEEE Trans. Computers Takashi Nanya, Toshiaki Kawamura
1986	J	`jnl`	A design approach to self-checking processors. Syst. Comput. Jpn. Takashi Nanya, Toshiaki Kawamura
1984	J	`jnl`	Stuck-At Fault Tests in the Presence of Undetectable Bridging Faults. IEEE Trans. Computers Teruhiko Yamada, Takashi Nanya
1983	J	`jnl`	Comments on "Detection Location of Input and Feedback Bridging Faults Among Input Output Lines". IEEE Trans. Computers Teruhiko Yamada, Takashi Nanya
1979	J	`jnl`	Universal Multicode STT State Assignments for Asynchronous Sequential Machines. IEEE Trans. Computers Takashi Nanya, Yoshihiro Tohma
1978	J	`jnl`	On Universal Single Transition Time Asynchronous State Assignments. IEEE Trans. Computers Takashi Nanya, Yoshihiro Tohma