Takashi Mitsuhashi

15 papers A* 5A 3Journal 2Unranked 4
YearRankTypeTitle / Venue / Authors
2009 — ch.
Usage Distribution Coverage: What Percentage of Expected Use Has Been Executed in Software Testing?
Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing
Tomohiko Takagi, Kazuya Nishimachi, Masayuki Muragishi, Takashi Mitsuhashi, Zengo Furukawa
2002 J jnl
Foreword.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Takashi Mitsuhashi, Toshiro Akino
1998 — conf
A Clock-Gating Method for Low-Power LSI Design.
ASP-DAC
Takeshi Kitahara, Fumihiro Minami, Toshiaki Ueda, Kimiyoshi Usami, Seiichi Nishio, Masami Murakata, Takashi Mitsuhashi
1997 A* conf
Layout Driven Re-synthesis for Low Power Consumption LSIs.
DAC
Masako Murofushi, Takashi Ishioka, Masami Murakata, Takashi Mitsuhashi
1996 — conf
Physical design CAD in deep sub-micron era.
EURO-DAC
Takashi Mitsuhashi, Masami Murakata, Kenji Yoshida, Takahiro Aoki
1996 A conf
Switching activity analysis for sequential circuits using Boolean approximation method.
ISLPED
Taku Uchino, Fumihiro Minami, Masami Murakata, Takashi Mitsuhashi
1995 — conf
Fanout-tree restructuring algorithm for post-placement timing optimization.
ASP-DAC
T. Aoki, Masami Murakata, Takashi Mitsuhashi, Nobuyuki Goto
1995 — conf
Power and area optimization by reorganizing CMOS complex gate circuits.
ISLPD
M. Tachibana, S. Kurosawa, R. Nojima, Norman Kojima, Masaaki Yamada, Takashi Mitsuhashi, Nobuyuki Goto
1995 A conf
Switching activity analysis using Boolean approximation method.
ICCAD
Taku Uchino, Fumihiro Minami, Takashi Mitsuhashi, Nobuyuki Goto
1992 A* conf
Power and Ground Network Topology Optimization for Cell Based VLSIs.
DAC
Takashi Mitsuhashi, Ernest S. Kuh
1990 A conf
FOLM-Planner: A New Floorplanner with a Frame Overlapping Floorplan Model Suitable for SOG (Sea-of-Gates) Type Gate Arrays.
ICCAD
Masako Murofushi, Masaaki Yamada, Takashi Mitsuhashi
1987 J jnl
A Resistance Calculation Algorithm and Its Application to Circuit Extraction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Takashi Mitsuhashi, Kenji Yoshida
1982 A* conf
Programs for verifying circuit connectivity of mos/lsi mask artwork.
DAC
Makoto Takashima, Takashi Mitsuhashi, Toshiaki Chiba, Kenji Yoshida
1980 A* conf
An integrated mask artwork analysis system.
DAC
Takashi Mitsuhashi, Toshiaki Chiba, Makoto Takashima, Kenji Yoshida
1977 A* conf
A layout checking system for large scale integrated circuits.
DAC
Kenji Yoshida, Takashi Mitsuhashi, Yasuo Nakada, Toshiaki Chiba, Kiyoshi Ogita, Shinji Nakatsuka