Takahiro J. Yamaguchi

73 papers A 21C 3Misc 7Journal 16Unranked 26

Year	Rank	Type	Title / Venue / Authors
2022	J	`jnl`	High-Precision Sub-Nyquist Sampling System Based on Modulated Wideband Converter for Communication Device Testing. IEEE Trans. Circuits Syst. I Regul. Pap. Zolboo Byambadorj, Koji Asami, Takahiro J. Yamaguchi, Akio Higo, Masahiro Fujita, Tetsuya Iizuka
2020	J	`jnl`	A Calibration Technique for Simultaneous Estimation of Actual Sensing Matrix Coefficients on Modulated Wideband Converters. IEEE Trans. Circuits Syst. Zolboo Byambadorj, Koji Asami, Takahiro J. Yamaguchi, Akio Higo, Masahiro Fujita, Tetsuya Iizuka
2020	J	`jnl`	Theoretical Analysis of Noise Figure for Modulated Wideband Converter. IEEE Trans. Circuits Syst. I Regul. Pap. Zolboo Byambadorj, Koji Asami, Takahiro J. Yamaguchi, Akio Higo, Masahiro Fujita, Tetsuya Iizuka
2020	—	`conf`	Theoretical Analysis on Noise Performance of Modulated Wideband Converters for Analog Testing. ATS Zolboo Byambadorj, Koji Asami, Takahiro J. Yamaguchi, Akio Higo, Masahiro Fujita, Tetsuya Iizuka
2019	J	`jnl`	Design and theoretical analysis of a clock jitter reduction circuit using gated phase blending between self-delayed clock edges. IEICE Electron. Express Kiichi Niitsu, Osamu Kobayashi, Takahiro J. Yamaguchi, Haruo Kobayashi
2018	—	`conf`	A Consideration on LUT Linearization of Stochastic ADC in Sub-Ranging Architecture. MWSCAS Parit Kanjanavirojkul, Nguyen Ngoc Mai Khanh, Rimon Ikeno, Takahiro J. Yamaguchi, Tetsuya Iizuka, Kunihiro Asada
2016	—	`conf`	A comparative study of body biased time-to-digital converters based on stochastic arbiters and stochastic comparators. NEWCAS James S. Tandon, Satoshi Komatsu, Takahiro J. Yamaguchi, Kunihiro Asada
2016	—	`conf`	Experimental demonstration of stochastic comparators for fine resolution ADC without calibration. ICECS Nguyen Ngoc Mai Khanh, Rimon Ikeno, Takahiro J. Yamaguchi, Tetsuya Iizuka, Kunihiro Asada
2015	J	`jnl`	A CMOS PWM Transceiver Using Self-Referenced Edge Detection. IEEE Trans. Very Large Scale Integr. Syst. Kiichi Niitsu, Yusuke Osawa, Naohiro Harigai, Daiki Hirabayashi, Osamu Kobayashi, Takahiro J. Yamaguchi, Haruo Kobayashi
2015	A	`conf`	A new method for measuring alias-free aperture jitter in an ADC output. ITC Takahiro J. Yamaguchi, Katsuhiko Degawa, Masayuki Kawabata, Masahiro Ishida, Koichiro Uekusa, Mani Soma
2015	—	`conf`	Session 3 - Optical interconnect and reliability enhancement techniques. CICC Tetsuya Iizuka, Takahiro J. Yamaguchi
2014	J	`jnl`	A Flash TDC with 2.6-4.2ps Resolution Using a Group of UnbalancedCMOS Arbiters. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Satoshi Komatsu, Takahiro J. Yamaguchi, Mohamed Abbas, Nguyen Ngoc Mai Khanh, James S. Tandon, Kunihiro Asada
2014	—	`conf`	A Novel Circuit for Transition-Edge Detection: Using a Stochastic Comparator Group to Test Transition-Edge. ATS Takahiro J. Yamaguchi, James S. Tandon, Satoshi Komatsu, Kunihiro Asada
2014	J	`jnl`	A low-offset cascaded time amplifier with reconfigurable inter-stage connection. IEICE Electron. Express Kiichi Niitsu, Naohiro Harigai, Takahiro J. Yamaguchi, Haruo Kobayashi
2014	C	`conf`	A subsampling stochastic coarse-fine ADC with SNR 55.3dB and >5.8TS/s effective sample rate for an on-chip signal analyzer. ISCAS James S. Tandon, Takahiro J. Yamaguchi, Satoshi Komatsu, Kunihiro Asada
2014	Misc	`conf`	Special session 8C: Hot topic: Designers' and test researchers' roles in analog design-for-test. VTS Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma, Terri S. Fiez, Mike Peng Li
2013	J	`jnl`	A Feed-Forward Time Amplifier Using a Phase Detector and Variable Delay Lines. IEICE Trans. Electron. Kiichi Niitsu, Naohiro Harigai, Takahiro J. Yamaguchi, Haruo Kobayashi
2013	A	`conf`	A novel test structure for measuring the threshold voltage variance in MOSFETs. ITC Takahiro J. Yamaguchi, James S. Tandon, Satoshi Komatsu, Kunihiro Asada
2013	—	`conf`	A stochastic sampling time-to-digital converter with tunable 180-770fs resolution, INL less than 0.6LSB, and selectable dynamic range offset. CICC James S. Tandon, Takahiro J. Yamaguchi, Satoshi Komatsu, Kunihiro Asada
2013	—	`conf`	Design of a clock jitter reduction circuit using gated phase blending between self-delayed clock edges. ASP-DAC Kiichi Niitsu, Naohiro Harigai, Daiki Hirabayashi, Daiki Oki, Masato Sakurai, Osamu Kobayashi, Takahiro J. Yamaguchi, Haruo Kobayashi
2013	—	`conf`	Electrical and photonic I/O test and debug. CICC Mike Peng Li, Takahiro J. Yamaguchi
2013	J	`jnl`	Multi-bit Sigma-Delta TDC Architecture with Improved Linearity. J. Electron. Test. Satoshi Uemori, Masamichi Ishii, Haruo Kobayashi, Daiki Hirabayashi, Yuta Arakawa, Yuta Doi, Osamu Kobayashi, Tatsuji Matsuura, Kiichi Niitsu, Yuji Yano, Tatsuhiro Gake, Takahiro J. Yamaguchi, Nobukazu Takai
2013	Misc	`conf`	Special session 12B: Panel post-silicon validation & test in huge variance era. VTS Takahiro J. Yamaguchi, Jacob A. Abraham, Gordon W. Roberts, Suriyaprakash Natarajan, Dennis J. Ciplickas
2012	—	`conf`	A New Procedure for Measuring High-Accuracy Probability Density Functions. Asian Test Symposium Takahiro J. Yamaguchi, Kunihiro Asada, Kiichi Niitsu, Mohamed Abbas, Satoshi Komatsu, Haruo Kobayashi, Jose A. Moreira
2012	—	`conf`	A clock jitter reduction circuit using gated phase blending between self-delayed clock edges. VLSIC Kiichi Niitsu, Naohiro Harigai, Daiki Hirabayashi, Daiki Oki, Masato Sakurai, Osamu Kobayashi, Takahiro J. Yamaguchi, Haruo Kobayashi
2012	—	`conf`	A reference-free on-chip timing jitter measurement circuit using self-referenced clock and a cascaded time difference amplifier in 65nm CMOS. ASP-DAC Kiichi Niitsu, Masato Sakurai, Naohiro Harigai, Daiki Hirabayashi, Takahiro J. Yamaguchi, Haruo Kobayashi
2012	J	`jnl`	CMOS Circuits to Measure Timing Jitter Using a Self-Referenced Clock and a Cascaded Time Difference Amplifier With Duty-Cycle Compensation. IEEE J. Solid State Circuits Kiichi Niitsu, Masato Sakurai, Naohiro Harigai, Takahiro J. Yamaguchi, Haruo Kobayashi
2012	—	`conf`	Multi-bit sigma-delta TDC architecture with self-calibration. APCCAS Satoshi Uemori, Masamichi Ishii, Haruo Kobayashi, Yuta Doi, Osamu Kobayashi, Tatsuji Matsuura, Kiichi Niitsu, Yuta Arakawa, Daiki Hirabayashi, Yuji Yano, Tatsuhiro Gake, Nobukazu Takai, Takahiro J. Yamaguchi
2012	—	`conf`	Post-Silicon Jitter Measurements. Asian Test Symposium Kiichi Niitsu, Takahiro J. Yamaguchi, Masahiro Ishida, Haruo Kobayashi
2012	—	`conf`	Session Summary IV: Post-Silicon Measurements and Tests: Analog Test and High-Speed I/O Test II. Asian Test Symposium Takahiro J. Yamaguchi
2011	C	`conf`	An equivalent-time and clocked approach for continuous-time quantization. ISCAS Takahiro J. Yamaguchi, Mohamed Abbas, Mani Soma, Takafumi Aoki, Yasuo Furukawa, Katsuhiko Degawa, Satoshi Komatsu, Kunihiro Asada
2011	—	`conf`	An on-chip timing jitter measurement circuit using a self-referenced clock and a cascaded time difference amplifier with duty-cycle compensation. A-SSCC Kiichi Niitsu, Masato Sakurai, Naohiro Harigai, Takahiro J. Yamaguchi, Haruo Kobayashi
2011	—	`conf`	Analysis of jitter accumulation in interleaved phase frequency detectors for high-accuracy on-chip jitter measurements. ISOCC Masato Sakurai, Kiichi Niitsu, Naohiro Harigai, Daiki Hirabayashi, Daiki Oki, Takahiro J. Yamaguchi, Haruo Kobayashi
2011	A	`conf`	Application of a continuous-time level crossing quantization method for timing noise measurements. ITC Takahiro J. Yamaguchi, Mani Soma, Takafumi Aoki, Yasuo Furukawa, Katsuhiko Degawa, Kunihiro Asada, Mohamed Abbas, Satoshi Komatsu
2011	J	`jnl`	Design for Testability That Reduces Linearity Testing Time of SAR ADCs. IEICE Trans. Electron. Tomohiko Ogawa, Haruo Kobayashi, Satoshi Uemori, Yohei Tan, Satoshi Ito, Nobukazu Takai, Takahiro J. Yamaguchi, Kiichi Niitsu
2011	—	`conf`	Novel technique for minimizing the comparator delay dispersion in 65nm CMOS technology. ICECS Mohamed Abbas, Takahiro J. Yamaguchi, Yasuo Furukawa, Satoshi Komatsu, Kunihiro Asada
2010	—	`conf`	ADC linearity test signal generation algorithm. APCCAS Satoshi Uemori, Takahiro J. Yamaguchi, Satoshi Ito, Yohei Tan, Haruo Kobayashi, Nobukazu Takai, Kiichi Niitsu, Nobuyoshi Ishikawa
2010	—	`conf`	SAR ADC that is configurable to optimize yield. APCCAS Tomohiko Ogawa, Haruo Kobayashi, Yohei Tan, Satoshi Ito, Satoshi Uemori, Nobukazu Takai, Kiichi Niitsu, Takahiro J. Yamaguchi, Tatsuji Matsuura, Nobuyoshi Ishikawa
2010	—	`conf`	Stochastic TDC architecture with self-calibration. APCCAS Satoshi Ito, Shigeyuki Nishimura, Haruo Kobayashi, Satoshi Uemori, Yohei Tan, Nobukazu Takai, Takahiro J. Yamaguchi, Kiichi Niitsu
2009	A	`conf`	A robust method for identifying a deterministic jitter model in a total jitter distribution. ITC Takahiro J. Yamaguchi, Kiyotaka Ichiyama, X. H. Hou, Masahiro Ishida
2009	Misc	`conf`	Phase-based alignment of two signals having partially overlapped spectra. ICASSP Albert Tumewu, Kazuyuki Miyazawa, Takafumi Aoki, Takahiro J. Yamaguchi, Katsuhiko Degawa, Takayuki Akita
2008	A	`conf`	A New Method for Measuring Aperture Jitter in ADC Output and Its Application to ENOB Testing. ITC Takahiro J. Yamaguchi, Masayuki Kawabata, Mani Soma, Masahiro Ishida, K. Sawami, Koichiro Uekusa
2008	—	`conf`	Total Jitter Measurement for Testing HSIO Integrated SoCs. ATS Takahiro J. Yamaguchi, Masahiro Ishida
2007	A	`conf`	An FFT-based jitter separation method for high-frequency jitter testing with a 10x reduction in test time. ITC Takahiro J. Yamaguchi, H. X. Hou, Koji Takayama, Dave Armstrong, Masahiro Ishida, Mani Soma
2007	C	`conf`	An On-Chip Delta-Time-to-Voltage Converter for Real-Time Measurement of Clock Jitter. ISCAS Kiyotaka Ichiyama, Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma
2007	A	`conf`	Data jitter measurement using a delta-time-to-voltage converter method. ITC Kiyotaka Ichiyama, Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma
2007	—	`conf`	Mismatch-Tolerant Circuit for On-Chip Measurements of Data Jitter. CICC Kiyotaka Ichiyama, Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma
2007	—	`conf`	Top 5 Issues in Practical Testing of High-Speed Interface Devices. ATS Takahiro J. Yamaguchi
2006	A	`conf`	A Real-Time Delta-Time-to-Voltage Converter for Clock Jitter Measurement. ITC Kiyotaka Ichiyama, Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma
2006	A	`conf`	A Study of Per-Pin Timing Jitter Scope. ITC Takahiro J. Yamaguchi, Satoshi Iwamoto, Masahiro Ishida, Mani Soma
2005	A	`conf`	A wideband low-noise ATE-based method for measuring jitter in GHz signals. ITC Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma
2004	A	`conf`	A Dynamically-Reconfigurable Image Recognition Processor. IPDPS Kazuyuki Maruo, Masayoshi Ichikawa, Naoto Miyamoto, Leo Karnan, Takahiro J. Yamaguchi, Koji Kotani, Tadahiro Ohmi
2004	A	`conf`	A Real-Time Jitter Measurement Board for High-Performance Computer and Communication Systems. ITC Takahiro J. Yamaguchi, Masahiro Ishida, Kiyotaka Ichiyama, Mani Soma, Christian Krawinkel, Katsuaki Ohsawa, Masao Sugai
2004	A	`conf`	Loopback or not? ITC Takahiro J. Yamaguchi
2004	J	`jnl`	Skew measurements in clock distribution circuits using an analytic signal method. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Takahiro J. Yamaguchi, Mani Soma, Jim Nissen, David Halter, Rajesh Raina, Masahiro Ishida
2003	A	`conf`	Effects of Deterministic Jitter in a Cable on Jitter Tolerance Measurements. ITC Takahiro J. Yamaguchi, Mani Soma, Masahiro Ishida, Makoto Kurosawa, Hirobumi Musha
2003	J	`jnl`	Extraction of instantaneous and RMS sinusoidal jitter using an analytic signal method. IEEE Trans. Circuits Syst. II Express Briefs Takahiro J. Yamaguchi, Mani Soma, Masahiro Ishida, Toshifumi Watanabe, Tadahiro Ohmi
2003	A	`conf`	Open Architecture ATE and 250 Consecutive UIs. ITC Takahiro J. Yamaguchi
2003	J	`jnl`	Timing Jitter Measurement of Intrinsic Random Jitter and Sinusoidal Jitter Using Frequency Division. J. Electron. Test. Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, Louis Malarsie, Hirobumi Musha
2002	J	`jnl`	A Method for Compressing Test Data Based on Burrows-Wheeler Transformation. IEEE Trans. Computers Takahiro J. Yamaguchi, Dong Sam Ha, Masahiro Ishida, Tadahiro Ohmi
2002	A	`conf`	A New Method for Testing Jitter Tolerance of SerDes Devices Using Sinusoidal Jitter. ITC Takahiro J. Yamaguchi, Mani Soma, Masahiro Ishida, Hirobumi Musha, Louis Malarsie
2002	—	`conf`	Effects of Amplitude Modulation in Jitter Tolerance Measurements of Communication Devices. Asian Test Symposium Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma, Hirobumi Musha
2002	A	`conf`	Multi-GHz interface devices should be tested using external test resources. ITC Takahiro J. Yamaguchi
2002	Misc	`conf`	Timing Jitter Measurement of 10 Gbps Bit Clock Signals Using Frequency Division. VTS Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, Louis Malarsie, Hirobumi Musha
2001	Misc	`conf`	A Method for Measuring the Cycle-to-Cycle Period Jitter of High-Frequency Clock Signals. VTS Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, David Halter, Rajesh Raina, Jim Nissen
2001	A	`conf`	Testing clock distribution circuits using an analytic signal method. ITC Takahiro J. Yamaguchi, Mani Soma, Jim Nissen, David Halter, Rajesh Raina, Masahiro Ishida
2000	J	`jnl`	A new approach to built-in self-testable datapath synthesis based on integer linear programming. IEEE Trans. Very Large Scale Integr. Syst. Han Bin Kim, Dong Sam Ha, Takeshi Takahashi, Takahiro J. Yamaguchi
2000	Misc	`conf`	Extraction of Peak-to-Peak and RMS Sinusoidal Jitter Using an Analytic Signal Method. VTS Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, Toshifumi Watanabe, Tadahiro Ohmi
2000	A	`conf`	Jitter measurements of a PowerPC ITC Takahiro J. Yamaguchi, Mani Soma, David Halter, Jim Nissen, Rajesh Raina, Masahiro Ishida, Toshifumi Watanabe
1998	Misc	`conf`	COMPACT: A Hybrid Method for Compressing Test Data. VTS Masahiro Ishida, Dong Sam Ha, Takahiro J. Yamaguchi
1997	A	`conf`	An Efficient Method for Compressing Test Data. ITC Takahiro J. Yamaguchi, Masahiro Ishida, Marco Tilgner, Dong Sam Ha
1997	A	`conf`	Dynamic Testing of ADCs Using Wavelet Transforms. ITC Takahiro J. Yamaguchi, Mani Soma
1997	—	`conf`	Static Testing of ADCs Using Wavelet Transforms. Asian Test Symposium Takahiro J. Yamaguchi