Takahiro Iinuma

12 papers B 2C 2Journal 4Unranked 4
YearRankTypeTitle / Venue / Authors
2025 J jnl
Heterogeneous Assembly Echo State Networks for High-Dimensional, Multiscale Time Series: Dynamic Analysis via Delay Capacity and Multiscale Fuzzy Entropy.
IEEE Access
Sota Yoshida, Takahiro Iinuma, Sou Nobukawa, Eiji Watanabe, Teijiro Isokawa
2024 J jnl
Controlling Chaotic Resonance with Extremely Local-Specific Feedback Signals.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Takahiro Iinuma, Yudai Ebato, Sou Nobukawa, Nobuhiko Wagatsuma, Keiichiro Inagaki, Hirotaka Doho, Teruya Yamanishi, Haruhiko Nishimura
2024 — conf
Multi-timescale Processing with Heterogeneous Assembly Echo State Networks.
ICONIP (3)
Sota Yoshida, Takahiro Iinuma, Sou Nobukawa, Eiji Watanabe, Teijiro Isokawa
2023 B conf
Extremely Weak Feedback Method for Controlling Chaotic Resonance.
SMC
Takahiro Iinuma, Yudai Ebato, Sou Nobukawa, Anh Tu Tran, Nobuhiko Wagatsuma, Keiichiro Inagaki, Hirotaka Doho, Teruya Yamanishi, Haruhiko Nishimura
2022 B conf
Assembly of Echo State Networks Driven by Segregated Low Dimensional Signals.
IJCNN
Takahiro Iinuma, Sou Nobukawa, Satoshi Yamaguchi
2020 — conf
5.7 A 132dB Single-Exposure-Dynamic-Range CMOS Image Sensor with High Temperature Tolerance.
ISSCC
Yorito Sakano, Takahiro Toyoshima, Ryosuke Nakamura, Tomohiko Asatsuma, Yuki Hattori, Takayuki Yamanaka, Ryoichi Yoshikawa, Naoki Kawazu, Tomohiro Matsuura, Takahiro Iinuma, Takahiro Toya, Tomohiko Watanabe, Atsushi Suzuki, Yuichi Motohashi, Junichiro Azami, Yasushi Tateshita, Tsutomu Haruta
2018 — conf
A 1/4-inch 3.9Mpixel low-power event-driven back-illuminated stacked CMOS image sensor.
ISSCC
Oichi Kumagai, Atsumi Niwa, Katsuhiko Hanzawa, Hidetaka Kato, Shinichiro Futami, Toshio Ohyama, Tsutomu Imoto, Masahiko Nakamizo, Hirotaka Murakami, Tatsuki Nishino, Anas Bostamam, Takahiro Iinuma, Naoki Kuzuya, Kensuke Hatsukawa, Frederick T. Brady, William Bidermann, Toshifumi Wakano, Takashi Nagano, Hayato Wakabayashi, Yoshikazu Nitta
2008 J jnl
A Sub 100 mW H.264 [email protected] Integer-Pel Motion Estimation Processor Core for MBAFF Encoding with Reconfigurable Ring-Connected Systolic Array and Segmentation-Free, Rectangle-Access Search-Window Buffer.
IEICE Trans. Electron.
Yuichiro Murachi, Junichi Miyakoshi, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Fang Yin, Jangchung Lee, Hiroshi Kawaguchi, Masahiko Yoshimoto
2008 C conf
A sub 100 mW H.264/AVC [email protected] integer-pel motion estimation processor VLSI for MBAFF encoding.
ISCAS
Yuichiro Murachi, Kosuke Mizuno, Junichi Miyakoshi, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Fang Yin, Jangchung Lee, Tetsuya Kamino, Hiroshi Kawaguchi, Masahiko Yoshimoto
2008 — conf
An H.264/AVC [email protected] quarter-pel motion estimation processor VLSI for real-time MBAFF encoding.
ICECS
Kosuke Mizuno, Junichi Miyakoshi, Yuichiro Murachi, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Fang Yin, Jangchung Lee, Hiroshi Kawaguchi, Masahiko Yoshimoto
2006 C conf
A Power- and Area-Efficient SRAM Core Architecture for Super-Parallel Video Processing.
VLSI-SoC
Junichi Miyakoshi, Yuichiro Murachi, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Hiroshi Kawaguchi, Masahiko Yoshimoto, Tetsuro Matsuno
2006 J jnl
A Sub-mW H.264 Baseline-Profile Motion Estimation Processor Core with a VLSI-Oriented Block Partitioning Strategy and SIMD/Systolic-Array Architecture.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Junichi Miyakoshi, Yuichiro Murachi, Tetsuro Matsuno, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Hiroshi Kawaguchi, Masayuki Miyama, Masahiko Yoshimoto