| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2013 | J | jnl |
IPSJ Trans. Syst. LSI Des. Methodol.
|
| 2012 | J | jnl |
IPSJ Trans. Syst. LSI Des. Methodol.
|
| 2011 | C | conf |
IOLTS
|
| 2011 | C | conf |
IOLTS
|
| 2010 | A | conf |
FPGA
|
| 2009 | — | conf |
ACM Great Lakes Symposium on VLSI
|
| 2009 | J | jnl |
IPSJ Trans. Syst. LSI Des. Methodol.
|
| 2009 | J | jnl |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
|
| 2008 | — | conf |
Area recovery under depth constraint by Cut Substitution for technology mapping for LUT-based FPGAs.
ASP-DAC
|
| 2006 | C | conf |
ISCAS
|
| 2006 | J | jnl |
IEICE Trans. Electron.
|
| 2005 | — | conf |
SoC
|