Taiga Takata

12 papers A 1C 3Journal 5Unranked 3
YearRankTypeTitle / Venue / Authors
2013 J jnl
Efficient Fault Simulation Algorithms for Analyzing Soft Error Propagation in Sequential Circuits.
IPSJ Trans. Syst. LSI Des. Methodol.
Taiga Takata, Masayoshi Yoshimura, Yusuke Matsunaga
2012 J jnl
A Robust Algorithm for Pessimistic Analysis of Logic Masking Effects in Combinational Circuits.
IPSJ Trans. Syst. LSI Des. Methodol.
Taiga Takata, Yusuke Matsunaga
2011 C conf
A robust algorithm for pessimistic analysis of logic masking effects in combinational circuits.
IOLTS
Taiga Takata, Yusuke Matsunaga
2011 C conf
Multiple-bit-upset and single-bit-upset resilient 8T SRAM bitcell layout with divided wordline structure.
IOLTS
Shusuke Yoshimoto, Takuro Amashita, D. Kozuwa, Taiga Takata, Masayoshi Yoshimura, Yusuke Matsunaga, Hiroto Yasuura, Hiroshi Kawaguchi, Masahiko Yoshimoto
2010 A conf
A heuristic algorithm for LUT-based FPGA technology mapping using the lower bound for DAG covering problem (abstract only).
FPGA
Taiga Takata, Yusuke Matsunaga
2009 — conf
An efficient cut enumeration for depth-optimum technology mapping for LUT-based FPGAs.
ACM Great Lakes Symposium on VLSI
Taiga Takata, Yusuke Matsunaga
2009 J jnl
Area Recovery under Depth Constraint for Technology Mapping for LUT-based FPGAs.
IPSJ Trans. Syst. LSI Des. Methodol.
Taiga Takata, Yusuke Matsunaga
2009 J jnl
Efficient Cut Enumeration Heuristics for Depth-Optimum Technology Mapping for LUT-Based FPGAs.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Taiga Takata, Yusuke Matsunaga
2008 — conf
Area recovery under depth constraint by Cut Substitution for technology mapping for LUT-based FPGAs.
ASP-DAC
Taiga Takata, Yusuke Matsunaga
2006 C conf
A character size optimization technique for throughput enhancement of character projection lithography.
ISCAS
Makoto Sugihara, Taiga Takata, Kenta Nakamura, Ryoichi Inanami, Hiroaki Hayashi, Katsumi Kishimoto, Tetsuya Hasebe, Yukihiro Kawano, Yusuke Matsunaga, Kazuaki J. Murakami, Katsuya Okumura
2006 J jnl
Cell Library Development Methodology for Throughput Enhancement of Character Projection Equipment.
IEICE Trans. Electron.
Makoto Sugihara, Taiga Takata, Kenta Nakamura, Ryoichi Inanami, Hiroaki Hayashi, Katsumi Kishimoto, Tetsuya Hasebe, Yukihiro Kawano, Yusuke Matsunaga, Kazuaki J. Murakami, Katsuya Okumura
2005 — conf
Cell Library Development Methodology for Throughput Enhancement of Electron Beam Direct-Write Lithography Systems.
SoC
Makoto Sugihara, Taiga Takata, Kenta Nakamura, Ryoichi Inanami, Hiroaki Hayashi, Katsumi Kishimoto, Tetsuya Hasebe, Yukihiro Kawano, Yusuke Matsunaga, Kazuaki J. Murakami, Katsuya Okumura