Taehui Na

33 papers A 1C 3Journal 26Unranked 3
YearRankTypeTitle / Venue / Authors
2026 J jnl
A 3× Offset, 2.9× Power, 1.3× Sensing Time, and 4× Area Reduction Direct Input Transfer Offset Cancel DRAM IO Sense Amplifier With Static Current-Free Pre-Sensing.
IEEE J. Solid State Circuits
Do-Yoon Lim, Sehee Lim, Dong Han Ko, In-Jun Jung, Giseok Kim, Dohan Kim, Donggyun Ha, Sunjong Park, Hohyun Chae, Seungjae Yei, Taehui Na, Seong-Ook Jung
2026 J jnl
Reliability-Enhanced Offset-Canceling Current-Sampling Sense Amplifier for 2T-2MTJ MRAM PUF.
IEEE Trans. Circuits Syst. I Regul. Pap.
Mingu Han, Jaehwan Kim, Bayartulga Ishdorj, Jaeyong Jang, Taehui Na
2025 J jnl
Analysis of Low Area Digital Up/Down Clipping Counter for Digital In-Memory Computing.
IEEE Access
Siyeol Lee, Geonwoo Lee, Seongmin Ahn, Taehui Na
2025 J jnl
Double-Node-Upset Fully-Tolerant/Recoverable and Triple-Node-Upset Partially-Tolerant Self-Recoverable Latch Design for Aerospace Applications.
IEEE Access
Urmila Saha, Bayartulga Ishdorj, Jaeyong Jang, Taehui Na
2025 J jnl
Offset-Tolerant Body-Biased Sense Amplifier With Rise-Time Control Technique for SRAM.
IEEE Trans. Circuits Syst. II Express Briefs
Jaehwan Kim, Mingu Han, Bayartulga Ishdorj, Taehui Na
2025 J jnl
Single-Reference-Based Multi-Level Cell Sensing Scheme for Spin-Orbit Torque MRAM.
IEEE Trans. Circuits Syst. I Regul. Pap.
Seongmin Ahn, Taehui Na
2023 J jnl
Offset-Canceling Current-Latched Sense Amplifier With Slow Rise Time Control and Reference Voltage Biasing Techniques.
IEEE Trans. Circuits Syst. I Regul. Pap.
Bayartulga Ishdorj, Doyeon Kim, Seongmin Ahn, Taehui Na
2023 J jnl
Spin-Transfer-Torque Magnetic-Tunnel-Junction-Based Low-Power Nonvolatile Flip-Flop Designs in the Subthreshold Voltage Region.
IEEE Trans. Very Large Scale Integr. Syst.
Bayartulga Ishdorj, Taehui Na
2023 J jnl
Ternary Output Binary Neural Network With Zero-Skipping for MRAM-Based Digital In-Memory Computing.
IEEE Trans. Circuits Syst. II Express Briefs
Taehui Na
2021 — conf
Offset Voltage Analysis and Enable Signal Rise Time Control Based Offset Reduction Technique of Current-Latched Sense Amplifier.
ICEIC
Taehui Na
2021 J jnl
STT-MRAM Sensing: A Review.
IEEE Trans. Circuits Syst. II Express Briefs
Taehui Na, Seung-Hyuk Kang, Seong-Ook Jung
2020 J jnl
Novel MTJ-Based Sensing Inverter Variation Tolerant Nonvolatile Flip-Flop in the Near-Threshold Voltage Region.
IEEE Access
Gwang Hui Choi, Taehui Na
2020 J jnl
Robust Offset-Cancellation Sensing-Circuit-Based Spin-Transfer-Torque Nonvolatile Flip-Flop.
IEEE Access
Taehui Na
2019 J jnl
Offset-Canceling Single-Ended Sensing Scheme With One-Bit-Line Precharge Architecture for Resistive Nonvolatile Memory in 65-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst.
Taehui Na, Byungkyu Song, Sara Choi, Jung Pill Kim, Seung-Hyuk Kang, Seong-Ook Jung
2018 J jnl
Data-Cell-Variation-Tolerant Dual-Mode Sensing Scheme for Deep Submicrometer STT-RAM.
IEEE Trans. Circuits Syst. I Regul. Pap.
Taehui Na, Byungkyu Song, Jung Pill Kim, Seung-Hyuk Kang, Seong-Ook Jung
2017 J jnl
A 10T-4MTJ Nonvolatile Ternary CAM Cell for Reliable Search Operation and a Compact Area.
IEEE Trans. Circuits Syst. II Express Briefs
Byungkyu Song, Taehui Na, Jung Pill Kim, Seung-Hyuk Kang, Seong-Ook Jung
2017 J jnl
Offset-Canceling Current-Sampling Sense Amplifier for Resistive Nonvolatile Memory in 65 nm CMOS.
IEEE J. Solid State Circuits
Taehui Na, Byungkyu Song, Jung Pill Kim, Seung-Hyuk Kang, Seong-Ook Jung
2016 J jnl
An Offset-Tolerant Dual-Reference-Voltage Sensing Scheme for Deep Submicrometer STT-RAM.
IEEE Trans. Very Large Scale Integr. Syst.
Taehui Na, Jisu Kim, Byungkyu Song, Jung Pill Kim, Seung-Hyuk Kang, Seong-Ook Jung
2016 C conf
Area-optimal sensing circuit designs in deep submicrometer STT-RAM.
ISCAS
Sara Choi, Taehui Na, Seong-Ook Jung, Jung Pill Kim, Seung-Hyuk Kang
2016 J jnl
Corner-Aware Dynamic Gate Voltage Scheme to Achieve High Read Yield in STT-RAM.
IEEE Trans. Very Large Scale Integr. Syst.
Sara Choi, Taehui Na, Jisu Kim, Jung Pill Kim, Seung-Hyuk Kang, Seong-Ook Jung
2016 — conf
Equalization scheme analysis for high-density spin transfer torque random access memory.
ISOCC
Beomsang Yoo, Taehui Na, Byungkyu Song, Seong-Ook Jung, Jung Pill Kim, Seung-Hyuk Kang
2016 J jnl
Multiple-Cell Reference Scheme for Narrow Reference Resistance Distribution in Deep Submicrometer STT-RAM.
IEEE Trans. Very Large Scale Integr. Syst.
Taehui Na, Jung Pill Kim, Seung-Hyuk Kang, Seong-Ook Jung
2016 J jnl
Read Disturbance Reduction Technique for Offset-Canceling Dual-Stage Sensing Circuits in Deep Submicrometer STT-RAM.
IEEE Trans. Circuits Syst. II Express Briefs
Taehui Na, Jung Pill Kim, Seung-Hyuk Kang, Seong-Ook Jung
2015 J jnl
A Double-Sensing-Margin Offset-Canceling Dual-Stage Sensing Circuit for Resistive Nonvolatile Memory.
IEEE Trans. Circuits Syst. II Express Briefs
Taehui Na, Jisu Kim, Jung Pill Kim, Seung-Hyuk Kang, Seong-Ook Jung
2015 — conf
Efficiency analysis of importance sampling in deep submicron STT-RAM design using uncontrollable industry-compatible model parameter.
ICECS
Taehui Na, Hanwool Jeong, Seong-Ook Jung, Jung Pill Kim, Seung-Hyuk Kang
2015 J jnl
Latch Offset Cancellation Sense Amplifier for Deep Submicrometer STT-RAM.
IEEE Trans. Circuits Syst. I Regul. Pap.
Byungkyu Song, Taehui Na, Jisu Kim, Jung Pill Kim, Seung-Hyuk Kang, Seong-Ook Jung
2015 A conf
Reference-circuit analysis for high-bandwidth spin transfer torque random access memory.
ISLPED
Byungkyu Song, Taehui Na, Seong-Ook Jung, Jung Pill Kim, Seung-Hyuk Kang
2014 J jnl
A Split-Path Sensing Circuit for Spin Torque Transfer MRAM.
IEEE Trans. Circuits Syst. II Express Briefs
Jisu Kim, Taehui Na, Jung Pill Kim, Seung-Hyuk Kang, Seong-Ook Jung
2014 J jnl
An Offset-Canceling Triple-Stage Sensing Circuit for Deep Submicrometer STT-RAM.
IEEE Trans. Very Large Scale Integr. Syst.
Taehui Na, Jisu Kim, Jung Pill Kim, Seung-Hyuk Kang, Seong-Ook Jung
2014 J jnl
Comparative Study of Various Latch-Type Sense Amplifiers.
IEEE Trans. Very Large Scale Integr. Syst.
Taehui Na, Seung-Han Woo, Jisu Kim, Hanwool Jeong, Seong-Ook Jung
2014 C conf
High-performance low-power magnetic tunnel junction based non-volatile flip-flop.
ISCAS
Taehui Na, Kyungho Ryu, Jisu Kim, Seong-Ook Jung, Jung Pill Kim, Seung-Hyuk Kang
2014 J jnl
Reference-Scheme Study and Novel Reference Scheme for Deep Submicrometer STT-RAM.
IEEE Trans. Circuits Syst. I Regul. Pap.
Taehui Na, Jisu Kim, Jung Pill Kim, Seung-Hyuk Kang, Seong-Ook Jung
2013 C conf
A comparative study of STT-MTJ based non-volatile flip-flops.
ISCAS
Taehui Na, Kyungho Ryu, Jisu Kim, Seung-Hyuk Kang, Seong-Ook Jung