| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2022 | J | jnl |
IEEE J. Solid State Circuits
|
| 2022 | J | jnl |
IEEE Trans. Circuits Syst. I Regul. Pap.
|
| 2021 | J | jnl |
IEEE Trans. Circuits Syst. I Regul. Pap.
|
| 2021 | J | jnl |
IEEE J. Solid State Circuits
|
| 2020 | J | jnl |
IEEE Access
|
| 2020 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2020 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2020 | — | conf |
A 16K Current-Based 8T SRAM Compute-In-Memory Macro with Decoupled Read/Write and 1-5bit Column ADC.
CICC
|
| 2020 | A | conf |
DATE
|
| 2020 | — | conf |
ISOCC
|
| 2020 | — | conf |
ISOCC
|
| 2019 | — | conf |
ESSCIRC
|
| 2019 | — | conf |
ESSCIRC
|
| 2019 | — | conf |
ISOCC
|
| 2019 | A | conf |
ISLPED
|
| 2018 | J | jnl |
IEEE Trans. Circuits Syst. I Regul. Pap.
|
| 2018 | — | conf |
A-SSCC
|
| 2018 | — | conf |
ISOCC
|
| 2018 | J | jnl |
IEEE J. Solid State Circuits
|
| 2018 | — | conf |
A-SSCC
|
| 2017 | — | conf |
A-SSCC
|
| 2014 | — | conf |
ISSCC
|
| 2014 | J | jnl |
IEEE J. Solid State Circuits
|
| 2011 | — | conf |
ASICON
|