Tae-Young Chung

14 papers A* 1B 2Journal 10Unranked 1
YearRankTypeTitle / Venue / Authors
2022 J jnl
N-RPN: Hard Example Learning for Region Proposal Networks.
CoRR
MyeongAh Cho, Tae-Young Chung, Hyeongmin Lee, Sangyoun Lee
2022 J jnl
NIR-to-VIS Face Recognition via Embedding Relations and Coordinates of the Pairwise Features.
CoRR
MyeongAh Cho, Tae-Young Chung, Taeoh Kim, Sangyoun Lee
2022 J jnl
SSAT: Self-Supervised Associating Network for Multiobject Tracking.
IEEE Trans. Circuits Syst. Video Technol.
Tae-Young Chung, MyeongAh Cho, Heansung Lee, Sangyoun Lee
2020 J jnl
AD-VO: Scale-Resilient Visual Odometry Using Attentive Disparity Map.
CoRR
Joosung Lee, Sang-Won Hwang, Kyungjae Lee, Woo Jin Kim, Junhyeop Lee, Tae-Young Chung, Sangyoun Lee
2020 A* conf
AdaCoF: Adaptive Collaboration of Flows for Video Frame Interpolation.
CVPR
Hyeongmin Lee, Taeoh Kim, Tae-Young Chung, Daehyun Pak, Yuseok Ban, Sangyoun Lee
2020 J jnl
CRVOS: Clue Refining Network for Video Object Segmentation.
CoRR
Suhwan Cho, MyeongAh Cho, Tae-Young Chung, Heansung Lee, Sangyoun Lee
2020 B conf
Crvos: Clue Refining Network For Video Object Segmentation.
ICIP
Suhwan Cho, MyeongAh Cho, Tae-Young Chung, Heansung Lee, Sangyoun Lee
2020 J jnl
Multi-object tracking with self-supervised associating network.
CoRR
Tae-Young Chung, Heansung Lee, MyeongAh Cho, Suhwan Cho, Sangyoun Lee
2019 J jnl
Learning Spatial Transform for Video Frame Interpolation.
CoRR
Hyeongmin Lee, Taeoh Kim, Tae-Young Chung, Daehyun Pak, Yuseok Ban, Sangyoun Lee
2019 B conf
N-RPN: Hard Example Learning For Region Proposal Networks.
ICIP
MyeongAh Cho, Tae-Young Chung, Hyeongmin Lee, Sangyoun Lee
2019 — conf
NIR-to-VIS Face Recognition via Embedding Relations and Coordinates of the Pairwise Features.
ICB
MyeongAh Cho, Tae-Young Chung, Taeoh Kim, Sangyoun Lee
2017 J jnl
Towards a Realistic Indoor World Reconstruction: Preliminary Results for an Object-Oriented 3D RGB-D Mapping.
Intell. Autom. Soft Comput.
ChangHyun Jun, Jaehyeon Kang, Suyong Yeon, Hyunga Choi, Tae-Young Chung, Nakju Lett Doh
1999 J jnl
A 2.5-V, 333-Mb/s/pin, 1-Gbit, double-data-rate synchronous DRAM.
IEEE J. Solid State Circuits
Hongil Yoon, Gi-Won Cha, Changsik Yoo, Nam-Jong Kim, Keum-Yong Kim, Chang Ho Lee, Kyu-Nam Lim, Kyuchan Lee, Jun-Young Jeon, Tae Sung Jung, Hongsik Jeong, Tae-Young Chung, Kinam Kim, Soo-In Cho
1989 J jnl
An experimental 16-Mbit DRAM with reduced peak-current noise.
IEEE J. Solid State Circuits
Daeje Chin, Changhyun Kim, Yunho Choi, Dong-Sun Min, Hong-Sun Hwang, Hoon Choi, Soo-In Cho, Tae-Young Chung, Chan J. Park, Yunseung Shin, Kwang Pyuk Suh, Yong E. Park