Tae-Kwang Jang

31 papers Journal 10Unranked 21

Year	Rank	Type	Title / Venue / Authors
2020	—	`conf`	26.9 A 0.19×0.17mm ISSCC Jongyup Lim, Eunseong Moon, Michael Barrow, Samuel R. Nason, Paras R. Patel, Parag G. Patil, Sechang Oh, Inhee Lee, Hun-Seok Kim, Dennis Sylvester, David T. Blaauw, Cynthia A. Chestek, Jamie Phillips, Tae-Kwang Jang
2020	—	`conf`	3.3 A 0.51nW 32kHz Crystal Oscillator Achieving 2ppb Allan Deviation Floor Using High-Energy-to-Noise-Ratio Pulse Injection. ISSCC Li Xu, Tae-Kwang Jang, Jongyup Lim, Kyojin David Choo, David T. Blaauw, Dennis Sylvester
2019	—	`conf`	A 1.74.12 mm VLSI Circuits Taewook Kang, Inhee Lee, Sechang Oh, Tae-Kwang Jang, Yejoong Kim, Hyochan Ahn, Gyouho Kim, Se-Un Shin, Seokhyeon Jeong, Dennis Sylvester, David T. Blaauw
2019	—	`conf`	A Reference Oversampling Digital Phase-Locked Loop with -240 dB FOM and -80 dBc Reference Spur. VLSI Circuits Ji-Hwan Seol, Dennis Sylvester, David T. Blaauw, Tae-Kwang Jang
2019	—	`conf`	An Adiabatic Sense and Set Rectifier for Improved Maximum-Power-Point Tracking in Piezoelectric Harvesting with 541% Energy Extraction Gain. ISSCC Yimai Peng, Kyojin David Choo, Sechang Oh, Inhee Lee, Tae-Kwang Jang, Yejoong Kim, Jongyup Lim, David T. Blaauw, Dennis Sylvester
2019	J	`jnl`	An Efficient Piezoelectric Energy Harvesting Interface Circuit Using a Sense-and-Set Rectifier. IEEE J. Solid State Circuits Yimai Peng, Kyojin David Choo, Sechang Oh, Inhee Lee, Tae-Kwang Jang, Yejoong Kim, Jongyup Lim, David T. Blaauw, Dennis Sylvester
2018	—	`conf`	A 2.2 NEF Neural-Recording Amplifier Using Discrete-Time Parametric Amplification. VLSI Circuits Tae-Kwang Jang, Jongyup Lim, Kyojin David Choo, Samuel Nason, Jeongsup Lee, Jeongsup Oh, Seokhyeon Jeong, Cynthia A. Chestek, Dennis Sylvester, David T. Blaauw
2018	—	`conf`	A 224 PW 260 PPM/°C Gate-Leakage-Based Timer for Ultra-Low Power Sensor Nodes with Second-Order Temperature Dependency Cancellation. VLSI Circuits Jongyup Lim, Tae-Kwang Jang, Mehdi Saligane, Makoto Yasuda, Satoru Miyoshi, Masaru Kawaminami, David T. Blaauw, Dennis Sylvester
2018	J	`jnl`	A Noise Reconfigurable All-Digital Phase-Locked Loop Using a Switched Capacitor-Based Frequency-Locked Loop and a Noise Detector. IEEE J. Solid State Circuits Tae-Kwang Jang, Seokhyeon Jeong, Dongsuk Jeon, Kyojin David Choo, Dennis Sylvester, David T. Blaauw
2018	—	`conf`	A receiver/antenna co-design for a 1.5mJ per fix fully-integrated 10×10×6mm CICC Hyeongseok Kim, Nikolaos Chiotellis, Elnaz Ansari, Muhammad Faisal, Tae-Kwang Jang, Anthony Grbic, Hun-Seok Kim, David T. Blaauw, David D. Wentzloff
2018	J	`jnl`	Always-On 12-nW Acoustic Sensing and Object Recognition Microsystem for Unattended Ground Sensor Nodes. IEEE J. Solid State Circuits Seokhyeon Jeong, Yu Chen, Tae-Kwang Jang, Julius Ming-Lin Tsai, David T. Blaauw, Hun-Seok Kim, Dennis Sylvester
2017	—	`conf`	21.6 A 12nW always-on acoustic sensing and object recognition microsystem using frequency-domain feature extraction and SVM classification. ISSCC Seokhyeon Jeong, Yu Chen, Tae-Kwang Jang, Julius Ming-Lin Tsai, David T. Blaauw, Hun-Seok Kim, Dennis Sylvester
2017	—	`conf`	8.4 A 2.5ps 0.8-to-3.2GHz bang-bang phase- and frequency-detector-based all-digital PLL with noise self-adjustment. ISSCC Tae-Kwang Jang, Seokhyeon Jeong, Dongsuk Jeon, Kyojin David Choo, Dennis Sylvester, David T. Blaauw
2017	J	`jnl`	Circuit and System Designs of Ultra-Low Power Sensor Nodes With Illustration in a Miniaturized GNSS Logger for Position Tracking: Part II - Data Communication, Energy Harvesting, Power Management, and Digital Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. Tae-Kwang Jang, Gyouho Kim, Benjamin P. Kempke, Michael B. Henry, Nikolaos Chiotellis, Carl Pfeiffer, Dongkwun Kim, Yejoong Kim, Zhiyoong Foo, Hyeongseok Kim, Anthony Grbic, Dennis Sylvester, Hun-Seok Kim, David D. Wentzloff, David T. Blaauw
2016	—	`conf`	21.5 A current-mode wireless power receiver with optimal resonant cycle tracking for implantable systems. ISSCC Myungjoon Choi, Tae-Kwang Jang, Junwon Jeong, Seokhyeon Jeong, David T. Blaauw, Dennis Sylvester
2016	—	`conf`	5.8 A 4.7nW 13.8ppm/°C self-biased wakeup timer using a switched-resistor scheme. ISSCC Tae-Kwang Jang, Myungjoon Choi, Seokhyeon Jeong, Suyoung Bang, Dennis Sylvester, David T. Blaauw
2016	J	`jnl`	A 110 nW Resistive Frequency Locked On-Chip Oscillator with 34.3 ppm/°C Temperature Stability for System-on-Chip Designs. IEEE J. Solid State Circuits Myungjoon Choi, Tae-Kwang Jang, Suyoung Bang, Yao Shi, David T. Blaauw, Dennis Sylvester
2016	—	`conf`	A 380pW dual mode optical wake-up receiver with ambient noise cancellation. VLSI Circuits Wootaek Lim, Tae-Kwang Jang, Inhee Lee, Hun-Seok Kim, Dennis Sylvester, David T. Blaauw
2016	J	`jnl`	A 5.58 nW Crystal Oscillator Using Pulsed Driver for Real-Time Clocks. IEEE J. Solid State Circuits Dongmin Yoon, Tae-Kwang Jang, Dennis Sylvester, David T. Blaauw
2016	J	`jnl`	A Resonant Current-Mode Wireless Power Receiver and Battery Charger With -32 dBm Sensitivity for Implantable Systems. IEEE J. Solid State Circuits Myungjoon Choi, Tae-Kwang Jang, Junwon Jeong, Seokhyeon Jeong, David T. Blaauw, Dennis Sylvester
2016	—	`conf`	Millimeter-scale computing platform for next generation of Internet of Things. IEEE RFID Tae-Kwang Jang, Myungjoon Choi, Yao Shi, Inhee Lee, Dennis Sylvester, David T. Blaauw
2015	—	`conf`	A 99nW 70.4kHz resistive frequency locking on-chip oscillator with 27.4ppm/ºC temperature stability. VLSIC Myungjoon Choi, Suyoung Bang, Tae-Kwang Jang, David T. Blaauw, Dennis Sylvester
2015	—	`conf`	FOCUS: Key building blocks and integration strategy of a miniaturized wireless sensor node. ESSCIRC Tae-Kwang Jang, Seokhyeon Jeong, Myungjoon Choi, Wanyeong Jung, Gyouho Kim, Yen-Po Chen, Yejoong Kim, Wootaek Lim, Dennis Sylvester, David T. Blaauw
2014	—	`conf`	15.2 A 0.012mm ISSCC Jenlung Liu, Tae-Kwang Jang, Yonghee Lee, Jungeun Shin, Seunghoon Lee, Taeik Kim, Jaejin Park, Hojin Park
2014	—	`conf`	A 23pW, 780ppm/°C resistor-less current reference using subthreshold MOSFETs. ESSCIRC Myungjoon Choi, Inhee Lee, Tae-Kwang Jang, David T. Blaauw, Dennis Sylvester
2013	—	`conf`	A 0.026mm ISSCC Tae-Kwang Jang, Nan Xing, Frank Liu, Jungeun Shin, Hyungreal Ryu, Jihyun F. Kim, Taeik Kim, Jaejin Park, Hojin Park
2012	—	`conf`	A 0.004mm ISSCC Jong-Phil Hong, Sung-Jin Kim, Jenlung Liu, Nan Xing, Tae-Kwang Jang, Jaejin Park, Jihyun F. Kim, Taeik Kim, Hojin Park
2012	J	`jnl`	A Highly-Digital VCO-Based Analog-to-Digital Converter Using Phase Interpolator and Digital Calibration. IEEE Trans. Very Large Scale Integr. Syst. Tae-Kwang Jang, Jaewook Kim, Young-Gyu Yoon, SeongHwan Cho
2011	—	`conf`	A 0.8V, sub-mW, varactor-tuning ring-oscillator-based clock generator in 32nm CMOS. A-SSCC Jenlung Liu, Sehyung Jeon, Tae-Kwang Jang, Dohyung Kim, Jihyun F. Kim, Jaejin Park, Hojin Park
2010	J	`jnl`	Analysis and Design of Voltage-Controlled Oscillator Based Analog-to-Digital Converter. IEEE Trans. Circuits Syst. I Regul. Pap. Jaewook Kim, Tae-Kwang Jang, Young-Gyu Yoon, SeongHwan Cho
2008	J	`jnl`	A Time-Based Bandpass ADC Using Time-Interleaved Voltage-Controlled Oscillators. IEEE Trans. Circuits Syst. I Regul. Pap. Young-Gyu Yoon, Jaewook Kim, Tae-Kwang Jang, SeongHwan Cho