T. S. Bindiya - RankMe

26 papers C 2Journal 21Unranked 3

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Modeling of Izhikevich Spiking Neurons With High Matching Accuracy Using Comb-Exp Functions and Its Multiplier-Free Realization. IEEE Trans. Circuits Syst. I Regul. Pap. P. V. Sruthi, T. S. Bindiya
2024	J	`jnl`	An Improved Rational Approximation of Bark Scale Using Low Complexity and Low Delay Filter Banks. Circuits Syst. Signal Process. Hareesh V., T. S. Bindiya
2024	J	`jnl`	Approximate Multiplier Design With LFSR-Based Stochastic Sequence Generators for Edge AI. IEEE Comput. Archit. Lett. Mrinmay Sasmal, Tresa Joseph, T. S. Bindiya
2023	J	`jnl`	Design of cost effective variable bandwidth 2D low-pass, high-pass and band-pass filters with improved circularity. Digit. Signal Process. K. R. Sreelekha, T. S. Bindiya
2023	J	`jnl`	Development of a 2D Filter Architecture to Obtain Circular Bandwidths Varied by Arbitrary Rational Values Without Restructuring. Circuits Syst. Signal Process. K. R. Sreelekha, T. S. Bindiya
2023	J	`jnl`	Development of variable 2D FIR filter structures using farrow approximation and row-wise polyphase decomposition. Digit. Signal Process. K. R. Sreelekha, T. S. Bindiya
2023	J	`jnl`	Performance-Driven LSTM Accelerator Hardware Using Split-Matrix-Based MVM. Circuits Syst. Signal Process. Tresa Joseph, T. S. Bindiya
2023	J	`jnl`	Power and Delay-Efficient Matrix Vector Multiplier Units for the LSTM Networks Using Activity Span Reduction Technique and Recursive Adders. Circuits Syst. Signal Process. Tresa Joseph, T. S. Bindiya
2023	J	`jnl`	Realization and Hardware Implementation of Gating Units for Long Short-Term Memory Network Using Hyperbolic Sine Functions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Tresa Joseph, T. S. Bindiya
2022	J	`jnl`	Design of Hardware Efficient Reconfigurable Merged Partial Cosine Modulated Non-uniform Filter Bank Channelizer and its Power Efficient Implementation Using a Novel Approximation Algorithm. Circuits Syst. Signal Process. Hareesh V., T. S. Bindiya
2022	J	`jnl`	Design of variable elliptical filters with direct tunability in 2D domain. Multidimens. Syst. Signal Process. K. R. Sreelekha, T. S. Bindiya
2021	J	`jnl`	Design of Reconfigurable FRM Channelizer using Resource Shared Non-maximally Decimated Masking Filters. J. Signal Process. Syst. Sudhi Sudharman, T. S. Bindiya
2021	—	`conf`	High Speed and Power Efficient Multiplexer based Matrix Vector Multiplication for LSTM Network. VDAT Tresa Joseph, T. S. Bindiya
2020	J	`jnl`	Analysis of Different Rational Decimated Filter Banks Derived From the Same Set of Prototype Filters. IEEE Trans. Signal Process. Hareesh V., T. S. Bindiya
2020	J	`jnl`	Design of Low-Complex Linear-Phase Non-uniform Filter Bank to Realize Wavelet Approximation of Bark Frequency Partitioning for Real-Time Applications. Circuits Syst. Signal Process. Hareesh V., T. S. Bindiya
2020	—	`conf`	Multiplier-free Realization of High Throughout Transpose Form FIR Filter. CSNDSP Sudhi Sudharman, T. S. Bindiya
2019	C	`conf`	A New Multiplier-free Transformation for the Design of Hardware Efficient Circularly Symmetric Wideband 2D Filters. TENCON K. R. Sreelekha, T. S. Bindiya
2019	C	`conf`	Design and Implementation of Maximally Decimated Polyphase Filter Bank for Power and Delay Efficient Digital Hearing Aids. TENCON Sudhi Sudharman, T. S. Bindiya
2019	J	`jnl`	Design of Power Efficient Variable Bandwidth Non-Maximally Decimated FRM Filters for Wideband Channelizer. IEEE Trans. Circuits Syst. II Express Briefs Sudhi Sudharman, T. S. Bindiya
2019	J	`jnl`	Design of a Power-Efficient Low-Complexity Reconfigurable Non-maximally Decimated Filter Bank for High-Resolution Wideband Channels. Circuits Syst. Signal Process. Sudhi Sudharman, Athul D. Rajan, T. S. Bindiya
2019	J	`jnl`	Low-complexity implementation of efficient reconfigurable structure for cost-effective hearing aids using fractional interpolation. Comput. Electr. Eng. Amir A., T. S. Bindiya, Elizabeth Elias
2018	J	`jnl`	Design and implementation of reconfigurable filter bank structure for low complexity hearing aids using 2-level sound wave decomposition. Biomed. Signal Process. Control. Amir A., T. S. Bindiya, Elizabeth Elias
2017	—	`conf`	Reconfigurable Non-Maximally Decimated Filter Bank based wideband channelizer for VLBI. CCECE Sudhi Sudharman, T. S. Bindiya
2016	J	`jnl`	Meta-heuristic evolutionary algorithms for the design of optimal multiplier-less recombination filter banks. Inf. Sci. T. S. Bindiya, Elizabeth Elias
2014	J	`jnl`	Metaheuristic algorithms for the design of multiplier-less non-uniform filter banks based on frequency response masking. Soft Comput. T. S. Bindiya, Elizabeth Elias
2014	J	`jnl`	Modified Metaheuristic Algorithms for the Optimal Design of Multiplier-Less Non-uniform Channel Filters. Circuits Syst. Signal Process. T. S. Bindiya, Elizabeth Elias