Sébastien Pillement

92 papers A 5B 4C 10Misc 3Journal 26Unranked 42

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	A Hybrid Message-level Modeling Approach for Fast Yet Accurate Simulation of Multiprocessor Shared Bus Effects on Data Flow Applications Execution. J. Signal Process. Syst. Sébastien Le Nours, Hai-Dang Vu, Ralf Stemmer, Sébastien Pillement
2026	J	`jnl`	A measurement-based calibration approach for highly scalable timing and energy modeling of EdgeAI multi-core systems. J. Syst. Archit. Quentin Dariol, Sébastien Le Nours, Sébastien Pillement, Ralf Stemmer, Domenik Helms, Kim Grüttner
2025	J	`jnl`	A Study in Specification and Hardware Runtime Verification of Critical Embedded Software. IEEE Trans. Dependable Secur. Comput. Dimitry Solet, Jean-Luc Béchennec, Mikaël Briday, Sébastien Faucou, Sébastien Pillement
2025	—	`conf`	Aspycot: A Spike and Python Co-simulation Testbench for Hardware Monitoring IPs. RAPIDO@HiPEAC Téo Biton, Sébastien Pillement, Olivier Gilles, Nikolai Kosmatov, Daniel Gracia Pérez
2025	J	`jnl`	Call Rewinding: Efficient Backward Edge Protection. IACR Trans. Cryptogr. Hardw. Embed. Syst. Téo Biton, Olivier Gilles, Daniel Gracia Pérez, Nikolai Kosmatov, Sébastien Pillement
2025	J	`jnl`	DynHaMo: Dynamic Hardware-Based Monitoring Dedicated to Attacks Detection. ACM Trans. Embed. Comput. Syst. Juliette Pottier, Maria Méndez Real, Bertrand Le Gal, Sébastien Pillement
2025	—	`conf`	HT-NoC: Reconfigurable High Throughput Network-on-Chip for AI Dataflow Accelerators. ARC Mohamed Amine Zhiri, Hana Krichene, Chiara Sandionigi, Sébastien Pillement
2025	J	`jnl`	VERSATILE: Very Fast Partial Reconfiguration Controller. ACM Trans. Reconfigurable Technol. Syst. Mustafa Ibrahim, Sébastien Pillement, Andréa Pinna, Sébastien Le Nours
2024	J	`jnl`	RISC-V processor enhanced with a dynamic micro-decoder unit. CoRR Juliette Pottier, Thomas Nieddu, Bertrand Le Gal, Sébastien Pillement, Maria Méndez Real
2024	J	`jnl`	Runtime Task Scheduling for FPGA-Based Embedded Systems Using Just-in-Time Bitstream Prefetching. IEEE Access Alexis Duhamel, Sébastien Pillement
2023	—	`conf`	Fast Yet Accurate Timing and Power Prediction of Artificial Neural Networks Deployed on Clock-Gated Multi-Core Platforms. DroneSE/RAPIDO@HiPEAC Quentin Dariol, Sébastien Le Nours, Domenik Helms, Ralf Stemmer, Sébastien Pillement, Kim Grüttner
2023	—	`conf`	Formal Verification of Divider Circuits by Hardware Reduction. SMACD Atif Yasin, Tiankai Su, Sébastien Pillement, Maciej J. Ciesielski
2023	A	`conf`	Securing a RISC-V architecture: A dynamic approach. DATE Sébastien Pillement, Maria Mendez Real, J. Pottier, T. Nieddu, Bertrand Le Gal, Sébastien Faucou, Jean-Luc Béchennec, Mikaël Briday, Sylvain Girbal, Jimmy Le Rhun, Olivier Gilles, Daniel Gracia Pérez, André Sintzoff, Jean-Roch Coulon
2022	—	`conf`	A Hybrid Performance Prediction Approach for Fully-Connected Artificial Neural Networks on Multi-core Platforms. SAMOS Quentin Dariol, Sébastien Le Nours, Sébastien Pillement, Ralf Stemmer, Domenik Helms, Kim Grüttner
2022	—	`conf`	QoS Aware Design-Time/Run-Time Manager for FPGA-Based Embedded Systems. DASIP Alexis Duhamel, Sébastien Pillement
2021	J	`jnl`	0-1 ILP-based run-time hierarchical energy optimization for heterogeneous cluster-based multi/many-core systems. J. Syst. Archit. Simei Yang, Sébastien Le Nours, Maria Mendez Real, Sébastien Pillement
2021	—	`conf`	A Fast Yet Accurate Message-level Communication Bus Model for Timing Prediction of SDFGs on MPSoC. ASP-DAC Hai-Dang Vu, Sébastien Le Nours, Sébastien Pillement, Ralf Stemmer, Kim Grüttner
2021	C	`conf`	Experimental Evaluation of Statistical Model Checking Methods for Probabilistic Timing Analysis of Multiprocessor Systems. DSD Hai-Dang Vu, Sébastien Le Nours, Sébastien Pillement
2020	—	`conf`	Formal Verification of Constrained Arithmetic Circuits using Computer Algebraic Approach. ISVLSI Tiankai Su, Atif Yasin, Sébastien Pillement, Maciej J. Ciesielski
2020	A	`conf`	SPEAR: Hardware-based Implicit Rewriting for Square-root Circuit Verification. DATE Atif Yasin, Tiankai Su, Sébastien Pillement, Maciej J. Ciesielski
2020	A	`conf`	Towards Malicious Exploitation of Energy Management Mechanisms. DATE Safouane Noubir, Maria Mendez Real, Sébastien Pillement
2019	—	`conf`	Experimental Evaluation of Probabilistic Execution-Time Modeling and Analysis Methods for SDF Applications on MPSoCs. SAMOS Ralf Stemmer, Hai-Dang Vu, Kim Grüttner, Sébastien Le Nours, Wolfgang Nebel, Sébastien Pillement
2019	—	`conf`	Formal Verification of Integer Dividers: Division by a Constant. ISVLSI Atif Yasin, Tiankai Su, Sébastien Pillement, Maciej J. Ciesielski
2019	C	`conf`	Functional Verification of Hardware Dividers using Algebraic Model. VLSI-SoC Atif Yasin, Tiankai Su, Sébastien Pillement, Maciej J. Ciesielski
2019	—	`conf`	Mapping and Frequency Joint Optimization for Energy Efficient Execution of Multiple Applications on Multicore Systems. DASIP Simei Yang, Sébastien Le Nours, Maria Mendez Real, Sébastien Pillement
2019	—	`conf`	System-Level Modeling and Simulation of MPSoC Run-Time Management Using Execution Traces Analysis. SAMOS Simei Yang, Sébastien Le Nours, Maria Mendez Real, Sébastien Pillement
2018	Misc	`conf`	FPGA Side Channel Attacks without Physical Access. FCCM Chethan Ramesh, Shivukumar B. Patil, Siva Nishok Dhanuskodi, George Provelengios, Sébastien Pillement, Daniel E. Holcomb, Russell Tessier
2018	Misc	`conf`	Hardware Runtime Verification of a RTOS Kernel: Evaluation Using Fault Injection. EDCC Dimitry Solet, Jean-Luc Béchennec, Mikaël Briday, Sébastien Faucou, Sébastien Pillement
2018	—	`conf`	High-Level Reliability Evaluation of Reconfiguration-Based Fault Tolerance Techniques. IPDPS Workshops Tien Thanh Nguyen, Mathieu Thevenin, Anthony Mouraud, Gwenolé Corre, Olivier Pasquier, Sébastien Pillement
2017	J	`jnl`	Cooperative Spectrum Sensing with Small Sample Size in Cognitive Wireless Sensor Networks. Wirel. Pers. Commun. Shaoyang Men, Pascal Chargé, Sébastien Pillement
2017	J	`jnl`	FTUC: A Flooding Tree Uneven Clustering Protocol for a Wireless Sensor Network. Sensors Wei He, Sébastien Pillement, Du Xu
2017	—	`conf`	Model-driven reliability evaluation for MPSoC design. DASIP Tien Thanh Nguyen, Anthony Mouraud, Mathieu Thevenin, Gwenolé Corre, Olivier Pasquier, Sébastien Pillement
2016	—	`conf`	Hardware runtime verification of embedded software in SoPC. SIES Dimitry Solet, Jean-Luc Béchennec, Mikaël Briday, Sébastien Faucou, Sébastien Pillement
2015	J	`jnl`	A Robust and Energy Efficient Cooperative Spectrum Sensing Scheme in Cognitive Wireless Sensor Networks. Netw. Protoc. Algorithms Shaoyang Men, Pascal Chargé, Sébastien Pillement
2015	—	`conf`	A robust cooperative spectrum sensing method against faulty nodes in CWSNs. ICC Workshops Shaoyang Men, Pascal Chargé, Sébastien Pillement
2015	C	`conf`	Fault-aware configurable logic block for reliable reconfigurable FPGAs. ISCAS B. Chagun Basha, Sébastien Pillement, Stanislaw J. Piestrak
2014	—	`conf`	Built-in 3-Dimensional Hamming Multiple-Error Correcting Scheme to Mitigate Radiation Effects in SRAM-Based FPGAs. ARC B. Chagun Basha, Stanislaw J. Piestrak, Sébastien Pillement
2014	J	`jnl`	Design of the coarse-grained reconfigurable architecture DART with on-line error detection. Microprocess. Microsystems Syed M. A. H. Jafri, Stanislaw J. Piestrak, Olivier Sentieys, Sébastien Pillement
2014	—	`conf`	FlexTiles: a globally homogeneous but locally heterogeneous manycore architecture. RAPIDO Romain Brillu, Sébastien Pillement, Aymen Abdellah, Fabrice Lemonnier, Philippe Millet
2014	J	`jnl`	OCEAN, a flexible adaptive Network-On-Chip for dynamic applications. Microprocess. Microsystems Ludovic Devaux, Sébastien Pillement
2014	—	`ed.`	Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, DASIP 2014, Madrid, Spain, October 8-10, 2014 DASIP Eduardo de la Torre, Sébastien Pillement
2014	C	`conf`	Towards a Design Space Exploration Tool for MPSoC Platforms Designs: A Case Study. PDP Romain Brillu, Sébastien Pillement, Fabrice Lemonnier, Philippe Millet, Eric Lenormand, Marc Bernot, Frédéric Falzon
2013	J	`jnl`	Cluster based MPSoC architecture: an on-chip message passing implementation. Des. Autom. Embed. Syst. Romain Brillu, Sébastien Pillement, Fabrice Lemonnier, Philippe Millet
2013	J	`jnl`	Introduction. Tech. Sci. Informatiques Loïc Lagadec, Sébastien Pillement, Arnaud Tisserand
2013	J	`jnl`	Low-Overhead Fault-Tolerance Technique for a Dynamically Reconfigurable Softcore Processor. IEEE Trans. Computers Hung-Manh Pham, Sébastien Pillement, Stanislaw J. Piestrak
2013	—	`conf`	Spatio-temporal scheduling for 3D reconfigurable & multiprocessor architecture. IDT Quang-Hai Khuat, Quang-Hoa Le, Daniel Chillet, Sébastien Pillement
2012	—	`conf`	Gradient - An adaptive fault-tolerant routing algorithm for 2D mesh Network-on-Chips. DASIP Istas Pratomo, Sébastien Pillement
2012	—	`conf`	Impact of design parameters on performance of adaptive Network-on-Chips. HPCS Istas Pratomo, Sébastien Pillement
2012	—	`conf`	Towards future adaptive multiprocessor systems-on-chip: An innovative approach for flexible architectures. ICSAMOS Fabrice Lemonnier, Philippe Millet, Gabriel Marchesan Almeida, Michael Hübner, Jürgen Becker, Sébastien Pillement, Olivier Sentieys, Martijn Koedam, Shubhendu Sinha, Kees Goossens, Christian Piguet, Marc-Nicolas Morgan, Romain Lemaire
2012	A	`conf`	UPaRC - Ultra-fast power-aware reconfiguration controller. DATE Robin Bonamy, Hung-Manh Pham, Sébastien Pillement, Daniel Chillet
2011	—	`conf`	A framework for the design of reconfigurable fault tolerant architectures. DASIP Hung-Manh Pham, Sébastien Pillement, Olivier Pasquier, Sébastien Le Nours
2011	C	`conf`	Communication service for hardware tasks executed on dynamic and partial reconfigurable resources. VLSI-SoC Surya Narayanan, Ludovic Devaux, Daniel Chillet, Sébastien Pillement, Ioannis Sourdis
2011	C	`conf`	Error recovery technique for coarse-grained reconfigurable architectures. DDECS Muhammad Moazam Azeem, Stanislaw J. Piestrak, Olivier Sentieys, Sébastien Pillement
2011	—	`conf`	Hardware OS Communication Service and Dynamic Memory Management for RSoCs. ReConFig Surya Narayanan, Daniel Chillet, Sébastien Pillement, Ioannis Sourdis
2011	—	`conf`	Parallel Evaluation of Hopfield Neural Networks. IJCCI (NCTA) Antoine Eiche, Daniel Chillet, Sébastien Pillement, Olivier Sentieys
2011	—	`conf`	Re ReCoSoC Hung-Manh Pham, Ludovic Devaux, Sébastien Pillement
2011	J	`jnl`	Real-time scheduling on heterogeneous system-on-chip architectures using an optimised artificial neural network. J. Syst. Archit. Daniel Chillet, Antoine Eiche, Sébastien Pillement, Olivier Sentieys
2010	J	`jnl`	Comments on "A Low-Power Dependable Berger Code for Fully Asymmetric Communication". IEEE Commun. Lett. Stanislaw J. Piestrak, Sébastien Pillement, Olivier Sentieys
2010	—	`book`	Conception d'architectures reconfigurables dynamiquement : Du silicium au système. (Dynamically reconfigurable architectures: From silicon to system management). Sébastien Pillement
2010	—	`conf`	Design of a fault-tolerant coarse-grained. ISQED Syed M. A. H. Jafri, Stanislaw J. Piestrak, Olivier Sentieys, Sébastien Pillement
2010	J	`jnl`	Designing Efficient Codecs for Bus-Invert Berger Code for Fully Asymmetric Communication. IEEE Trans. Circuits Syst. II Express Briefs Stanislaw J. Piestrak, Sébastien Pillement, Olivier Sentieys
2010	B	`conf`	Evaluation of Fault-Mitigation Schemes for Fault-Tolerant Dynamic MPSoC. FPL Hung-Manh Pham, Sébastien Pillement, Didier Demigny
2010	J	`jnl`	Flexible Interconnection Network for Dynamically and Partially Reconfigurable Architectures. Int. J. Reconfigurable Comput. Ludovic Devaux, Sana Ben Sassi, Sébastien Pillement, Daniel Chillet, Didier Demigny
2010	—	`conf`	Mesh and Fat-Tree comparison for dynamically reconfigurable applications. ReCoSoC Ludovic Devaux, Sébastien Pillement, Daniel Chillet, Didier Demigny
2010	—	`conf`	R2NoC: Dynamically Reconfigurable Routers for Flexible Networks on Chip. ReConFig Ludovic Devaux, Sébastien Pillement, Daniel Chillet, Didier Demigny
2010	J	`jnl`	Spatio-temporal coding to improve speed and noise tolerance of on-chip interconnect. Microelectron. J. Sébastien Pillement, Olivier Sentieys, Jean-Marc Philippe
2010	—	`conf`	Task placement for dynamic and partial reconfigurable architecture. DASIP Antoine Eiche, Daniel Chillet, Sébastien Pillement, Olivier Sentieys
2009	—	`conf`	A Fault-Tolerant Layer for Dynamically Reconfigurable Multi-processor System-on-Chip. ReConFig Hung-Manh Pham, Sébastien Pillement, Didier Demigny
2009	—	`conf`	High-Level Exploration for Dynamic Reconfiguration Management. ERSA Sébastien Pillement, Daniel Chillet, Yaset Oliva, Jean-Christophe Prévotet
2009	J	`jnl`	OveRSoC: A Framework for the Exploration of RTOS for RSoC Platforms. Int. J. Reconfigurable Comput. Benoît Miramond, Emmanuel Huck, François Verdier, Mohamed El Amine Benkhelifa, Bertrand Granado, Thomas LeFebvre, Mehdi Aïchouch, Jean-Christophe Prévotet, Yaset Oliva, Daniel Chillet, Sébastien Pillement
2009	C	`conf`	xMAML: A Modeling Language for Dynamically Reconfigurable Architectures. DSD Julien Lallet, Sébastien Pillement, Olivier Sentieys
2008	—	`conf`	A Framework for the Exploration of RTOS Dedicated to the Management of Hardware Reconfigurable Resources. ReConFig Jean-Christophe Prévotet, Mohamed El Amine Benkhelifa, Bertrand Granado, Emmanuel Huck, Benoît Miramond, François Verdier, Daniel Chillet, Sébastien Pillement
2008	J	`jnl`	DART: A Functional-Level Reconfigurable Architecture for High Energy Efficiency. EURASIP J. Embed. Syst. Sébastien Pillement, Olivier Sentieys, Raphaël David
2008	—	`conf`	Efficient dynamic reconfiguration for multi-context embedded FPGA. SBCCI Julien Lallet, Sébastien Pillement, Olivier Sentieys
2007	B	`conf`	A Neural Network Model for Real-Time Scheduling on Heterogeneous SoC Architectures. IJCNN Daniel Chillet, Sébastien Pillement, Olivier Sentieys
2007	J	`jnl`	Architectures reconfigurable et faible consommation. Réalité ou prospective ? Tech. Sci. Informatiques Sébastien Pillement, Raphaël David
2007	—	`conf`	Hardware task scheduling for heterogeneous soc architectures. EUSIPCO Imene Benkermi, Daniel Chillet, Sébastien Pillement, Olivier Sentieys
2007	—	`conf`	Modeling of Interconnection Networks in Massively Parallel Processor Architectures. ARCS Alexey Kupriyanov, Frank Hannig, Dmitrij Kissler, Jürgen Teich, Julien Lallet, Olivier Sentieys, Sébastien Pillement
2006	C	`conf`	An energy-efficient ternary interconnection link for asynchronous systems. ISCAS Jean-Marc Philippe, E. Kinvi-Boh, Sébastien Pillement, Olivier Sentieys
2006	—	`conf`	Area Efficient Temporal Coding Schemes for Reducing Crosstalk Effects. ISQED Jean-Marc Philippe, Sébastien Pillement, Olivier Sentieys
2006	—	`conf`	Clear Stream towards Dynamically Reconfigurable Systems on Chip. ReCoSoC Nicolas Abel, Lounis Kessal, Sébastien Pillement, Didier Demigny
2005	—	`conf`	A low-power and high-speed quaternary interconnection link using efficient converters. ISCAS (5) Jean-Marc Philippe, Sébastien Pillement, Olivier Sentieys
2005	J	`jnl`	Du microprocesseur au circuit FPGA. Une analyse sous l'angle de la reconfiguration. Tech. Sci. Informatiques Raphaël David, Dominique Lavenier, Sébastien Pillement
2005	—	`conf`	Exploring RTOS issues with a high-level model of a reconfigurable SoC platform. ReCoSoC François Verdier, Jean-Christophe Prévotet, Mohamed El Amine Benkhelifa, Daniel Chillet, Sébastien Pillement
2002	B	`conf`	A Compilation Framework for a Dynamically Reconfigurable Architecture. FPL Raphaël David, Daniel Chillet, Sébastien Pillement, Olivier Sentieys
2002	—	`conf`	Behavioral IP Specification and Integration Framework for High-Level Design Reuse. ISQED Sébastien Pillement, Daniel Chillet, Olivier Sentieys
2002	A	`conf`	DART: A Dynamically Reconfigurable Architecture Dealing with Future Mobile Telecommunications Constraints. IPDPS Raphaël David, Daniel Chillet, Sébastien Pillement, Olivier Sentieys
2002	Misc	`conf`	Mapping future generation mobile telecommunication applications on a dynamically reconfigurable arcidtecture. ICASSP Raphaël David, Daniel Chillet, Sébastien Pillement, Olivier Sentieys
2001	C	`conf`	A Dynamically Reconfigurable Architecture for Low-Power Multimedia Terminals. VLSI-SOC Raphaël David, Daniel Chillet, Sébastien Pillement, Olivier Sentieys
1999	—	`conf`	Embedded Systems Design And Verification: Reuse Oriented Prototyping Methodologies. VLSI S. Raimbault, Gilles Sassatelli, Gamille Cambon, Michel Robert, Sébastien Pillement, Lionel Torres
1999	C	`conf`	Fast Prototyping: A Case Study - The JPEG Compression Algorithm. IEEE International Workshop on Rapid System Prototyping Sébastien Pillement, Lionel Torres, Michel Robert, Gaston Cambon
1996	B	`conf`	Concurrent Design of Hardware/Software Dedicated Systems. FPL Sébastien Pillement, Lionel Torres, Michel Robert, Gaston Cambon