Sébastien Haendler

17 papers Journal 3Unranked 14
YearRankTypeTitle / Venue / Authors
2021 — conf
Circuit-level evaluation of a new zero-cost transistor in an embedded non-volatile memory CMOS technology.
DTIS
Paul Devoge, Hassen Aziza, Philippe Lorenzini, Franck Julien, Abderrezak Marzaki, Alexandre Malherbe, Marc Mantelli, Thomas Sardin, Sébastien Haendler, Arnaud Régnier, Stephan Niel
2019 — conf
28nm FDSOI Platform with Embedded PCM for IoT, ULP, Digital, Analog, Automotive and others Applications.
ESSCIRC
Franck Arnaud, Sébastien Haendler, Sylvain Clerc, Rossella Ranica, Anna Gandolfo, Olivier Weber
2019 — conf
28nm FDSOI Platform with Embedded PCM for IoT, ULP, Digital, Analog, Automotive and others Applications.
ESSDERC
Franck Arnaud, Sébastien Haendler, Sylvain Clerc, Rossella Ranica, Anna Gandolfo, Olivier Weber
2018 — conf
Reliability assessment of 4GSP/s interleaved SAR ADC.
IRPS
Rania Lajmi, Florian Cacho, O. David, Jean-Pierre Blanc, Emmanuel Rouat, Sébastien Haendler, Ph. Benech, Estelle Lauga-Larroze, Sylvain Bourdel
2017 — conf
Characterization, modeling and comparison of 1/f noise in Si/SiGe: C HBTs issued from three advanced BiCMOS technologies.
ICM
Marcelino Seif, Fabien Pascal, Bruno Sagnes, J. Elbeyrouthy, Alain Hoffmann, Sébastien Haendler, Pascal Chevalier, Daniel Gloria
2016 — conf
28nm FDSOI technology sub-0.6V SRAM Vmin assessment for ultra low voltage applications.
VLSI Circuits
Rossella Ranica, Nicolas Planes, Vincent Huard, Olivier Weber, Daniel Noblet, Damien Croain, Fabien Giner, Sylvie Naudet, P. Mergault, S. Ibars, A. Villaret, Maryline Parra, Sébastien Haendler, M. Quoirin, Florian Cacho, C. Julien, F. Terrier, Lorenzo Ciampolini, David Turgis, Christophe Lecocq, Franck Arnaud
2015 — conf
New LFN and RTN analysis methodology in 28 and 14nm FD-SOI MOSFETs.
IRPS
Christoforos G. Theodorou, Eleftherios G. Ioannidis, Sébastien Haendler, Nicolas Planes, Emmanuel Josse, Charalambos A. Dimitriadis, Gérard Ghibaudo
2014 J jnl
Dispersion study of DC and Low Frequency Noise in SiGe: C Heterojunction Bipolar Transistors used for mm-Wave to Terahertz applications.
Microelectron. Reliab.
Marcelino Seif, Fabien Pascal, Bruno Sagnes, Alain Hoffmann, Sébastien Haendler, Pascal Chevalier, Daniel Gloria
2014 — conf
Statistical analysis of dynamic variability in 28nm FD-SOI MOSFETs.
ESSDERC
Eleftherios G. Ioannidis, Sébastien Haendler, Christoforos G. Theodorou, Nicolas Planes, Charalabos A. Dimitriadis, Gérard Ghibaudo
2014 — conf
Study of low frequency noise in advanced SiGe: C heterojunction bipolar transistors.
ESSDERC
Marcelino Seif, Fabien Pascal, Bruno Sagnes, Alain Hoffmann, Sébastien Haendler, Pascal Chevalier, Daniel Gloria
2013 — conf
6T SRAM performance and power gain using double gate MOS in 28nm FDSOI technology.
ICICDT
Vivek Asthana, Malathi Kar, Jean Jimenez, Sébastien Haendler, Philippe Galy
2013 — conf
Circuit optimization of 4T, 6T, 8T, 10T SRAM bitcells in 28nm UTBB FD-SOI technology using back-gate bias control.
ESSCIRC
Vivek Asthana, Malathi Kar, Jean Jimenez, Jean-Philippe Noel, Sébastien Haendler, Philippe Galy
2012 — conf
Impact of front-back gate coupling on low frequency noise in 28 nm FDSOI MOSFETs.
ESSDERC
Christoforos G. Theodorou, Eleftherios G. Ioannidis, Sébastien Haendler, Nicolas Planes, Franck Arnaud, Jalal Jomaah, Charalambos A. Dimitriadis, Gérard Ghibaudo
2009 — conf
Impact of a 10nm Ultra-Thin BOX (UTBOX) and Ground Plane on FDSOI devices for 32nm node and below.
ESSCIRC
Claire Fenouillet-Béranger, Pierre Perreau, S. Denorme, L. Tosti, François Andrieu, Olivier Weber, S. Barnola, C. Arvet, Y. Campidelli, Sébastien Haendler, R. Beneyton, C. Perrot, C. de Buttet, P. Gros, Loan Pham-Nguyen, F. Leverd, P. Gouraud, F. Abbate, F. Baron, Alphonse Torres, C. Laviron, L. Pinzelli, J. Vetier, C. Borowiak, A. Margain, D. Delprat, F. Boedt, Konstantin Bourdelle, Bich-Yen Nguyen, Olivier Faynot, Thomas Skotnicki
2003 J jnl
Low frequency noise in 0.12 mum partially and fully depleted SOI technology.
Microelectron. Reliab.
François Dieudonné, Sébastien Haendler, Jalal Jomaah, Francis Balestra
2001 J jnl
Improved analysis of low frequency noise in dynamic threshold MOS/SOI transistors.
Microelectron. Reliab.
Sébastien Haendler, Jalal Jomaah, Gérard Ghibaudo, Francis Balestra
2000 — conf
0.25 μm SOI technologies performance for low-power radio-frequency applications.
ICECS
O. Rozeau, Sébastien Haendler, Jalal Jomaah, J. Boussey, Francis Balestra, C. Raynaud, J. L. Pelloie