Sébastien Bilavarn

40 papers A 3C 6Journal 17Unranked 12

Year	Rank	Type	Title / Venue / Authors
2024	A	`conf`	Control Enhancement of Traction Electric Drives Using Neural Network Predictive Controller. ICCAD Romain Cocogne, Sébastien Bilavarn, Mostafa El Mokadem, Khaled Douzane
2024	—	`conf`	Improving the Energy Efficiency of CNN Inference on FPGA Using Partial Reconfiguration. DASIP Zhuoer Li, Sébastien Bilavarn
2024	C	`conf`	Partial Reconfiguration for Energy-Efficient Inference on FPGA: A Case Study with ResNet-18. DSD Zhuoer Li, Sébastien Bilavarn
2022	J	`jnl`	Efficiency analysis of artificial vs. Spiking Neural Networks on FPGAs. J. Syst. Archit. Zhuoer Li, Edgar Lemaire, Nassim Abderrahmane, Sébastien Bilavarn, Benoît Miramond
2022	J	`jnl`	Synaptic Activity and Hardware Footprint of Spiking Neural Networks in Digital Neuromorphic Systems. ACM Trans. Embed. Comput. Syst. Edgar Lemaire, Benoît Miramond, Sébastien Bilavarn, Hadi Saoud, Nassim Abderrahmane
2020	C	`conf`	An FPGA-Based Hybrid Neural Network Accelerator for Embedded Satellite Image Classification. ISCAS Edgar Lemaire, Matthieu Moretti, Lionel Daniel, Benoît Miramond, Philippe Millet, Frédéric Feresin, Sébastien Bilavarn
2018	J	`jnl`	Energy efficient mapping on manycore with dynamic and partial reconfiguration: Application to a smart camera. Int. J. Circuit Theory Appl. Robin Bonamy, Sébastien Bilavarn, Fabrice Muller, François Duhem, Simon Heywood, Philippe Millet, Fabrice Lemonnier
2018	—	`book`	Modélisation, Conception Système d'Architectures Hétérogènes pour les Applications Embarquées : Eléments d'amélioration de l'efficacité énergétique des systèmes sur puce de silicium. (Modelling, Design of Heterogenous architectures for embedded Applications / Modelling, Design of Heterogenous architectures for embedded Applications : Refinement parts about power efficiency of silicon chips systems). Sébastien Bilavarn
2017	J	`jnl`	Efficiency modeling and exploration of 64-bit ARM compute nodes for exascale. Microprocess. Microsystems Joël Wanza Weloli, Sébastien Bilavarn, Maarten de Vries, Said Derradji, Cécile Belleudy
2016	J	`jnl`	Effectiveness of power strategies for video applications: a practical study. J. Real Time Image Process. Sébastien Bilavarn, Jabran Khan, Cécile Belleudy, Muhammad Khurram Bhatti
2016	C	`conf`	Efficiency Modeling and Analysis of 64-bit ARM Clusters for HPC. DSD Joël Wanza Weloli, Sébastien Bilavarn, Said Derradji, Cécile Belleudy, Sylvie Lesmanne
2016	J	`jnl`	Power Modeling and Exploration of Dynamic and Partially Reconfigurable Systems. J. Low Power Electron. Robin Bonamy, Sébastien Bilavarn, Daniel Chillet, Olivier Sentieys
2015	—	`conf`	An energy-aware scheduler for dynamically reconfigurable multi-core systems. ReCoSoC Robin Bonamy, Sébastien Bilavarn, Fabrice Muller
2015	J	`jnl`	FoRTReSS: a flow for design space exploration of partially reconfigurable systems. Des. Autom. Embed. Syst. François Duhem, Fabrice Muller, Robin Bonamy, Sébastien Bilavarn
2015	—	`conf`	HLS based design of a mixed architecture for H.264/AVC CAVLD. SSD Taheni Damak, Sébastien Bilavarn, Nouri Masmoudi
2014	J	`jnl`	Power consumption models for the use of dynamic and partial reconfiguration. Microprocess. Microsystems Robin Bonamy, Sébastien Bilavarn, Daniel Chillet, Olivier Sentieys
2013	—	`conf`	Energy Analysis of a Real-time Multiprocessor Control of Idle States. PECCS Jabran Khan, Sébastien Bilavarn, Muhammad Khurram Bhatti, Cécile Belleudy
2012	—	`conf`	Impact of operating points on DVFS power management. DTIS Jabran Khan, Sébastien Bilavarn, Cécile Belleudy
2012	C	`conf`	Open-People: Open Power and Energy Optimization PLatform and Estimator. DSD Eric Senn, Daniel Chillet, Olivier Zendra, Cécile Belleudy, Sébastien Bilavarn, Rabie Ben Atitallah, Christian Samoyeau, A. Fritsch
2012	—	`conf`	Power consumption model for partial and dynamic reconfiguration. ReConFig Robin Bonamy, Daniel Chillet, Sébastien Bilavarn, Olivier Sentieys
2011	—	`conf`	A Video Monitoring Application forWireless Sensor Networks using IEEE 802.15.4. ARCS Workshops Sébastien Bilavarn, Andrea Castagnetti, Laurent Rodriguez
2011	J	`jnl`	AADL Extension to Model Classical FPGA and FPGA Embedded within a SoC. Int. J. Reconfigurable Comput. Dominique Blouin, Daniel Chillet, Eric Senn, Sébastien Bilavarn, Robin Bonamy, Christian Samoyeau
2011	—	`conf`	Embedded operating systems energy overhead. DASIP Bassem Ouni, Cécile Belleudy, Sébastien Bilavarn, Eric Senn
2011	J	`jnl`	Exploitation of the EDF Scheduling in the Wireless Sensors Networks. Int. J. Meas. Technol. Instrum. Eng. Rym Chéour, Sébastien Bilavarn, Mohamed Abid
2011	J	`jnl`	Parallelism Level Impact on Energy Consumption in Reconfigurable Devices. SIGARCH Comput. Archit. News Robin Bonamy, Daniel Chillet, Olivier Sentieys, Sébastien Bilavarn
2011	—	`conf`	Towards a power and energy efficient use of partial dynamic reconfiguration. ReCoSoC Robin Bonamy, Daniel Chillet, Olivier Sentieys, Sébastien Bilavarn
2010	J	`jnl`	Implantation d'un décodeur H.264 sur plateforme multiprocesseur avec gestion énergétique. Tech. Sci. Informatiques Sébastien Bilavarn, Cécile Belleudy, Michel Auguin, T. Dupont, Anna-Marie Fouillart
2010	C	`conf`	Power Consumption Modeling for DVFS Exploitation. DSD Andrea Castagnetti, Cécile Belleudy, Sébastien Bilavarn, Michel Auguin
2009	J	`jnl`	UML for Modelling and Performance Estimation of Embedded Systems. J. Object Technol. Fateh Boutekkouk, Mohamed Benmohammed, Sébastien Bilavarn, Michel Auguin
2009	J	`jnl`	UML2.0 Profiles for Embedded Systems and Systems On a Chip (SOCs). J. Object Technol. Fateh Boutekkouk, Mohamed Benmohammed, Sébastien Bilavarn, Michel Auguin
2008	C	`conf`	Embedded Multicore Implementation of a H.264 Decoder with Power Management Considerations. DSD Sébastien Bilavarn, Cécile Belleudy, Michel Auguin, T. Dupont, Anne-Marie Fouilliart
2008	—	`conf`	UML profile for estimating application Worst Case Execution Time on System-on-Chip. SoC Fateh Boutekkouk, Sébastien Bilavarn, Michel Auguin, Mohammed Benmohammed
2006	J	`jnl`	Design Space Pruning Through Early Estimations of Area/Delay Tradeoffs for FPGA Implementations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Sébastien Bilavarn, Guy Gogniat, Jean Luc Philippe, Lilian Bossuet
2006	J	`jnl`	EPICURE: A partitioning and co-design framework for reconfigurable computing. Microprocess. Microsystems Jean-Philippe Diguet, Guy Gogniat, Jean Luc Philippe, Yannick Le Moullec, Sébastien Bilavarn, Christian Gamrat, Karim Ben Chehida, Michel Auguin, Xavier Fornari, Philippe Kajfasz
2005	J	`jnl`	Processor Enhancements for Media Streaming Applications. J. VLSI Signal Process. Sébastien Bilavarn, Eric Debes, Pierre Vandergheynst, Jean-Philippe Diguet
2004	A	`conf`	Reconfigurable coprocessor for media streaming. ICME Sébastien Bilavarn, Eric Debes
2003	A	`conf`	An estimation and exploration methodology from system-level specifications: application to FPGAs. FPGA Sébastien Bilavarn, Guy Gogniat, Jean Luc Philippe
2003	—	`conf`	Fast prototyping of reconfigurable architectures from a C program. ISCAS (5) Sébastien Bilavarn, Guy Gogniat, Jean Luc Philippe, Lilian Bossuet
2002	—	`—`	Exploration Architecturale au Niveau Comportemental - Application aux FPGAs. (Architectural Exploration in behavioral level - Application to FPGAs). Sébastien Bilavarn
2000	—	`conf`	Area time power estimation for FPGA based designs at a behavioral level. ICECS Sébastien Bilavarn, Guy Gogniat, Jean Luc Philippe