Sybille Hellebrand

88 papers A* 1A 17B 9C 7Misc 7Journal 22Unranked 24

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	Enhancing the Lifetime of STT-MRAM in IoT Applications by Current Balancing. LATS Somayeh Sadeghi Kohan, Fatemeh Akbari, Mahta Mayahinia, Mehdi B. Tahoori, Sybille Hellebrand, Hans-Joachim Wunderlich
2026	—	`conf`	Validating Statistical Delay Test Generation Under Timing Variations via SAT-Based ATPG. LATS Hanieh Jafarzadeh, Jan Dennis Reimer, Hussam Amrouch, Sybille Hellebrand, Hans-Joachim Wunderlich
2025	B	`conf`	European Test Symposium Teams: an Anniversary Snapshot. ETS Maksim Jenihhin, Jaan Raik, Artur Jutman, Natalia Cherezova, Raimund Ubar, Liviu Miclea, Szilárd Enyedi, I. Stefan, Ovidiu Stan, Cosmina Corches, Z. Peng, Petru Eles, Rolf Drechsler, S. Eggersglüß, Görschwin Fey, Andreas Glowatz, Daniel Tille, Georges G. E. Gielen, Anthony Coyette, Wim Dobbelaere, Ronny Vanhooren, P.-Y. Chuang, Erik Jan Marinissen, Giorgio Di Natale, M. Barragan, Paolo Maistri, S. Mir, Vatajelu I. Vatajelu, Paolo Bernardi, S. Di Carlo, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante, Haralampos-G. Stratigopoulos, M. K. Michael, Stelios Neophytou, Stavros Hadjitheophanous, Kyriakos Christou, M. Skitsas, Alberto Bosio, Bastien Deveautour, P. Girard, Marcello Traiola, Arnaud Virazel, F. Fernandes Dos Santos, Angeliki Kritikakou, Gioele Casagranda, Marzio Vallero, Flavio Vella, Paolo Rech, Letícia Maria Bolzani Poehls, Milos Krstic, Marko S. Andjelkovic, F. Vargas, Grigor Tshagharyan, Gurgen Harutyunyan, Valery A. Vardanian, Samvel K. Shoukourian, Yervant Zorian, Jennifer Dworak, Kundan Nepal, Theodore W. Manikas, Mottaqiallah Taouil, Moritz Fieback, Anteneh Gebregiorgis, Rajendra Bishnoi, Said Hamdioui, Abhijit Chatterjee, A. Saha, Suhasini Komarraju, K. Ma, Chandramouli N. Amarnath, Mehdi Baradaran Tahoori, Mahta Mayahinia, Maryam Rajabalipanah, Katayoon Basharkhah, N. Nosrati, Zahra Jahanpeima, Zain Navabi, Hans-Joachim Wunderlich, Sybille Hellebrand
2025	—	`conf`	Robust DLBIST for Delay Fault Testing: Minimizing PVT Variability with Zero Temperature Coefficient (ZTC) Voltage. LATS Hanieh Jafarzadeh, Florian Klemme, Hussam Amrouch, Sybille Hellebrand, Hans-Joachim Wunderlich
2025	B	`conf`	Robust Pattern Generation for Small Delay Faults under the Impact of Variations. ETS Hanieh Jafarzadeh, Sybille Hellebrand, Hans-Joachim Wunderlich
2025	J	`jnl`	Small Delay Fault Testing with Multiple Voltages under Variations: Defect vs. Fault Coverage. J. Electron. Test. Hanieh Jafarzadeh, Florian Klemme, Hussam Amrouch, Sybille Hellebrand, Hans-Joachim Wunderlich
2025	—	`conf`	Zero Overhead Error-Tolerant Communication. LATS Somayeh Sadeghi Kohan, Sybille Hellebrand, Hans-Joachim Wunderlich
2024	A	`conf`	Minimizing PVT-Variability by Exploiting the Zero Temperature Coefficient (ZTC) for Robust Delay Fault Testing. ITC Hanieh Jafarzadeh, Florian Klemme, Jan Dennis Reimer, Hussam Amrouch, Sybille Hellebrand, Hans-Joachim Wunderlich
2024	—	`conf`	RAPPER: Robust and APProximate ERror Tolerating Communication. DFT Somayeh Sadeghi Kohan, Sybille Hellebrand, Hans-Joachim Wunderlich
2024	B	`conf`	Time and Space Optimized Storage-based BIST under Multiple Voltages and Variations. ETS Hanieh Jafarzadeh, Florian Klemme, Hussam Amrouch, Sybille Hellebrand, Hans-Joachim Wunderlich
2024	—	`conf`	Vmin Testing under Variations: Defect vs. Fault Coverage. LATS Hanieh Jafarzadeh, Florian Klemme, Hussam Amrouch, Sybille Hellebrand, Hans-Joachim Wunderlich
2024	J	`jnl`	Workload-Aware Periodic Interconnect BIST. IEEE Des. Test Somayeh Sadeghi Kohan, Sybille Hellebrand, Hans-Joachim Wunderlich
2023	B	`conf`	Approximate Communication: Balancing Performance, Power, Reliability, and Safety. ETS Abdalrhman Badran, Somayeh Sadeghi Kohan, Jan Dennis Reimer, Sybille Hellebrand
2023	—	`conf`	Low Power Streaming of Sensor Data Using Gray Code-Based Approximate Communication. DSN-W Somayeh Sadeghi Kohan, Sybille Hellebrand, Hans-Joachim Wunderlich
2023	—	`conf`	Optimizing the Streaming of Sensor Data with Approximate Communication. ATS Somayeh Sadeghi Kohan, Jan Dennis Reimer, Sybille Hellebrand, Hans-Joachim Wunderlich
2023	A	`conf`	Robust Pattern Generation for Small Delay Faults Under Process Variations. ITC Hanieh Jafarzadeh, Florian Klemme, Jan Dennis Reimer, Zahra Paria Najafi-Haghi, Hussam Amrouch, Sybille Hellebrand, Hans-Joachim Wunderlich
2021	J	`jnl`	Stress-Aware Periodic Test of Interconnects. J. Electron. Test. Somayeh Sadeghi Kohan, Sybille Hellebrand, Hans-Joachim Wunderlich
2020	Misc	`conf`	Dynamic Multi-Frequency Test Method for Hidden Interconnect Defects. VTS Somayeh Sadeghi Kohan, Sybille Hellebrand
2020	A	`conf`	Logic Fault Diagnosis of Hidden Delay Defects. ITC Stefan Holst, Matthias Kampmann, Alexander Sprenger, Jan Dennis Reimer, Sybille Hellebrand, Hans-Joachim Wunderlich, Xiaoqing Wen
2020	—	`conf`	Variation-Aware Test for Logic Interconnects using Neural Networks - A Case Study. DFT Alexander Sprenger, Somayeh Sadeghi Kohan, Jan Dennis Reimer, Sybille Hellebrand
2019	A	`conf`	A Hybrid Space Compactor for Adaptive X-Handling. ITC Mohammad Urf Maaz, Alexander Sprenger, Sybille Hellebrand
2019	J	`jnl`	Built-In Test for Hidden Delay Faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Matthias Kampmann, Michael A. Kochte, Chang Liu, Eric Schneider, Sybille Hellebrand, Hans-Joachim Wunderlich
2019	J	`jnl`	Divide and Compact - Stochastic Space Compaction for Faster-than-at-Speed Test. J. Circuits Syst. Comput. Alexander Sprenger, Sybille Hellebrand
2018	J	`jnl`	Design for Small Delay Test - A Simulation Study. Microelectron. Reliab. Matthias Kampmann, Sybille Hellebrand
2018	—	`conf`	Extending Aging Monitors for Early Life and Wear-Out Failure Prevention. ATS Chang Liu, Eric Schneider, Matthias Kampmann, Sybille Hellebrand, Hans-Joachim Wunderlich
2018	J	`jnl`	Guest Editors' Introduction. IEEE Embed. Syst. Lett. Sybille Hellebrand, Jörg Henkel, Anand Raghunathan, Hans-Joachim Wunderlich
2018	C	`conf`	Tuning Stochastic Space Compaction to Faster-than-at-Speed Test. DDECS Alexander Sprenger, Sybille Hellebrand
2017	C	`conf`	Design-for-FAST: Supporting X-tolerant compaction during Faster-than-at-Speed Test. DDECS Matthias Kampmann, Sybille Hellebrand
2017	B	`conf`	Foreword. ETS Maria K. Michael, Rolf Drechsler, Stephan Eggersglüß, Haralampos-G. D. Stratigopoulos, Sybille Hellebrand, Rob Aitken
2017	Misc	`conf`	Special session on early life failures. VTS Jyotirmoy V. Deshmukh, Wolfgang Kunz, Hans-Joachim Wunderlich, Sybille Hellebrand
2016	—	`conf`	X Marks the Spot: Scan-Flip-Flop Clustering for Faster-than-at-Speed Test. ATS Matthias Kampmann, Sybille Hellebrand
2015	J	`jnl`	A High Performance SEU Tolerant Latch. J. Electron. Test. Zhengfeng Huang, Huaguo Liang, Sybille Hellebrand
2015	—	`conf`	Optimized Selection of Frequencies for Faster-Than-at-Speed Test. ATS Matthias Kampmann, Michael A. Kochte, Eric Schneider, Thomas Indlekofer, Sybille Hellebrand, Hans-Joachim Wunderlich
2014	J	`jnl`	Adaptive Bayesian Diagnosis of Intermittent Faults. J. Electron. Test. Laura Rodríguez Gómez, Alejandro Cook, Thomas Indlekofer, Sybille Hellebrand, Hans-Joachim Wunderlich
2014	A	`conf`	FAST-BIST: Faster-than-at-Speed BIST targeting hidden delay defects. ITC Sybille Hellebrand, Thomas Indlekofer, Matthias Kampmann, Michael A. Kochte, Chang Liu, Hans-Joachim Wunderlich
2014	J	`jnl`	SAT-based ATPG beyond stuck-at fault testing. it Inf. Technol. Sybille Hellebrand, Hans-Joachim Wunderlich
2013	—	`conf`	Analyzing and quantifying fault tolerance properties. LATW Sybille Hellebrand
2012	B	`conf`	Built-in self-diagnosis exploiting strong diagnostic windows in mixed-mode test. ETS Alejandro Cook, Sybille Hellebrand, Hans-Joachim Wunderlich
2012	—	`conf`	Built-in self-diagnosis targeting arbitrary defects with partial pseudo-exhaustive test. LATW Alejandro Cook, Sybille Hellebrand, Michael E. Imhof, Abdullah Mumtaz, Hans-Joachim Wunderlich
2011	—	`conf`	Diagnostic Test of Robust Circuits. Asian Test Symposium Alejandro Cook, Sybille Hellebrand, Thomas Indlekofer, Hans-Joachim Wunderlich
2011	B	`conf`	Towards Variation-Aware Test Methods. ETS Ilia Polian, Bernd Becker, Sybille Hellebrand, Hans-Joachim Wunderlich, Peter C. Maxwell
2011	J	`jnl`	Variation-aware fault modeling. Sci. China Inf. Sci. Fabian Hopsch, Bernd Becker, Sybille Hellebrand, Ilia Polian, Bernd Straube, Wolfgang Vermeiren, Hans-Joachim Wunderlich
2010	C	`conf`	Efficient test response compaction for robust BIST using parity sequences. ICCD Thomas Indlekofer, Michael Schnittger, Sybille Hellebrand
2010	—	`conf`	Massive statistical process variations: A grand challenge for testing nanoelectronic circuits. DSN Workshops Bernd Becker, Sybille Hellebrand, Ilia Polian, Bernd Straube, Wolfgang Vermeiren, Hans-Joachim Wunderlich
2010	J	`jnl`	Nano-electronic Systems (Nano-elektronische Systeme). it Inf. Technol. Sybille Hellebrand
2010	Misc	`conf`	Reusing NoC-infrastructure for test data compression. VTS Viktor Froese, Rüdiger Ibers, Sybille Hellebrand
2010	—	`conf`	The Impact of Manufacturing Defects on the Fault Tolerance of TMR-Systems. DFT Marc Hunger, Sybille Hellebrand
2010	—	`conf`	Variation-Aware Fault Modeling. Asian Test Symposium Fabian Hopsch, Bernd Becker, Sybille Hellebrand, Ilia Polian, Bernd Straube, Wolfgang Vermeiren, Hans-Joachim Wunderlich
2009	C	`conf`	ATPG-based grading of strong fault-secureness. IOLTS Marc Hunger, Sybille Hellebrand, Alejandro Czutro, Ilia Polian, Bernd Becker
2009	—	`conf`	Are Robust Circuits Really Robust? DFT Sybille Hellebrand, Marc Hunger
2008	C	`conf`	A Modular Memory BIST for Optimized Memory Repair. IOLTS Philipp Öhler, Alberto Bosio, Giorgio Di Natale, Sybille Hellebrand
2008	Misc	`conf`	Signature Rollback - A Technique for Testing Robust Circuits. VTS Uranmandakh Amgalan, Christian Hachmann, Sybille Hellebrand, Hans-Joachim Wunderlich
2008	C	`conf`	Verification and Analysis of Self-Checking Properties through ATPG. IOLTS Marc Hunger, Sybille Hellebrand
2007	—	`conf`	A Refined Electrical Model for Particle Strikes and its Impact on SEU Prediction. DFT Sybille Hellebrand, Christian G. Zoellin, Hans-Joachim Wunderlich, Stefan Ludwig, Torsten Coym, Bernd Straube
2007	B	`conf`	An Integrated Built-In Test and Repair Approach for Memories with 2D Redundancy. ETS Philipp Öhler, Sybille Hellebrand, Hans-Joachim Wunderlich
2007	J	`jnl`	An efficient fault tolerant mechanism to deal with permanent and transient failures in a network on chip. Int. J. High Perform. Syst. Archit. Muhammad Ali, Michael Welzl, Sven Hessler, Sybille Hellebrand
2007	C	`conf`	Analyzing Test and Repair Times for 2D Integrated Memory Built-in Test and Repair. DDECS Philipp Öhler, Sybille Hellebrand, Hans-Joachim Wunderlich
2006	J	`jnl`	DFG-Projekt RealTest - Test und Zuverlässigkeit nanoelektronischer Systeme (DFG-Project - Test and Reliability of Nano-Electronic Systems). it Inf. Technol. Bernd Becker, Ilia Polian, Sybille Hellebrand, Bernd Straube, Hans-Joachim Wunderlich
2005	B	`conf`	Low power embedded DRAMs with high quality error correcting capabilities. ETS Philipp Öhler, Sybille Hellebrand
2004	A	`conf`	Data Compression for Multiple Scan Chains Using Dictionaries with Corrections. ITC Armin Würtenberger, Christofer S. Tautermann, Sybille Hellebrand
2003	A	`conf`	A Hybrid Coding Strategy For Optimized Test Data Compression. ITC Armin Würtenberger, Christofer S. Tautermann, Sybille Hellebrand
2002	J	`jnl`	A Mixed-Mode BIST Scheme Based on Folding Compression. J. Comput. Sci. Technol. Huaguo Liang, Sybille Hellebrand, Hans-Joachim Wunderlich
2002	J	`jnl`	Efficient Online and Offline Testing of Embedded DRAMs. IEEE Trans. Computers Sybille Hellebrand, Hans-Joachim Wunderlich, Alexander A. Ivaniuk, Yuri V. Klimets, Vyacheslav N. Yarmolik
2002	J	`jnl`	Two-Dimensional Test Data Compression for Scan-Based Deterministic BIST. J. Electron. Test. Huaguo Liang, Sybille Hellebrand, Hans-Joachim Wunderlich
2001	J	`jnl`	A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters. J. Electron. Test. Sybille Hellebrand, Huaguo Liang, Hans-Joachim Wunderlich
2001	A	`conf`	Two-dimensional test data compression for scan-based deterministic BIST. ITC Huaguo Liang, Sybille Hellebrand, Hans-Joachim Wunderlich
2000	A	`conf`	A mixed mode BIST scheme based on reseeding of folding counters. ITC Sybille Hellebrand, Hans-Joachim Wunderlich, Huaguo Liang
1999	Misc	`conf`	Error Detecting Refreshment for Embedded DRAMs. VTS Sybille Hellebrand, Hans-Joachim Wunderlich, Alexander A. Ivaniuk, Yuri V. Klimets, Vyacheslav N. Yarmolik
1999	A	`conf`	Symmetric Transparent BIST for RAMs. DATE Sybille Hellebrand, Hans-Joachim Wunderlich, Vyacheslav N. Yarmolik
1999	Misc	`conf`	Transparent Word-Oriented Memory BIST Based on Symmetric March Algorithms. EDCC Vyacheslav N. Yarmolik, I. V. Bykov, Sybille Hellebrand, Hans-Joachim Wunderlich
1998	Misc	`conf`	Fast Self-Recovering Controllers. VTS Andre Hertwig, Sybille Hellebrand, Hans-Joachim Wunderlich
1998	J	`jnl`	Mixed-Mode BIST Using Embedded Processors. J. Electron. Test. Sybille Hellebrand, Hans-Joachim Wunderlich, Andre Hertwig
1998	A	`conf`	Self-Adjusting Output Data Compression: An Efficient BIST Technique for RAMs. DATE Vyacheslav N. Yarmolik, Sybille Hellebrand, Hans-Joachim Wunderlich
1998	J	`jnl`	Synthesizing Fast, Online-Testable Control Units. IEEE Des. Test Comput. Sybille Hellebrand, Hans-Joachim Wunderlich, Andre Hertwig
1997	A*	`conf`	STARBIST: Scan Autocorrelated Random Pattern Generation. DAC Kun-Han Tsai, Sybille Hellebrand, Janusz Rajski, Malgorzata Marek-Sadowska
1996	A	`conf`	Mixed-Mode BIST Using Embedded Processors. ITC Sybille Hellebrand, Hans-Joachim Wunderlich, Andre Hertwig
1995	J	`jnl`	Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers. IEEE Trans. Computers Sybille Hellebrand, Janusz Rajski, Steffen Tarnick, Srikanth Venkataraman, Bernard Courtois
1995	A	`conf`	Pattern generation for a deterministic BIST scheme. ICCAD Sybille Hellebrand, Birgit Reeb, Steffen Tarnick, Hans-Joachim Wunderlich
1994	A	`conf`	An efficient procedure for the synthesis of fast self-testable controller structures. ICCAD Sybille Hellebrand, Hans-Joachim Wunderlich
1994	—	`conf`	Synthesis of Self-Testable Controllers. EDAC-ETC-EUROASIC Sybille Hellebrand, Hans-Joachim Wunderlich
1992	A	`conf`	Generation of Vector Patterns Through Reseeding of Multipe-Polynominal Linear Feedback Shift Registers. ITC Sybille Hellebrand, Steffen Tarnick, Bernard Courtois, Janusz Rajski
1992	J	`jnl`	The pseudoexhaustive test of sequential circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Hans-Joachim Wunderlich, Sybille Hellebrand
1991	—	`—`	Synthese vollstaendig testbarer Schaltungen Sybille Hellebrand
1990	A	`conf`	Generating pseudo-exhaustive vectors for external testing. ITC Sybille Hellebrand, Hans-Joachim Wunderlich, Oliver F. Haberl
1990	—	`conf`	Tools and devices supporting the pseudo-exhaustive test. EURO-DAC Sybille Hellebrand, Hans-Joachim Wunderlich
1989	A	`conf`	The Pseudo-Exhaustive Test of Sequential Circuits. ITC Sybille Hellebrand, Hans-Joachim Wunderlich
1988	—	`conf`	Automatisierung des Entwurfs vollständig testbarer Schaltungen. GI Jahrestagung (2) Sybille Hellebrand, Hans-Joachim Wunderlich
1988	—	`conf`	Generating pattern sequences for the pseudo-exhaustive test of MOS-circuits. FTCS Hans-Joachim Wunderlich, Sybille Hellebrand